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authormrb0nk500 <b0nk@b0nk.xyz>2022-01-14 13:25:56 -0400
committermrb0nk500 <b0nk@b0nk.xyz>2022-01-14 13:25:56 -0400
commitc88966d999a9dcf44c06550be81913b7bb16e62a (patch)
tree52ca4ea32cc29bb9e70e7efe24c26a794c3559f5
parent8b17c9b333d20f4cb54d13cebadf46a149f0be77 (diff)
Add bitmasks for indexing, and indirect addressing.
-rw-r--r--sux.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/sux.h b/sux.h
index 965fd70..0b79805 100644
--- a/sux.h
+++ b/sux.h
@@ -1790,18 +1790,23 @@ static /*inline*/ void exec_base_inst(struct sux *cpu, uint8_t opcode, uint8_t p
#endif
#define inst(op, ext) \
-static /*inline*/ void inst_##op(struct sux *cpu, uint8_t prefix, int inc_pc, int inc_clk, uint8_t thread) { \
+static /*inline*/ void inst_##op(struct sux *cpu, uint8_t prefix, uint8_t size, int inc_pc, int inc_clk, uint8_t thread) { \
const unsigned int o8 = 0x##op / 32, o8m = 1 << (0x##op % 32); \
const uint8_t rs = 1 << ((prefix >> 4) & 3); \
uint64_t addr = 0, idx = 0, tmp = -1, tmp2 = -1; \
uint64_t dummy = 0, *reg = &dummy; \
+ int pre_idx = 0; \
uint8_t pbits = 0x##op < 0x100 ? 0x10 : 0; \
t(1, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000) { addr = 0xFFA0; } /* NMI Vector. */ \
t(2, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000) { addr = 0xFFC0; } /* Reset Vector. */ \
t(4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000) { addr = 0xFFE0; } /* IRQ Vector. */ \
t(0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 0x00000000, 0x00000000, 0x00000000) { addr = 0xFFF0; } /* BRK Vector. */ \
+ t(0, 0x01000100, 0x01000100, 0x04000400, 0x00000000, 0x00000000, 0x40004000, 0x40004000, 0x00000000) { idx = cpu->x; } /* Register index. */ \
+ t(0, 0x06400200, 0x06400400, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x10000000, 0x00000000) { idx = cpu->y; } \
t(0, 0x00400160, 0x00400160, 0x00000160, 0x00000160, 0x00001160, 0x10005161, 0x10005161, 0x00001160) { addr = read_addr(cpu, prefix, inc_clk, ZM, inc_pc) + idx; } /* Read Zero Matrix address. */ \
t(0, 0x00060000, 0x00060000, 0x00160000, 0x00160000, 0x01160000, 0x01160000, 0x01170000, 0x01170000) { addr = read_addr(cpu, prefix, inc_clk, ABS, inc_pc); } /* Read Absolute address. */ \
+ t(0, 0x01000000, 0x01000000, 0x04000400, 0x00000000, 0x00000000, 0x40000000, 0x40000000, 0x00000000) { pre_idx = 1; } /* Set pre-index flag, for indexed indirect. */ \
+ t(0, 0x07101210, 0x17101410, 0x14001400, 0x10001000, 0x10000000, 0x40000000, 0x40000000, 0x00000000) { addr = ind_idx_addr(cpu, prefix, inc_clk, ZM, inc_pc, idx, pre_idx); } /* Indirect addressing, with indexing. */ \
t(0, 0x07561370, 0x17561570, 0x14161560, 0x10161160, 0x11161160, 0x51165161, 0x51175161, 0x01171160) { tmp = read_value(cpu, 0, addr, rs, inc_clk, 1); } /* Read data from memory. */ \
t(0, 0x00000006, 0x00000006, 0x00000006, 0x00000006, 0x00000016, 0x00000016, 0x00000016, 0x00000016) { tmp = read_value(cpu, 0, cpu->pc, rs, inc_clk, 0); cpu->pc += rs; } /* Immediate data. */ \
}