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authormrb0nk500 <b0nk@b0nk.xyz>2022-01-24 16:14:14 -0400
committermrb0nk500 <b0nk@b0nk.xyz>2022-01-24 16:14:14 -0400
commite6f8bc2b1f48422b8997ee8153f4051d33b04331 (patch)
treea708375c10f9dd308ff64bbd85193aaf34986ce7
parent9ff717ec7870826a57ee5266c9d8b534f9fb2398 (diff)
sux.h: Add bitmasks for register transfers.
-rw-r--r--sux.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/sux.h b/sux.h
index d161dc3..19e1c16 100644
--- a/sux.h
+++ b/sux.h
@@ -1795,6 +1795,7 @@ static /*inline*/ void inst_##op(struct sux *cpu, uint8_t prefix, uint8_t size,
uint8_t rs = ((1 << ((prefix >> 4) & 3)) - 1); \
uint64_t addr = 0, idx = 0, tmp = 0, tmp2 = 0; \
uint64_t dummy = 0, *reg = &dummy; \
+ uint64_t dummy2 = 0, *reg2 = &dummy; \
int pre_idx = 0, mem_type = ZM; \
/* Decode Address. */ \
t(1, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000) { cpu->pc = 0xFFA0; } /* NMI Vector. */ \
@@ -1819,6 +1820,12 @@ static /*inline*/ void inst_##op(struct sux *cpu, uint8_t prefix, uint8_t size,
t(7, 0x00010001, 0x00010001, 0x00010001, 0x00010001, 0x00014200, 0x00000200, 0x02000200, 0x02000201) { reg = &cpu->ps[thread]; } /* php, test/set/clear flags, and interrupts. */ \
t(0, 0x07561370, 0x17561570, 0x14161560, 0x10161160, 0x11161160, 0x51165161, 0x51175161, 0x01171160) { tmp = read_value(cpu, 0, addr, rs, inc_clk, 1); } /* Read data from memory. */ \
t(0, 0x00000006, 0x00000006, 0x00000006, 0x00000006, 0x00000016, 0x00000016, 0x00000016, 0x00000016) { tmp = read_value(cpu, 0, cpu->pc, rs, inc_clk, 0); cpu->pc += rs; } /* Immediate data. */ \
+ /* Setup register transfers. */ \
+ t(0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00000400, 0x00000400) { reg2 = &cpu->a; } /* tab, tax, tay. */ \
+ t(0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00040044, 0x00000000, 0x04000000) { reg2 = &cpu->b; } /* tba, div. */ \
+ t(0, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x04000000, 0x04400000, 0x00000000, 0x00000000) { reg2 = &cpu->x; } /* txa, txy, div b. */ \
+ t(0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00000000, 0x04000000, 0x00000000) { reg2 = &cpu->y; } /* tya, tyx. */ \
+ t(0, 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000) { reg2 = &cpu->sp; } /* tsx. */ \
/* Operations that mogrify (overwrite) memory directly. */ \
t(0, 0x00000000, 0x00000200, 0x02000210, 0x02000210, 0x02000000, 0x00000000, 0x00000000, 0x00000000) { tmp = *reg; } /* Mogrifying register. */ \
t(0, 0x00000000, 0x00000200, 0x00100310, 0x00000200, 0x00000000, 0x00000000, 0x00000000, 0x00000000) { ++tmp; } /* inc */ \