diff options
author | mrb0nk500 <b0nk@b0nk.xyz> | 2020-08-08 18:11:35 -0400 |
---|---|---|
committer | mrb0nk500 <b0nk@b0nk.xyz> | 2020-08-08 18:11:35 -0400 |
commit | f16af793a58a9f398fc598a0c129e3bb90eb61f6 (patch) | |
tree | 2f674574f2955a1bc52ee3a6818516226833ea9b | |
parent | 1ec19679b3db209429b0897f6ccda6d09d018a70 (diff) |
- Refactored the opcode table, in order to make the
instruction formatting simpler.
- Refactored the instruction table of the emulator's
assembler, it now has two parts, the addressing mode
bits, and the base value.
The base value is what's used to generate the actual
opcode, with the addressing mode bits telling the
assembler what addressing modes this instruction
supports.
The reason for doing this was to use less space. For
comparison, the previous version used 870 bytes for
the instruction table, while the new version uses
only 222 bytes. The new version is nearly 4 times
smaller than the pervious version.
- The B register based ALU instructions now use their
own addressing mode, and are specified by using 'b'
as the operand for those instructions.
For example, to add the Accumulator with the B
register, you now use "ADC B" instead of "AAB".
-rw-r--r-- | asmmon.c | 11 | ||||
-rw-r--r-- | asmmon.h | 276 | ||||
-rw-r--r-- | assemble.c | 211 | ||||
-rw-r--r-- | disasm.c | 5 | ||||
-rw-r--r-- | disasm.h | 282 | ||||
-rw-r--r-- | enums.h | 488 | ||||
-rw-r--r-- | lexer.c | 10 | ||||
-rw-r--r-- | lexer.h | 12 | ||||
-rw-r--r-- | opcode.h | 2 | ||||
-rw-r--r-- | programs/sub-suite/declare.s | 14 | ||||
-rw-r--r-- | programs/sub-suite/lexer.s | 26 | ||||
-rw-r--r-- | programs/sub-suite/libc.s | 4 | ||||
-rw-r--r-- | programs/sub-suite/subasm.s | 8 | ||||
-rw-r--r-- | programs/sub-suite/subeditor.s | 146 | ||||
-rw-r--r-- | programs/sub-suite/subsuite.s | 2 | ||||
-rw-r--r-- | programs/sub-suite/utils.s | 12 | ||||
-rw-r--r-- | sux.c | 26 | ||||
-rw-r--r-- | sux.h | 5 | ||||
-rw-r--r-- | tables.h | 282 | ||||
-rw-r--r-- | test/fib2.s | 2 | ||||
-rw-r--r-- | test/ind-addr.s | 5 | ||||
-rw-r--r-- | test/popcnt2.s | 2 |
22 files changed, 975 insertions, 856 deletions
@@ -64,15 +64,15 @@ void usage() { puts("\thelp, h\t\t\tDisplays this mesage."); } -void instinfo(const char *inst) { +void instinfo(const char *instr) { for(int i = 0; i < OPNUM; i++) { - if (inst[0] == mne[i][0]) { - if (!strcasecmp(inst, mne[i])) { + if (instr[0] == mne[i][0]) { + if (!strcasecmp(instr, mne[i])) { printf("%s\t%s\n", mne[i], instdesc[i]); break; } - } else if (inst[0] == 'a') { - if (!strcasecmp(inst, "all")) { + } else if (instr[0] == 'a') { + if (!strcasecmp(instr, "all")) { printf("%s\t%s\n", mne[i], instdesc[i]); } } @@ -174,6 +174,7 @@ void list(uint16_t start, uint16_t end, uint8_t all, uint8_t ln, uint8_t addr, u case IND : case INDX: case INDY: putchar('('); break; + case BREG: putchar('b'); break; } break; case TOK_OF: @@ -4,10 +4,12 @@ #define MAX_TOK 0x1000 -typedef struct tok token ; -typedef struct ln line ; -typedef struct sym symbol; -typedef struct fix fixup ; +typedef struct tok token ; +typedef struct ln line ; +typedef struct sym symbol ; +typedef struct fix fixup ; +typedef struct inst instruction; + struct tok { token *next; /* Pointer to the next token. */ @@ -56,6 +58,12 @@ struct sym { uint16_t id; }; +struct inst { + uint16_t am; /* Addressing modes. */ + uint8_t op; /* Base value used to get the actual opcode. */ +}; + + extern char lexeme[]; extern char *string[]; extern char *comment[]; @@ -94,6 +102,7 @@ enum token { TOK_CHAR, TOK_IND, TOK_IMM, + TOK_BREG, TOK_OPCODE, TOK_RS, TOK_OF, @@ -116,6 +125,7 @@ enum pre_token { PTOK_LBRACK, PTOK_RBRACK, PTOK_COMMA, + PTOK_B, PTOK_X, PTOK_Y, PTOK_S, @@ -139,95 +149,143 @@ enum expr { EXPR_NONE }; -static const uint8_t opcodes[OPNUM][10] = { - /* IMM ZM ZMX ZMY IND INDX INDY ABS REL IMPL*/ - [AAB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x02}, /* AAB */ - [ABA] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x22}, /* ABA */ - [ADC] = {0x01, 0x06, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x04, 0xFF, 0xFF}, /* ADC */ - [AND] = {0x21, 0x26, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x24, 0xFF, 0xFF}, /* AND */ - [ARB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF2}, /* ARB */ - [ASR] = {0xF1, 0xF6, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF4, 0xFF, 0xFF}, /* ASR */ - [BCC] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x80, 0xFF}, /* BCC */ - [BCS] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x70, 0xFF}, /* BCS */ - [BEQ] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x90, 0xFF}, /* BEQ */ - [BNE] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xA0, 0xFF}, /* BNE */ - [BNG] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x60, 0xFF}, /* BNG */ - [BPO] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x50, 0xFF}, /* BPO */ - [BRA] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xD0, 0xFF}, /* BRA */ - [BRK] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x68}, /* BRK */ - [BVC] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC0, 0xFF}, /* BVC */ - [BVS] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB0, 0xFF}, /* BVS */ - [CAB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB2}, /* CAB */ - [CLC] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x08}, /* CLC */ - [CLI] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x28}, /* CLI */ - [CLV] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x48}, /* CLV */ - [CMP] = {0xB1, 0xB6, 0xFF, 0xFF, 0x25, 0x7D, 0x7C, 0xB4, 0xFF, 0xFF}, /* CMP */ - [CPB] = {0x2A, 0x2D, 0xFF, 0xFF, 0x55, 0xAD, 0xAC, 0x2C, 0xFF, 0xFF}, /* CPB */ - [CPS] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00}, /* CPS */ - [CPX] = {0x3A, 0x3D, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x3C, 0xFF, 0xFF}, /* CPX */ - [CPY] = {0x4A, 0x4D, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x4C, 0xFF, 0xFF}, /* CPY */ - [DAB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xA2}, /* DAB */ - [DEB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC2}, /* DEB */ - [DEC] = {0xFF, 0x0D, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x0C, 0xFF, 0x0A}, /* DEC */ - [DEX] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x09}, /* DEX */ - [DEY] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x29}, /* DEY */ - [DIV] = {0xA1, 0xA6, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xA4, 0xFF, 0xFF}, /* DIV */ - [INB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xD2}, /* INB */ - [INC] = {0xFF, 0x1D, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x1C, 0xFF, 0x1A}, /* INC */ - [INX] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x19}, /* INX */ - [INY] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x39}, /* INY */ - [JMP] = {0xFF, 0x30, 0xFF, 0xFF, 0xB5, 0xFF, 0xFF, 0x10, 0xFF, 0xFF}, /* JMP */ - [JSR] = {0xFF, 0x40, 0xFF, 0xFF, 0xA5, 0xFF, 0xFF, 0x20, 0xFF, 0xFF}, /* JSR */ - [LDA] = {0xC1, 0xC6, 0xB8, 0x78, 0x05, 0x5D, 0x5C, 0xC4, 0xFF, 0xFF}, /* LDA */ - [LDB] = {0xD1, 0xD6, 0xD8, 0x98, 0x35, 0x8D, 0x8C, 0xD4, 0xFF, 0xFF}, /* LDB */ - [LDX] = {0xB9, 0xBD, 0xFF, 0xFF, 0x85, 0xFF, 0xFF, 0xBC, 0xFF, 0xFF}, /* LDX */ - [LDY] = {0xE1, 0xE6, 0xFF, 0xFF, 0x65, 0xFF, 0xFF, 0xE4, 0xFF, 0xFF}, /* LDY */ - [LLB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x52}, /* LLB */ - [LRB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x62}, /* LRB */ - [LSL] = {0x51, 0x56, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x54, 0xFF, 0xFF}, /* LSL */ - [LSR] = {0x61, 0x66, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x64, 0xFF, 0xFF}, /* LSR */ - [MAB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x92}, /* MAB */ - [MUL] = {0x91, 0x96, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x94, 0xFF, 0xFF}, /* MUL */ - [NOP] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xEA}, /* NOP */ - [OAB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x32}, /* OAB */ - [ORA] = {0x31, 0x36, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x34, 0xFF, 0xFF}, /* ORA */ - [PHA] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x79}, /* PHA */ - [PHB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x99}, /* PHB */ - [PHP] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x59}, /* PHP */ - [PHX] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xE9}, /* PHX */ - [PHY] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC9}, /* PHY */ - [PLA] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x89}, /* PLA */ - [PLB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xA9}, /* PLB */ - [PLP] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x69}, /* PLP */ - [PLX] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF9}, /* PLX */ - [PLY] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xD9}, /* PLY */ - [RLB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x72}, /* RLB */ - [ROL] = {0x71, 0x76, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x74, 0xFF, 0xFF}, /* ROL */ - [ROR] = {0x81, 0x86, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x84, 0xFF, 0xFF}, /* ROR */ - [RRB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x82}, /* RRB */ - [RTI] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0}, /* RTI */ - [RTS] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xE0}, /* RTS */ - [SAB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x12}, /* SAB */ - [SBC] = {0x11, 0x16, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x14, 0xFF, 0xFF}, /* SBC */ - [SEC] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x18}, /* SEC */ - [SEI] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x38}, /* SEI */ - [STA] = {0xFF, 0xCD, 0xC8, 0x88, 0x15, 0x6D, 0x6C, 0xCC, 0xFF, 0xFF}, /* STA */ - [STB] = {0xFF, 0xDD, 0xE8, 0xA8, 0x45, 0x9D, 0x9C, 0xDC, 0xFF, 0xFF}, /* STB */ - [STX] = {0xFF, 0xFD, 0xFF, 0xFF, 0x95, 0xFF, 0xFF, 0xFC, 0xFF, 0xFF}, /* STX */ - [STY] = {0xFF, 0xED, 0xFF, 0xFF, 0x75, 0xFF, 0xFF, 0xEC, 0xFF, 0xFF}, /* STY */ - [TAB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x5A}, /* TAB */ - [TAX] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x9A}, /* TAX */ - [TAY] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x7A}, /* TAY */ - [TBA] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x6A}, /* TBA */ - [TSX] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xDA}, /* TSX */ - [TXA] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xAA}, /* TXA */ - [TXS] = {0xFA, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}, /* TXS */ - [TXY] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xCA}, /* TXY */ - [TYA] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x8A}, /* TYA */ - [TYX] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xBA}, /* TYX */ - [WAI] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x58}, /* WAI */ - [XAB] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x42}, /* XAB */ - [XOR] = {0x41, 0x46, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x44, 0xFF, 0xFF} /* XOR */ +enum addrmode { + AM_IMM = (1 << 0), + AM_ZM = (1 << 1), + AM_ZMX = (1 << 2), + AM_ZMY = (1 << 3), + AM_IND = (1 << 4), + AM_INDX = (1 << 5), + AM_INDY = (1 << 6), + AM_ABS = (1 << 7), + AM_REL = (1 << 8), + AM_BREG = (1 << 9), + AM_IMPL = (1 << 10), + AM_INDX2 = (1 << 11), + AM_ZM2 = (1 << 12) +}; + +enum ind { + CMP_IND = 0, + CMP_IDY = 1, + CMP_IDX = 2, + CPB_IND = 3, + CPB_IDY = 4, + CPB_IDX = 5, + JMP_IND = 6, + JSR_IND = 7, + LDA_IND = 8, + LDA_IDY = 9, + LDB_IND = 10, + LDB_IDY = 11, + LDX_IND = 12, + LDY_IND = 13, + STA_IND = 14, + STA_IDY = 15, + STB_IND = 16, + STB_IDY = 17, + STX_IND = 18, + STY_IND = 19 +}; + +static const uint8_t ind_ops[20] = { + [CMP_IND] = 0x8C, + [CMP_IDY] = 0xF9, + [CMP_IDX] = 0xAA, + [CPB_IND] = 0x7C, + [CPB_IDY] = 0xFA, + [CPB_IDX] = 0xBA, + [JMP_IND] = 0xEC, + [JSR_IND] = 0xDC, + [LDA_IND] = 0xC4, + [LDA_IDY] = 0xD9, + [LDB_IND] = 0xE4, + [LDB_IDY] = 0xE9, + [LDX_IND] = 0xBC, + [LDY_IND] = 0xAC, + [STA_IND] = 0xD4, + [STA_IDY] = 0xCA, + [STB_IND] = 0xF4, + [STB_IDY] = 0xDA, + [STX_IND] = 0xCC, + [STY_IND] = 0x9C +}; + +static const instruction inst[OPNUM] = { + [ADC] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x01}, + [AND] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x41}, + [ASR] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x62}, + [BCC] = {(AM_REL), 0xA0}, + [BCS] = {(AM_REL), 0x90}, + [BEQ] = {(AM_REL), 0xB0}, + [BNE] = {(AM_REL), 0xC0}, + [BNG] = {(AM_REL), 0x80}, + [BPO] = {(AM_REL), 0x70}, + [BRA] = {(AM_REL), 0xF0}, + [BRK] = {(AM_IMPL), 0x69}, + [BVC] = {(AM_REL), 0xE0}, + [BVS] = {(AM_REL), 0xD0}, + [CLC] = {(AM_IMPL), 0x09}, + [CLI] = {(AM_IMPL), 0x29}, + [CLV] = {(AM_IMPL), 0x49}, + [CMP] = {(AM_IMM|AM_ZM|AM_IND|AM_INDY|AM_ABS|AM_BREG|AM_INDX2), 0x82}, + [CPB] = {(AM_IMM|AM_ZM|AM_IND|AM_INDY|AM_ABS|AM_INDX2), 0x04}, + [CPS] = {(AM_IMPL), 0x00}, + [CPX] = {(AM_IMM|AM_ZM|AM_IND|AM_ABS), 0x24}, + [CPY] = {(AM_IMM|AM_ZM|AM_IND|AM_ABS), 0x44}, + [DEB] = {(AM_IMPL), 0x99}, + [DEC] = {(AM_IMPL|AM_ZM|AM_ABS), 0x84}, + [DEX] = {(AM_IMPL), 0xB9}, + [DEY] = {(AM_IMPL), 0x79}, + [DIV] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x42}, + [INB] = {(AM_IMPL), 0xA9}, + [INC] = {(AM_IMPL|AM_ZM|AM_ABS), 0xA4}, + [INX] = {(AM_IMPL), 0xC9}, + [INY] = {(AM_IMPL), 0x89}, + [JMP] = {(AM_ABS|AM_IND|AM_ZM2), 0x00}, + [JSR] = {(AM_ABS|AM_IND|AM_ZM2), 0x20}, + [LDA] = {(AM_IMM|AM_ZM|AM_ZMX|AM_ZMY|AM_IND|AM_INDX|AM_INDY|AM_ABS), 0xC2}, + [LDB] = {(AM_IMM|AM_ZM|AM_ZMX|AM_ZMY|AM_IND|AM_INDX|AM_INDY|AM_ABS), 0xE2}, + [LDX] = {(AM_IMM|AM_ZM|AM_IND|AM_ABS), 0x64}, + [LDY] = {(AM_IMM|AM_ZM|AM_IND|AM_ABS), 0xA2}, + [LSL] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0xA1}, + [LSR] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0xC1}, + [MUL] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x22}, + [NOP] = {(AM_IMPL), 0xEA}, + [ORA] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x61}, + [PHA] = {(AM_IMPL), 0x8E}, + [PHB] = {(AM_IMPL), 0xAE}, + [PHP] = {(AM_IMPL), 0x6E}, + [PHX] = {(AM_IMPL), 0xEE}, + [PHY] = {(AM_IMPL), 0xCE}, + [PLA] = {(AM_IMPL), 0x9E}, + [PLB] = {(AM_IMPL), 0xBE}, + [PLP] = {(AM_IMPL), 0x7E}, + [PLX] = {(AM_IMPL), 0xFE}, + [PLY] = {(AM_IMPL), 0xDE}, + [ROL] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0xE1}, + [ROR] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x02}, + [RTI] = {(AM_IMPL), 0x60}, + [RTS] = {(AM_IMPL), 0x50}, + [SBC] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x21}, + [SEC] = {(AM_IMPL), 0x19}, + [SEI] = {(AM_IMPL), 0x39}, + [STA] = {(AM_ZM|AM_ZMX|AM_ZMY|AM_IND|AM_INDX|AM_INDY|AM_ABS), 0x28}, + [STB] = {(AM_ZM|AM_ZMX|AM_ZMY|AM_IND|AM_INDX|AM_INDY|AM_ABS), 0x48}, + [STX] = {(AM_ZM|AM_IND|AM_ABS), 0x68}, + [STY] = {(AM_ZM|AM_IND|AM_ABS), 0x08}, + [TAB] = {(AM_IMPL), 0x0A}, + [TAX] = {(AM_IMPL), 0x4A}, + [TAY] = {(AM_IMPL), 0x2A}, + [TBA] = {(AM_IMPL), 0x1A}, + [TSX] = {(AM_IMPL), 0x8A}, + [TXA] = {(AM_IMPL), 0x5A}, + [TXS] = {(AM_IMPL|AM_IMM), 0x9A}, + [TXY] = {(AM_IMPL), 0x7A}, + [TYA] = {(AM_IMPL), 0x3A}, + [TYX] = {(AM_IMPL), 0x6A}, + [WAI] = {(AM_IMPL), 0x59}, + [XOR] = {(AM_IMM|AM_ZM|AM_ABS|AM_BREG), 0x81} }; static const char *dir_t[7] = { @@ -247,7 +305,7 @@ static const char *rs_t[4] = { [3] = ".q" }; -static const char *lex_tok[18] = { +static const char *lex_tok[19] = { [TOK_DIR ] = "TOK_DIR", [TOK_LOCAL ] = "TOK_LOCAL", [TOK_LABEL ] = "TOK_LABEL", @@ -258,6 +316,7 @@ static const char *lex_tok[18] = { [TOK_CHAR ] = "TOK_CHAR", [TOK_IND ] = "TOK_IND", [TOK_IMM ] = "TOK_IMM", + [TOK_BREG ] = "TOK_BREG", [TOK_OPCODE ] = "TOK_OPCODE", [TOK_RS ] = "TOK_RS", [TOK_OF ] = "TOK_OF", @@ -268,7 +327,7 @@ static const char *lex_tok[18] = { [TOK_INCLUDE] = "TOK_INCLUDE" }; -static const char *adrmode[10] = { +static const char *adrmode[11] = { [IMM ] = "IMM", [ZM ] = "ZM", [ZMX ] = "ZMX", @@ -278,15 +337,13 @@ static const char *adrmode[10] = { [INDY] = "INDY", [ABS ] = "ABS", [REL ] = "REL", + [BREG] = "BREG", [IMPL] = "IMPL" }; static const char *mne[OPNUM] = { - [AAB] = "AAB", - [ABA] = "ABA", [ADC] = "ADC", [AND] = "AND", - [ARB] = "ARB", [ASR] = "ASR", [BCC] = "BCC", [BCS] = "BCS", @@ -298,7 +355,6 @@ static const char *mne[OPNUM] = { [BRK] = "BRK", [BVC] = "BVC", [BVS] = "BVS", - [CAB] = "CAB", [CLC] = "CLC", [CLI] = "CLI", [CLV] = "CLV", @@ -307,7 +363,6 @@ static const char *mne[OPNUM] = { [CPS] = "CPS", [CPX] = "CPX", [CPY] = "CPY", - [DAB] = "DAB", [DEB] = "DEB", [DEC] = "DEC", [DEX] = "DEX", @@ -323,14 +378,10 @@ static const char *mne[OPNUM] = { [LDB] = "LDB", [LDX] = "LDX", [LDY] = "LDY", - [LLB] = "LLB", - [LRB] = "LRB", [LSL] = "LSL", [LSR] = "LSR", - [MAB] = "MAB", [MUL] = "MUL", [NOP] = "NOP", - [OAB] = "OAB", [ORA] = "ORA", [PHA] = "PHA", [PHB] = "PHB", @@ -342,13 +393,10 @@ static const char *mne[OPNUM] = { [PLP] = "PLP", [PLX] = "PLX", [PLY] = "PLY", - [RLB] = "RLB", [ROL] = "ROL", [ROR] = "ROR", - [RRB] = "RRB", [RTI] = "RTI", [RTS] = "RTS", - [SAB] = "SAB", [SBC] = "SBC", [SEC] = "SEC", [SEI] = "SEI", @@ -367,16 +415,12 @@ static const char *mne[OPNUM] = { [TYA] = "TYA", [TYX] = "TYX", [WAI] = "WAI", - [XAB] = "XAB", [XOR] = "XOR" }; static const char *instdesc[OPNUM] = { - [AAB] = "Add Accumulator, with B, carry if needed.", - [ABA] = "Bitwise AND Accumulator, with B.", [ADC] = "ADd accumulator, with operand, Carry if needed.", [AND] = "Bitwise AND accumulator, with operand.", - [ARB] = "Arithmetic shift Right accumulator, with B.", [ASR] = "Arithmetic Shift Right accumulator, with operand.", [BCC] = "Branch if the Carry flag has been Cleared.", [BCS] = "Branch if the Carry flag is Set.", @@ -388,7 +432,6 @@ static const char *instdesc[OPNUM] = { [BRK] = "BReaKpoint", [BVC] = "Branch if the oVerflow flag has been Cleared.", [BVS] = "Branch if the oVerflow flag is Set.", - [CAB] = "Compare Accumulator, with B.", [CLC] = "CLear the Carry flag.", [CLI] = "CLear the Interrupt flag.", [CLV] = "CLear the oVerflow flag.", @@ -397,7 +440,6 @@ static const char *instdesc[OPNUM] = { [CPS] = "Clears the Processor Status register.", [CPX] = "ComPare the X register, with operand.", [CPY] = "ComPare the Y register, with operand.", - [DAB] = "Divide Accumulator, with B, and put the remainder into the X register.", [DEB] = "DEcrement the B register.", [DEC] = "DECrement accumulator, or memory.", [DEX] = "DEcrement the X register.", @@ -413,14 +455,10 @@ static const char *instdesc[OPNUM] = { [LDB] = "LoaD the value from the operand, to the B register.", [LDX] = "LoaD the value from the operand, to the X register.", [LDY] = "LoaD the value from the operand, to the Y register.", - [LLB] = "Logical Shift Left accumulator, with B.", - [LRB] = "Logical Shift Right accumulator, with B.", [LSL] = "Logical Shift Left accumulator, with operand.", [LSR] = "Logical Shift Right accumulator, with operand.", - [MAB] = "Multiply Accumulator, with B.", [MUL] = "MULtiply accumulator, with operand.", [NOP] = "NO oPeration", - [OAB] = "Bitwise OR Accumulator, with B.", [ORA] = "Bitwise OR Accumulator, with operand.", [PHA] = "PusH the number of bytes specified, from the Accumulator to the stack.", [PHB] = "PusH the number of bytes specified, from the B register to the stack.", @@ -432,13 +470,10 @@ static const char *instdesc[OPNUM] = { [PLP] = "PuLl the number of bytes specified, from the stack, to the Processor status register.", [PLX] = "PuLl the number of bytes specified, from the stack, to the X register.", [PLY] = "PuLl the number of bytes specified, from the stack, to the Y register.", - [RLB] = "Rotate Left accumulator, with B.", [ROL] = "ROtate Left accumulator, with operand.", [ROR] = "ROtate Right accumulator, with operand.", - [RRB] = "Rotate Right accumulator, with B.", [RTI] = "ReTurn from an Interrupt.", [RTS] = "ReTurn from a Subroutine.", - [SAB] = "Subtract Accumulator, with B, carry if needed.", [SBC] = "SuBtract accumulator, with operand, Carry if needed", [SEC] = "SEt the Carry flag.", [SEI] = "SEt the Interrupt flag.", @@ -457,7 +492,6 @@ static const char *instdesc[OPNUM] = { [TYA] = "Transfer the value from the Y register, to the Accumulator.", [TYX] = "Transfer the value from the Y register, to the X register.", [WAI] = "WAIt for an interrupt", - [XAB] = "Bitwise XOR Accumulator, with B.", [XOR] = "Bitwise XOR Accumulator, with operand." }; @@ -14,7 +14,7 @@ uint8_t isexpr(uint8_t type, uint8_t dbg) { } } -uint8_t get_rs(token *t, uint8_t inst, uint8_t dbg) { +uint8_t get_rs(token *t, uint8_t dbg) { if (t->id == TOK_RS) { return t->type; } else { @@ -30,6 +30,31 @@ uint8_t get_of(token *t, uint8_t dbg) { } } +uint8_t get_ind(uint8_t mne, uint8_t am, uint8_t dbg) { + uint8_t base_idx = 0; + uint8_t offset = 0; + switch (mne) { + case CMP: base_idx = CMP_IND; break; + case CPB: base_idx = CPB_IND; break; + case JMP: base_idx = JMP_IND; break; + case JSR: base_idx = JSR_IND; break; + case LDA: base_idx = LDA_IND; break; + case LDB: base_idx = LDB_IND; break; + case LDX: base_idx = LDX_IND; break; + case LDY: base_idx = LDY_IND; break; + case STA: base_idx = STA_IND; break; + case STB: base_idx = STB_IND; break; + case STX: base_idx = STX_IND; break; + case STY: base_idx = STY_IND; break; + } + switch (am) { + case IND : offset = 0; break; + case INDY: offset += 1; break; + case INDX: offset += 2; break; + } + return base_idx + offset; +} + uint64_t get_val(token *t, uint64_t addr, uint8_t size, uint8_t dbg) { uint64_t value = 0; uint64_t tmp_val = 0; @@ -172,9 +197,10 @@ uint64_t handle_directive(token *t, bytecount *bc, uint8_t isasm, uint64_t addre uint64_t handle_opcode(token *t, bytecount *bc, uint8_t isasm, uint64_t address, uint8_t dbg) { union reg val; uint8_t opsize; - uint8_t inst; + uint8_t instr; uint8_t opcode; uint8_t type; + uint16_t am = 0; uint8_t tmp = 0; uint8_t prefix = 0; uint8_t rs = 0; @@ -183,7 +209,7 @@ uint64_t handle_opcode(token *t, bytecount *bc, uint8_t isasm, uint64_t address, for (; t; t = t->next) { if (t->id == TOK_OPCODE) { - inst = t->byte; + instr = t->byte; type = t->type; } else { break; @@ -192,7 +218,7 @@ uint64_t handle_opcode(token *t, bytecount *bc, uint8_t isasm, uint64_t address, opsize = 1; opcode = 0; if (t->next) { - rs = get_rs(t->next, inst, dbg); + rs = get_rs(t->next, dbg); t = (rs != 0xFF) ? t->next : t; if (t->next) { of = get_of(t->next, dbg); @@ -204,12 +230,13 @@ uint64_t handle_opcode(token *t, bytecount *bc, uint8_t isasm, uint64_t address, tmp_prefix |= (of != 0xFF) ? (of << 2) : tmp_prefix; } prefix = (tmp_prefix) ? ((tmp_prefix << 4) | 3) : 0; - uint8_t isincdec = (inst == INC || inst == DEC); + uint8_t isincdec = (instr == INC || instr == DEC); uint8_t isimplied = (!t->next || (t->next->id == TOK_COMMENT)); - if (opcodes[inst][IMPL] != 0xFF && isimplied) { + am = inst[instr].am; + if ((am & AM_IMPL) && isimplied) { type = IMPL; } else { - if (opcodes[inst][REL] != 0xFF) { + if (inst[instr].am & AM_REL) { type = REL; } if (t->next) { @@ -217,78 +244,85 @@ uint64_t handle_opcode(token *t, bytecount *bc, uint8_t isasm, uint64_t address, } val.u64 = get_val(t, address, (rs != 0xFF) ? rs : 0, dbg); } - opcode = opcodes[inst][type]; /* Special case for TXS. */ - if (inst == TXS) { + if (instr == TXS) { if (type == IMM) { rs = 1; } else { type = IMPL; - opcode = opcodes[inst][IMM]; } } + opcode = inst[instr].op; uint64_t saveaddr = address; uint64_t max_val = 0; uint8_t i = 0; uint8_t j = 1; switch (type) { + case BREG: case IMPL: - if (prefix) { + if (instr == CPS) { + rs = 0; + } + if ((am & (AM_IMPL|AM_BREG))) { + if ((am & AM_IMPL) && (prefix)) { + if (isasm) { + addr[address] = prefix; + } + address++; + bc->progsize++; + } if (isasm) { - addr[address] = prefix; + addr[address] = (am & AM_BREG) ? opcode+0x14 : opcode; } address++; bc->progsize++; } - if (isasm) { - addr[address] = opcode; - } - address++; - bc->progsize++; break; case REL: case IMM: - rs = (rs != 0xFF) ? rs : 0; - tmp = (1 << rs); - if (type == REL) { - uint64_t max_sign = 0; - uint8_t offset = 1; - uint64_t tmp_val; - tmp_val = val.u64; - offset += (prefix != 0); - tmp_val -= offset+tmp; - tmp_val -= address; - switch (rs) { - default: max_sign = (int8_t )(1 << 7); break; - case 1 : max_sign = (int16_t)(1 << 15); break; - case 2 : max_sign = (int32_t)(1 << 31); break; - case 3 : max_sign = (int64_t)((uint64_t)1 << 63); break; - } - if ((int64_t)tmp_val > ~(int64_t)max_sign || (int64_t)tmp_val < (int64_t)max_sign) { - offset += (!rs); - rs += (rs <= 3); - tmp = (1 << rs); + if (am & (AM_IMM|AM_REL)) { + rs = (rs != 0xFF) ? rs : 0; + tmp = (1 << rs); + if (type == REL) { + uint64_t max_sign = 0; + uint8_t offset = 1; + uint64_t tmp_val; tmp_val = val.u64; + offset += (prefix != 0); tmp_val -= offset+tmp; tmp_val -= address; - prefix = ((rs << 4) | 3); + switch (rs) { + default: max_sign = (int8_t )(1 << 7); break; + case 1 : max_sign = (int16_t)(1 << 15); break; + case 2 : max_sign = (int32_t)(1 << 31); break; + case 3 : max_sign = (int64_t)((uint64_t)1 << 63); break; + } + if ((int64_t)tmp_val > ~(int64_t)max_sign || (int64_t)tmp_val < (int64_t)max_sign) { + offset += (!rs); + rs += (rs <= 3); + tmp = (1 << rs); + tmp_val = val.u64; + tmp_val -= offset+tmp; + tmp_val -= address; + prefix = ((rs << 4) | 3); + } + val.u64 = tmp_val; + } + if (prefix) { + if (isasm) { + addr[address] = prefix; + } + address++; + bc->progsize++; } - val.u64 = tmp_val; - } - if (prefix) { if (isasm) { - addr[address] = prefix; + addr[address] = opcode; } address++; bc->progsize++; - } - if (isasm) { - addr[address] = opcode; - } - address++; - bc->progsize++; - if (isasm) { - setreg(addr, +, address, val.u8, +, 0, tmp-1); + if (isasm) { + setreg(addr, +, address, val.u8, +, 0, tmp-1); + } } break; default: @@ -325,32 +359,69 @@ uint64_t handle_opcode(token *t, bytecount *bc, uint8_t isasm, uint64_t address, } prefix |= amp[opsize-1]; } - if (prefix) { + if (am & (AM_ZM|AM_ZMX|AM_ZMY|AM_IND|AM_INDX|AM_INDY|AM_ABS|AM_INDX2|AM_ZM2)) { + switch (type) { + case ZM: + if (am & AM_ZM) { + opcode += 0x04; + } else if (am & AM_ZM2) { + opcode += 0x20; + } + break; + case ZMX: + if (am & AM_ZMX) { + opcode += 0x06; + } + break; + case ZMY: + if (am & AM_ZMY) { + opcode += 0x14; + } + break; + case ABS: + if (am & AM_ABS) { + opcode += 0x10; + } + break; + case INDX: + if (am & AM_INDX) { + opcode += 0x16; + break; + } + /* Falls Through. */ + case IND: + case INDY: + if (am & (AM_IND|AM_INDY|AM_INDX2)) { + opcode = ind_ops[get_ind(instr, type, dbg)]; + } + break; + } + if (prefix) { + if (isasm) { + addr[address] = prefix; + } + address++; + bc->progsize++; + } if (isasm) { - addr[address] = prefix; + addr[address] = opcode; } address++; bc->progsize++; - } - opcode = opcodes[inst][type]; - if (isasm) { - addr[address] = opcode; - } - address++; - bc->progsize++; - if (isasm) { - switch (opsize-1) { - case 7: addr[address+7] = val.u8[7]; - case 6: addr[address+6] = val.u8[6]; - case 5: addr[address+5] = val.u8[5]; - case 4: addr[address+4] = val.u8[4]; - case 3: addr[address+3] = val.u8[3]; - case 2: addr[address+2] = val.u8[2]; - case 1: addr[address+1] = val.u8[1]; - case 0: addr[address ] = val.u8[0]; + if (isasm) { + switch (opsize-1) { + case 7: addr[address+7] = val.u8[7]; + case 6: addr[address+6] = val.u8[6]; + case 5: addr[address+5] = val.u8[5]; + case 4: addr[address+4] = val.u8[4]; + case 3: addr[address+3] = val.u8[3]; + case 2: addr[address+2] = val.u8[2]; + case 1: addr[address+1] = val.u8[1]; + case 0: addr[address ] = val.u8[0]; + } } + tmp = opsize; } - tmp = opsize; break; } address += tmp; @@ -65,7 +65,10 @@ void disasm(struct sux *cpu, uint64_t *operands, uint8_t lines, uint8_t opcode, } switch (optype[opcode]) { - case IMPL: wprintw(scr, "%s%s" , opname[opcode], postfix); break; + case BREG: + case IMPL: + wprintw(scr, "%s%s" , opname[opcode], postfix); + break; case IMM: switch ((1 << ((prefix >> 4) & 3))) { case 1: wprintw(scr, "%s #$%02X" , op, value); break; @@ -1,171 +1,171 @@ static const char *opname[0x100] = { [CPS_IMP ] = "CPS", [ADC_IMM ] = "ADC #", - [AAB_IMP ] = "AAB", - [ADC_AB ] = "ADC a", - [LDA_IN ] = "LDA ind", + [ROR_IMM ] = "ROR #", + [CPB_IMM ] = "CPB #", [ADC_Z ] = "ADC zm", + [ROR_Z ] = "ROR zm", + [CPB_Z ] = "CPB zm", [CLC_IMP ] = "CLC", - [DEX_IMP ] = "DEX", - [DEC_IMP ] = "DEC", - [DEC_AB ] = "DEC a", - [DEC_Z ] = "DEC zm", + [TAB_IMP ] = "TAB", + [STY_Z ] = "STY zm", [JMP_AB ] = "JMP a", + [ADC_AB ] = "ADC a", + [ROR_AB ] = "ROR a", + [CPB_AB ] = "CPB a", + [ADC_B ] = "ADC B", + [ROR_B ] = "ROR B", + [STY_AB ] = "STY a", + [SEC_IMP ] = "SEC", + [TBA_IMP ] = "TBA", + [JMP_Z ] = "JMP zm", [SBC_IMM ] = "SBC #", - [SAB_IMP ] = "SAB", - [SBC_AB ] = "SBC a", - [STA_IN ] = "STA ind", + [MUL_IMM ] = "MUL #", + [CPX_IMM ] = "CPX #", [SBC_Z ] = "SBC zm", - [SEC_IMP ] = "SEC", - [INX_IMP ] = "INX", - [INC_IMP ] = "INC", - [INC_AB ] = "INC a", - [INC_Z ] = "INC zm", + [MUL_Z ] = "MUL zm", + [CPX_Z ] = "CPX zm", + [CLI_IMP ] = "CLI", + [TAY_IMP ] = "TAY", + [STA_Z ] = "STA zm", + [STA_ZX ] = "STA zmx", [JSR_AB ] = "JSR a", + [SBC_AB ] = "SBC a", + [MUL_AB ] = "MUL a", + [CPX_AB ] = "CPX a", + [SBC_B ] = "SBC B", + [MUL_B ] = "MUL B", + [STA_AB ] = "STA a", + [SEI_IMP ] = "SEI", + [TYA_IMP ] = "TYA", + [STA_ZY ] = "STA zmy", + [STA_IX ] = "STA indx", + [JSR_Z ] = "JSR zm", [AND_IMM ] = "AND #", - [ABA_IMP ] = "ABA", - [AND_AB ] = "AND a", - [CMP_IN ] = "CMP ind", + [DIV_IMM ] = "DIV #", + [CPY_IMM ] = "CPY #", [AND_Z ] = "AND zm", - [CLI_IMP ] = "CLI", - [DEY_IMP ] = "DEY", - [CPB_IMM ] = "CPB #", - [CPB_AB ] = "CPB a", - [CPB_Z ] = "CPB zm", - [JMP_Z ] = "JMP zm", - [ORA_IMM ] = "ORA #", - [OAB_IMP ] = "OAB", - [ORA_AB ] = "ORA a", - [LDB_IN ] = "LDB ind", - [ORA_Z ] = "ORA zm", - [SEI_IMP ] = "SEI", - [INY_IMP ] = "INY", - [CPX_IMM ] = "CPX #", - [CPX_AB ] = "CPX a", + [DIV_Z ] = "DIV zm", [CPY_Z ] = "CPY zm", - [JSR_Z ] = "JSR zm", - [XOR_IMM ] = "XOR #", - [XAB_IMP ] = "XAB", - [XOR_AB ] = "XOR a", - [STB_IN ] = "STB ind", - [XOR_Z ] = "XOR zm", [CLV_IMP ] = "CLV", - [CPY_IMM ] = "CPY #", + [TAX_IMP ] = "TAX", + [STB_Z ] = "STB zm", + [STB_ZX ] = "STB zmx", + [RTS_IMP ] = "RTS", + [AND_AB ] = "AND a", + [DIV_AB ] = "DIV a", [CPY_AB ] = "CPY a", - [CPX_Z ] = "CPX zm", - [BPO_REL ] = "BPO rel", - [LSL_IMM ] = "LSL #", - [LLB_IMP ] = "LLB", - [LSL_AB ] = "LSL a", - [CPB_IN ] = "CPB ind", - [LSL_Z ] = "LSL zm", + [AND_B ] = "AND B", + [DIV_B ] = "DIV B", + [STB_AB ] = "STB a", [WAI_IMP ] = "WAI", - [PHP_IMP ] = "PHP", - [TAB_IMP ] = "TAB", - [LDA_IY ] = "LDA indy", - [LDA_IX ] = "LDA indx", - [BNG_REL ] = "BNG rel", - [LSR_IMM ] = "LSR #", - [LRB_IMP ] = "LRB", - [LSR_AB ] = "LSR a", - [LDY_IN ] = "LDY ind", - [LSR_Z ] = "LSR zm", + [TXA_IMP ] = "TXA", + [STB_ZY ] = "STB zmy", + [STB_IX ] = "STB indx", + [RTI_IMP ] = "RTI", + [ORA_IMM ] = "ORA #", + [ASR_IMM ] = "ASR #", + [LDX_IMM ] = "LDX #", + [ORA_Z ] = "ORA zm", + [ASR_Z ] = "ASR zm", + [LDX_Z ] = "LDX zm", [BRK_IMP ] = "BRK", + [TYX_IMP ] = "TYX", + [STX_Z ] = "STX zm", + [PHP_IMP ] = "PHP", + [BPO_REL ] = "BPO rel", + [ORA_AB ] = "ORA a", + [ASR_AB ] = "ASR a", + [LDX_AB ] = "LDX a", + [ORA_B ] = "ORA B", + [ASR_B ] = "ASR B", + [STX_AB ] = "STX a", + [DEY_IMP ] = "DEY", + [TXY_IMP ] = "TXY", + [CPB_IN ] = "CPB ind", [PLP_IMP ] = "PLP", - [TBA_IMP ] = "TBA", - [STA_IY ] = "STA indy", - [STA_IX ] = "STA indx", + [BNG_REL ] = "BNG rel", + [XOR_IMM ] = "XOR #", + [CMP_IMM ] = "CMP #", + [DEC_IMP ] = "DEC", + [XOR_Z ] = "XOR zm", + [CMP_Z ] = "CMP zm", + [DEC_Z ] = "DEC zm", + [INY_IMP ] = "INY", + [TSX_IMP ] = "TSX", + [CMP_IN ] = "CMP ind", + [PHA_IMP ] = "PHA", [BCS_REL ] = "BCS rel", - [ROL_IMM ] = "ROL #", - [RLB_IMP ] = "RLB", - [ROL_AB ] = "ROL a", + [XOR_AB ] = "XOR a", + [CMP_AB ] = "CMP a", + [DEC_AB ] = "DEC a", + [XOR_B ] = "XOR B", + [CMP_B ] = "CMP B", + [DEB_IMP ] = "DEB", + [TXS_IMM ] = "TXS #", [STY_IN ] = "STY ind", - [ROL_Z ] = "ROL zm", - [LDA_ZY ] = "LDA zmy", - [PHA_IMP ] = "PHA", - [TAY_IMP ] = "TAY", - [CMP_IY ] = "CMP indy", - [CMP_IX ] = "CMP indx", - [BCC_REL ] = "BCC rel", - [ROR_IMM ] = "ROR #", - [RRB_IMP ] = "RRB", - [ROR_AB ] = "ROR a", - [LDX_IN ] = "LDX ind", - [ROR_Z ] = "ROR zm", - [STA_ZY ] = "STA zmy", [PLA_IMP ] = "PLA", - [TYA_IMP ] = "TYA", - [LDB_IY ] = "LDB indy", - [LDB_IX ] = "LDB indx", - [BEQ_REL ] = "BEQ rel", - [MUL_IMM ] = "MUL #", - [MAB_IMP ] = "MAB", - [MUL_AB ] = "MUL a", - [STX_IN ] = "STX ind", - [MUL_Z ] = "MUL zm", - [LDB_ZY ] = "LDB zmy", + [BCC_REL ] = "BCC rel", + [LSL_IMM ] = "LSL #", + [LDY_IMM ] = "LDY #", + [INC_IMP ] = "INC", + [LSL_Z ] = "LSL zm", + [LDY_Z ] = "LDY zm", + [INC_Z ] = "INC zm", + [INB_IMP ] = "INB", + [CMP_IX ] = "CMP indx", + [LDY_IN ] = "LDY ind", [PHB_IMP ] = "PHB", - [TAX_IMP ] = "TAX", - [STB_IY ] = "STB indy", - [STB_IX ] = "STB indx", - [BNE_REL ] = "BNE rel", - [DIV_IMM ] = "DIV #", - [DAB_IMP ] = "DAB", - [DIV_AB ] = "DIV a", - [JSR_IN ] = "JSR ind", - [DIV_Z ] = "DIV zm", - [STB_ZY ] = "STB zmy", - [PLB_IMP ] = "PLB", - [TXA_IMP ] = "TXA", - [CPB_IY ] = "CPB indy", + [BEQ_REL ] = "BEQ rel", + [LSL_AB ] = "LSL a", + [LDY_AB ] = "LDY a", + [INC_AB ] = "INC a", + [LSL_B ] = "LSL B", + [DEX_IMP ] = "DEX", [CPB_IX ] = "CPB indx", - [BVS_REL ] = "BVS rel", - [CMP_IMM ] = "CMP #", - [CAB_IMP ] = "CAB", - [CMP_AB ] = "CMP a", - [JMP_IN ] = "JMP ind", - [CMP_Z ] = "CMP zm", - [LDA_ZX ] = "LDA zmx", - [LDX_IMM ] = "LDX #", - [TYX_IMP ] = "TYX", - [LDX_AB ] = "LDX a", - [LDX_Z ] = "LDX zm", - [BVC_REL ] = "BVC rel", + [LDX_IN ] = "LDX ind", + [PLB_IMP ] = "PLB", + [BNE_REL ] = "BNE rel", + [LSR_IMM ] = "LSR #", [LDA_IMM ] = "LDA #", - [DEB_IMP ] = "DEB", - [LDA_AB ] = "LDA a", + [LDA_IN ] = "LDA ind", + [LSR_Z ] = "LSR zm", [LDA_Z ] = "LDA zm", - [STA_ZX ] = "STA zmx", + [LDA_ZX ] = "LDA zmx", + [INX_IMP ] = "INX", + [STA_IY ] = "STA indy", + [STX_IN ] = "STX ind", [PHY_IMP ] = "PHY", - [TXY_IMP ] = "TXY", - [STA_AB ] = "STA a", - [STA_Z ] = "STA zm", - [BRA_REL ] = "BRA rel", + [BVS_REL ] = "BVS rel", + [LSR_AB ] = "LSR a", + [LDA_AB ] = "LDA a", + [STA_IN ] = "STA ind", + [LSR_B ] = "LSR B", + [LDA_ZY ] = "LDA zmy", + [LDA_IX ] = "LDA indx", + [LDA_IY ] = "LDA indy", + [STB_IY ] = "STB indy", + [JSR_IN ] = "JSR ind", + [PLY_IMP ] = "PLY", + [BVC_REL ] = "BVC rel", + [ROL_IMM ] = "ROL #", [LDB_IMM ] = "LDB #", - [INB_IMP ] = "INB", - [LDB_AB ] = "LDB a", + [LDB_IN ] = "LDB ind", + [ROL_Z ] = "ROL zm", [LDB_Z ] = "LDB zm", [LDB_ZX ] = "LDB zmx", - [PLY_IMP ] = "PLY", - [TSX_IMP ] = "TSX", - [STB_AB ] = "STB a", - [STB_Z ] = "STB zm", - [RTS_IMP ] = "RTS", - [LDY_IMM ] = "LDY #", - [LDY_AB ] = "LDY a", - [LDY_Z ] = "LDY zm", - [STB_ZX ] = "STB zmx", - [PHX_IMP ] = "PHX", + [LDB_IY ] = "LDB indy", [NOP_IMP ] = "NOP", - [STY_AB ] = "STY a", - [STY_Z ] = "STY zm", - [RTI_IMP ] = "RTI", - [ASR_IMM ] = "ASR #", - [ARB_IMP ] = "ARB", - [ASR_AB ] = "ASR a", - [ASR_Z ] = "ASR zm", - [PLX_IMP ] = "PLX", - [TXS_IMM ] = "TXS #", - [STX_AB ] = "STX a", - [STX_Z ] = "STX zm" + [JMP_IN ] = "JMP ind", + [PHX_IMP ] = "PHX", + [BRA_REL ] = "BRA rel", + [ROL_AB ] = "ROL a", + [LDB_AB ] = "LDB a", + [STB_IN ] = "STB ind", + [ROL_B ] = "ROL B", + [LDB_ZY ] = "LDB zmy", + [LDB_IX ] = "LDB indx", + [CMP_IY ] = "CMP indy", + [CPB_IY ] = "CPB indy", + [PLX_IMP ] = "PLX" }; @@ -9,6 +9,7 @@ enum am { INDY, /* Indirect Indexed. */ ABS, /* Absolute. */ REL, /* Relative to Program Counter. */ + BREG, /* B Register. */ IMPL, /* Implied. */ /* Part of Base Extension. */ ABSX, /* Absolute, Indexed with X. */ @@ -23,265 +24,252 @@ enum am { }; enum mne { - AAB = 0, - ABA = 1, - ADC = 2, - AND = 3, - ARB = 4, - ASR = 5, - BCC = 6, - BCS = 7, - BEQ = 8, - BNE = 9, - BNG = 10, - BPO = 11, - BRA = 12, - BRK = 13, - BVC = 14, - BVS = 15, - CAB = 16, - CLC = 17, - CLI = 18, - CLV = 19, - CMP = 20, - CPB = 21, - CPS = 22, - CPX = 23, - CPY = 24, - DAB = 25, - DEB = 26, - DEC = 27, - DEX = 28, - DEY = 29, - DIV = 30, - INB = 31, - INC = 32, - INX = 33, - INY = 34, - JMP = 35, - JSR = 36, - LDA = 37, - LDB = 38, - LDX = 39, - LDY = 40, - LLB = 41, - LRB = 42, - LSL = 43, - LSR = 44, - MAB = 45, - MUL = 46, - NOP = 47, - OAB = 48, - ORA = 49, - PHA = 50, - PHB = 51, - PHP = 52, - PHX = 53, - PHY = 54, - PLA = 55, - PLB = 56, - PLP = 57, - PLX = 58, - PLY = 59, - RLB = 60, - ROL = 61, - ROR = 62, - RRB = 63, - RTI = 64, - RTS = 65, - SAB = 66, - SBC = 67, - SEC = 68, - SEI = 69, - STA = 70, - STB = 71, - STX = 72, - STY = 73, - TAB = 74, - TAX = 75, - TAY = 76, - TBA = 77, - TSX = 78, - TXA = 79, - TXS = 80, - TXY = 81, - TYA = 82, - TYX = 83, - WAI = 84, - XAB = 85, - XOR = 86 + ADC, + AND, + ASR, + BCC, + BCS, + BEQ, + BNE, + BNG, + BPO, + BRA, + BRK, + BVC, + BVS, + CLC, + CLI, + CLV, + CMP, + CPB, + CPS, + CPX, + CPY, + DEB, + DEC, + DEX, + DEY, + DIV, + INB, + INC, + INX, + INY, + JMP, + JSR, + LDA, + LDB, + LDX, + LDY, + LSL, + LSR, + MUL, + NOP, + ORA, + PHA, + PHB, + PHP, + PHX, + PHY, + PLA, + PLB, + PLP, + PLX, + PLY, + ROL, + ROR, + RTI, + RTS, + SBC, + SEC, + SEI, + STA, + STB, + STX, + STY, + TAB, + TAX, + TAY, + TBA, + TSX, + TXA, + TXS, + TXY, + TYA, + TYX, + WAI, + XOR }; enum base_isa { CPS_IMP = 0x00, /* Clear Processor Status. */ ADC_IMM = 0x01, /* ADd with Carry. */ - AAB_IMP = 0x02, /* Add Accumulator with carry by B register. */ - ADC_AB = 0x04, /* ADC Absolute. */ - LDA_IN = 0x05, /* LDA Indirect */ - ADC_Z = 0x06, /* ADC Zero Matrix. */ - CLC_IMP = 0x08, /* CLear Carry flag. */ - DEX_IMP = 0x09, /* DEcrement X register. */ - DEC_IMP = 0x0A, /* DECrement accumulator. */ - DEC_AB = 0x0C, /* DEC Absolute. */ - DEC_Z = 0x0D, /* DEC Zero Matrix. */ + ROR_IMM = 0x02, /* ROtate Right. */ + CPB_IMM = 0x04, /* ComPare B register. */ + ADC_Z = 0x05, /* ADC Zero Matrix. */ + ROR_Z = 0x06, /* ROR Zero Matrix. */ + CPB_Z = 0x08, /* CPB Zero Matrix. */ + CLC_IMP = 0x09, /* CLear Carry flag. */ + TAB_IMP = 0x0A, /* Transfer Accumulator to B. */ + STY_Z = 0x0C, /* STore Y register. */ JMP_AB = 0x10, /* JMP Absolute. */ - SBC_IMM = 0x11, /* SuBtract with Carry. */ - SAB_IMP = 0x12, /* Subtract Accumulator with carry by B register. */ - SBC_AB = 0x14, /* SBC Absolute. */ - STA_IN = 0x15, /* STA Indirect */ - SBC_Z = 0x16, /* SBC Zero Matrix. */ - SEC_IMP = 0x18, /* SEt Carry flag. */ - INX_IMP = 0x19, /* INcrement X register. */ - INC_IMP = 0x1A, /* INCrement accumulator. */ - INC_AB = 0x1C, /* INC Absolute. */ - INC_Z = 0x1D, /* INC Zero Matrix. */ - JSR_AB = 0x20, /* JSR Absolute. */ - AND_IMM = 0x21, /* bitwise AND with accumulator. */ - ABA_IMP = 0x22, /* bitwise And with Accumulator, and B register. */ - AND_AB = 0x24, /* AND Absolute. */ - CMP_IN = 0x25, /* CMP Indirect */ - AND_Z = 0x26, /* AND Zero Matrix. */ - CLI_IMP = 0x28, /* CLear Interupt flag. */ - DEY_IMP = 0x29, /* DEcrement Y register. */ - CPB_IMM = 0x2A, /* ComPare B register. */ - CPB_AB = 0x2C, /* CPB Absolute. */ - CPB_Z = 0x2D, /* CPB Zero Matrix. */ - JMP_Z = 0x30, /* JuMP to memory location. */ - ORA_IMM = 0x31, /* bitwise OR with Accumulator. */ - OAB_IMP = 0x32, /* bitwise Or with Accumulator, and B register. */ - ORA_AB = 0x34, /* ORA Absolute. */ - LDB_IN = 0x35, /* LDB Indirect */ - ORA_Z = 0x36, /* ORA Zero Matrix. */ - SEI_IMP = 0x38, /* SEt Interupt flag. */ - INY_IMP = 0x39, /* INcrement Y register. */ - CPX_IMM = 0x3A, /* ComPare X register. */ - CPX_AB = 0x3C, /* CPX Absolute. */ - CPX_Z = 0x3D, /* CPX Zero Matrix. */ + ADC_AB = 0x11, /* ADC Absolute. */ + ROR_AB = 0x12, /* ROR Absolute. */ + CPB_AB = 0x14, /* CPB Absolute. */ + ADC_B = 0x15, /* ADC B Register. */ + ROR_B = 0x16, /* ROR B Register. */ + STY_AB = 0x18, /* STY Absolute. */ + SEC_IMP = 0x19, /* SEt Carry flag. */ + TBA_IMP = 0x1A, /* Transfer B to Accumulator. */ + JMP_Z = 0x20, /* JuMP to memory location. */ + SBC_IMM = 0x21, /* SuBtract with Carry. */ + MUL_IMM = 0x22, /* MULtiply accumulator. */ + CPX_IMM = 0x24, /* ComPare X register. */ + SBC_Z = 0x25, /* SBC Zero Matrix. */ + MUL_Z = 0x26, /* MUL Zero Matrix. */ + CPX_Z = 0x28, /* CPX Zero Matrix. */ + CLI_IMP = 0x29, /* CLear Interupt flag. */ + TAY_IMP = 0x2A, /* Transfer Accumulator to Y. */ + STA_Z = 0x2C, /* STore Accumulator. */ + STA_ZX = 0x2E, /* STA Zero Marrix, Indexed with X. */ + JSR_AB = 0x30, /* JSR Absolute. */ + SBC_AB = 0x31, /* SBC Absolute. */ + MUL_AB = 0x32, /* MUL Absolute. */ + CPX_AB = 0x34, /* CPX Absolute. */ + SBC_B = 0x35, /* SBC B Register. */ + MUL_B = 0x36, /* MUL B Register. */ + STA_AB = 0x38, /* STA Absolute. */ + SEI_IMP = 0x39, /* SEt Interupt flag. */ + TYA_IMP = 0x3A, /* Transfer Y to Accumulator. */ + STA_ZY = 0x3C, /* STA Zero Marrix, Indexed with Y. */ + STA_IX = 0x3E, /* STA Indexed Indirect. */ JSR_Z = 0x40, /* Jump to SubRoutine. */ - XOR_IMM = 0x41, /* bitwise XOR with accumulator. */ - XAB_IMP = 0x42, /* bitwise Xor with Accumulator, and B register. */ - XOR_AB = 0x44, /* XOR Absolute. */ - STB_IN = 0x45, /* STB Indirect */ - XOR_Z = 0x46, /* XOR Zero Matrix. */ - CLV_IMP = 0x48, /* CLear oVerflow flag. */ - CPY_IMM = 0x4A, /* ComPare Y register. */ - CPY_AB = 0x4C, /* CPY Absolute. */ - CPY_Z = 0x4D, /* CPY Zero Matrix. */ - BPO_REL = 0x50, /* Branch if POsitive. */ - LSL_IMM = 0x51, /* Logical Shift Left. */ - LLB_IMP = 0x52, /* Logical shift Left accumulator by B. */ - LSL_AB = 0x54, /* LSL Absolute. */ - CPB_IN = 0x55, /* CPB Indirect */ - LSL_Z = 0x56, /* LSL Zero Matrix. */ - WAI_IMP = 0x58, /* WAit for Interrupt. */ - PHP_IMP = 0x59, /* PusH Processor status to stack. */ - TAB_IMP = 0x5A, /* Transfer Accumulator to B. */ - LDA_IY = 0x5C, /* LDA Indirect Indexed. */ - LDA_IX = 0x5D, /* LDA Indexed Indirect. */ - BNG_REL = 0x60, /* Branch if NeGative. */ - LSR_IMM = 0x61, /* Logical Shift Right. */ - LRB_IMP = 0x62, /* Logical shift Right accumulator by B. */ - LSR_AB = 0x64, /* LSR Absolute. */ - LDY_IN = 0x65, /* LDY Indirect */ - LSR_Z = 0x66, /* LSR Zero Matrix. */ - BRK_IMP = 0x68, /* BReaK. */ - PLP_IMP = 0x69, /* PuLl Processor status from stack. */ - TBA_IMP = 0x6A, /* Transfer B to Accumulator. */ - STA_IY = 0x6C, /* STA Indirect Indexed. */ - STA_IX = 0x6D, /* STA Indexed Indirect. */ - BCS_REL = 0x70, /* Branch if Carry Set. */ - ROL_IMM = 0x71, /* ROtate Left. */ - RLB_IMP = 0x72, /* Rotate Left accumulator by B. */ - ROL_AB = 0x74, /* ROL Absolute. */ - STY_IN = 0x75, /* STY Indirect */ - ROL_Z = 0x76, /* ROL Zero Matrix. */ - LDA_ZY = 0x78, /* LDA Zero Marrix, Indexed with Y. */ - PHA_IMP = 0x79, /* PusH Accumulator to stack. */ - TAY_IMP = 0x7A, /* Transfer Accumulator to Y. */ - CMP_IY = 0x7C, /* CMP Indirect Indexed. */ - CMP_IX = 0x7D, /* CMP Indexed Indirect. */ - BCC_REL = 0x80, /* Branch if Carry Clear. */ - ROR_IMM = 0x81, /* ROtate Right. */ - RRB_IMP = 0x82, /* Rotate Right accumulator by B. */ - ROR_AB = 0x84, /* ROR Absolute. */ - LDX_IN = 0x85, /* LDX Indirect */ - ROR_Z = 0x86, /* ROR Zero Matrix. */ - STA_ZY = 0x88, /* STA Zero Marrix, Indexed with Y. */ - PLA_IMP = 0x89, /* PuLl Accumulator from stack. */ - TYA_IMP = 0x8A, /* Transfer Y to Accumulator. */ - LDB_IY = 0x8C, /* LDB Indirect Indexed. */ - LDB_IX = 0x8D, /* LDB Indexed Indirect. */ - BEQ_REL = 0x90, /* Branch if EQual. */ - MUL_IMM = 0x91, /* MULtiply accumulator. */ - MAB_IMP = 0x92, /* Multiply Accumulator by B. */ - MUL_AB = 0x94, /* MUL Absolute. */ - STX_IN = 0x95, /* STX Indirect */ - MUL_Z = 0x96, /* MUL Zero Matrix. */ - LDB_ZY = 0x98, /* LDB Zero Marrix, Indexed with Y. */ - PHB_IMP = 0x99, /* PusH B register to stack. */ - TAX_IMP = 0x9A, /* Transfer Accumulator to X. */ - STB_IY = 0x9C, /* STB Indirect Indexed. */ - STB_IX = 0x9D, /* STB Indexed Indirect. */ - BNE_REL = 0xA0, /* Branch if Not Equal. */ - DIV_IMM = 0xA1, /* DIVide with accumulator. */ - DAB_IMP = 0xA2, /* Divide Accumulator by B. */ - DIV_AB = 0xA4, /* DIV Absolute. */ - JSR_IN = 0xA5, /* JSR Indirect */ - DIV_Z = 0xA6, /* DIV Zero Matrix. */ - STB_ZY = 0xA8, /* STB Zero Marrix, Indexed with Y. */ - PLB_IMP = 0xA9, /* PuLl B register to stack. */ - TXA_IMP = 0xAA, /* Transfer X to Accumulator. */ - CPB_IY = 0xAC, /* CPB Indirect Indexed. */ - CPB_IX = 0xAD, /* CPB Indexed Indirect. */ - BVS_REL = 0xB0, /* Branch if oVerflow Set. */ - CMP_IMM = 0xB1, /* CoMPare accumulator. */ - CAB_IMP = 0xB2, /* Compare Accumulator, and B. */ - CMP_AB = 0xB4, /* CMP Absolute. */ - JMP_IN = 0xB5, /* JMP Indirect */ - CMP_Z = 0xB6, /* CMP Zero Matrix. */ - LDA_ZX = 0xB8, /* LDA Zero Marrix, Indexed with X. */ - LDX_IMM = 0xB9, /* LoaD X register. */ - TYX_IMP = 0xBA, /* Transfer Y to X. */ - LDX_AB = 0xBC, /* LDX Absolute. */ - LDX_Z = 0xBD, /* LDX Zero Matrix. */ - BVC_REL = 0xC0, /* Branch if oVerflow Clear. */ - LDA_IMM = 0xC1, /* LoaD Accumulator. */ - DEB_IMP = 0xC2, /* Decrement B register. */ - LDA_AB = 0xC4, /* LDA Absolute. */ + AND_IMM = 0x41, /* bitwise AND with accumulator. */ + DIV_IMM = 0x42, /* DIVide with accumulator. */ + CPY_IMM = 0x44, /* ComPare Y register. */ + AND_Z = 0x45, /* AND Zero Matrix. */ + DIV_Z = 0x46, /* DIV Zero Matrix. */ + CPY_Z = 0x48, /* CPY Zero Matrix. */ + CLV_IMP = 0x49, /* CLear oVerflow flag. */ + TAX_IMP = 0x4A, /* Transfer Accumulator to X. */ + STB_Z = 0x4C, /* STore B register. */ + STB_ZX = 0x4E, /* STB Zero Marrix, Indexed with X. */ + RTS_IMP = 0x50, /* ReTurn from Subroutine. */ + AND_AB = 0x51, /* AND Absolute. */ + DIV_AB = 0x52, /* DIV Absolute. */ + CPY_AB = 0x54, /* CPY Absolute. */ + AND_B = 0x55, /* AND B Register. */ + DIV_B = 0x56, /* DIV B Register. */ + STB_AB = 0x58, /* STB Absolute. */ + WAI_IMP = 0x59, /* WAit for Interrupt. */ + TXA_IMP = 0x5A, /* Transfer X to Accumulator. */ + STB_ZY = 0x5C, /* STB Zero Marrix, Indexed with Y. */ + STB_IX = 0x5E, /* STB Indexed Indirect. */ + RTI_IMP = 0x60, /* ReTurn from Interrupt. */ + ORA_IMM = 0x61, /* bitwise OR with Accumulator. */ + ASR_IMM = 0x62, /* Arithmetic Shift Right. */ + LDX_IMM = 0x64, /* LoaD X register. */ + ORA_Z = 0x65, /* ORA Zero Matrix. */ + ASR_Z = 0x66, /* ASR Zero Matrix. */ + LDX_Z = 0x68, /* LDX Zero Matrix. */ + BRK_IMP = 0x69, /* BReaK. */ + TYX_IMP = 0x6A, /* Transfer Y to X. */ + STX_Z = 0x6C, /* STore X register. */ + PHP_IMP = 0x6E, /* PusH Processor status to stack. */ + BPO_REL = 0x70, /* Branch if POsitive. */ + ORA_AB = 0x71, /* ORA Absolute. */ + ASR_AB = 0x72, /* ASR Absolute. */ + LDX_AB = 0x74, /* LDX Absolute. */ + ORA_B = 0x75, /* ORA B Register. */ + ASR_B = 0x76, /* ASR B Register. */ + STX_AB = 0x78, /* STX Absolute. */ + DEY_IMP = 0x79, /* DEcrement Y register. */ + TXY_IMP = 0x7A, /* Transfer X to Y. */ + CPB_IN = 0x7C, /* CPB Indirect */ + PLP_IMP = 0x7E, /* PuLl Processor status from stack. */ + BNG_REL = 0x80, /* Branch if NeGative. */ + XOR_IMM = 0x81, /* bitwise XOR with accumulator. */ + CMP_IMM = 0x82, /* CoMPare accumulator. */ + DEC_IMP = 0x84, /* DECrement accumulator. */ + XOR_Z = 0x85, /* XOR Zero Matrix. */ + CMP_Z = 0x86, /* CMP Zero Matrix. */ + DEC_Z = 0x88, /* DEC Zero Matrix. */ + INY_IMP = 0x89, /* INcrement Y register. */ + TSX_IMP = 0x8A, /* Transfer Stack pointer to X. */ + CMP_IN = 0x8C, /* CMP Indirect */ + PHA_IMP = 0x8E, /* PusH Accumulator to stack. */ + BCS_REL = 0x90, /* Branch if Carry Set. */ + XOR_AB = 0x91, /* XOR Absolute. */ + CMP_AB = 0x92, /* CMP Absolute. */ + DEC_AB = 0x94, /* DEC Absolute. */ + XOR_B = 0x95, /* XOR B Register. */ + CMP_B = 0x96, /* CMP B Register. */ + DEB_IMP = 0x99, /* Decrement B register. */ + TXS_IMM = 0x9A, /* Transfer X to Stack pointer. */ + STY_IN = 0x9C, /* STY Indirect */ + PLA_IMP = 0x9E, /* PuLl Accumulator from stack. */ + BCC_REL = 0xA0, /* Branch if Carry Clear. */ + LSL_IMM = 0xA1, /* Logical Shift Left. */ + LDY_IMM = 0xA2, /* LoaD Y register. */ + INC_IMP = 0xA4, /* INCrement accumulator. */ + LSL_Z = 0xA5, /* LSL Zero Matrix. */ + LDY_Z = 0xA6, /* LDY Zero Matrix. */ + INC_Z = 0xA8, /* INC Zero Matrix. */ + INB_IMP = 0xA9, /* Increment B register. */ + CMP_IX = 0xAA, /* CMP Indexed Indirect. */ + LDY_IN = 0xAC, /* LDY Indirect */ + PHB_IMP = 0xAE, /* PusH B register to stack. */ + BEQ_REL = 0xB0, /* Branch if EQual. */ + LSL_AB = 0xB1, /* LSL Absolute. */ + LDY_AB = 0xB2, /* LDY Absolute. */ + INC_AB = 0xB4, /* INC Absolute. */ + LSL_B = 0xB5, /* LSL B Register. */ + DEX_IMP = 0xB9, /* DEcrement X register. */ + CPB_IX = 0xBA, /* CPB Indexed Indirect. */ + LDX_IN = 0xBC, /* LDX Indirect */ + PLB_IMP = 0xBE, /* PuLl B register to stack. */ + BNE_REL = 0xC0, /* Branch if Not Equal. */ + LSR_IMM = 0xC1, /* Logical Shift Right. */ + LDA_IMM = 0xC2, /* LoaD Accumulator. */ + LDA_IN = 0xC4, /* LDA Indirect */ + LSR_Z = 0xC5, /* LSR Zero Matrix. */ LDA_Z = 0xC6, /* LDA Zero Matrix. */ - STA_ZX = 0xC8, /* STA Zero Marrix, Indexed with X. */ - PHY_IMP = 0xC9, /* PusH Y register to stack. */ - TXY_IMP = 0xCA, /* Transfer X to Y. */ - STA_AB = 0xCC, /* STA Absolute. */ - STA_Z = 0xCD, /* STore Accumulator. */ - BRA_REL = 0xD0, /* BRanch Always. */ - LDB_IMM = 0xD1, /* LoaD B register. */ - INB_IMP = 0xD2, /* Increment B register. */ - LDB_AB = 0xD4, /* LDB Absolute. */ - LDB_Z = 0xD6, /* LDB Zero Matrix. */ - LDB_ZX = 0xD8, /* LDB Zero Marrix, Indexed with X. */ - PLY_IMP = 0xD9, /* PuLl Y register from stack. */ - TSX_IMP = 0xDA, /* Transfer Stack pointer to X. */ - STB_AB = 0xDC, /* STB Absolute. */ - STB_Z = 0xDD, /* STore B register. */ - RTS_IMP = 0xE0, /* ReTurn from Subroutine. */ - LDY_IMM = 0xE1, /* LoaD Y register. */ - LDY_AB = 0xE4, /* LDY Absolute. */ - LDY_Z = 0xE6, /* LDY Zero Matrix. */ - STB_ZX = 0xE8, /* STB Zero Marrix, Indexed with X. */ - PHX_IMP = 0xE9, /* PusH X register to stack. */ + LDA_ZX = 0xC8, /* LDA Zero Marrix, Indexed with X. */ + INX_IMP = 0xC9, /* INcrement X register. */ + STA_IY = 0xCA, /* STA Indirect Indexed. */ + STX_IN = 0xCC, /* STX Indirect */ + PHY_IMP = 0xCE, /* PusH Y register to stack. */ + BVS_REL = 0xD0, /* Branch if oVerflow Set. */ + LSR_AB = 0xD1, /* LSR Absolute. */ + LDA_AB = 0xD2, /* LDA Absolute. */ + STA_IN = 0xD4, /* STA Indirect */ + LSR_B = 0xD5, /* LSR B Register. */ + LDA_ZY = 0xD6, /* LDA Zero Marrix, Indexed with Y. */ + LDA_IX = 0xD8, /* LDA Indexed Indirect. */ + LDA_IY = 0xD9, /* LDA Indirect Indexed. */ + STB_IY = 0xDA, /* STB Indirect Indexed. */ + JSR_IN = 0xDC, /* JSR Indirect */ + PLY_IMP = 0xDE, /* PuLl Y register from stack. */ + BVC_REL = 0xE0, /* Branch if oVerflow Clear. */ + ROL_IMM = 0xE1, /* ROtate Left. */ + LDB_IMM = 0xE2, /* LoaD B register. */ + LDB_IN = 0xE4, /* LDB Indirect */ + ROL_Z = 0xE5, /* ROL Zero Matrix. */ + LDB_Z = 0xE6, /* LDB Zero Matrix. */ + LDB_ZX = 0xE8, /* LDB Zero Marrix, Indexed with X. */ + LDB_IY = 0xE9, /* LDB Indirect Indexed. */ NOP_IMP = 0xEA, /* No OPeration. */ - STY_AB = 0xEC, /* STY Absolute. */ - STY_Z = 0xED, /* STore Y register. */ - RTI_IMP = 0xF0, /* ReTurn from Interrupt. */ - ASR_IMM = 0xF1, /* Arithmetic Shift Right. */ - ARB_IMP = 0xF2, /* Arithmetic shift Right accumulator by B. */ - ASR_AB = 0xF4, /* ASR Absolute. */ - ASR_Z = 0xF6, /* ASR Zero Matrix. */ - PLX_IMP = 0xF9, /* PuLl X register from stack. */ - TXS_IMM = 0xFA, /* Transfer X to Stack pointer. */ - STX_AB = 0xFC, /* STX Absolute. */ - STX_Z = 0xFD /* STore X register. */ + JMP_IN = 0xEC, /* JMP Indirect */ + PHX_IMP = 0xEE, /* PusH X register to stack. */ + BRA_REL = 0xF0, /* BRanch Always. */ + ROL_AB = 0xF1, /* ROL Absolute. */ + LDB_AB = 0xF2, /* LDB Absolute. */ + STB_IN = 0xF4, /* STB Indirect */ + ROL_B = 0xF5, /* ROL B Register. */ + LDB_ZY = 0xF6, /* LDB Zero Marrix, Indexed with Y. */ + LDB_IX = 0xF8, /* LDB Indexed Indirect. */ + CMP_IY = 0xF9, /* CMP Indirect Indexed. */ + CPB_IY = 0xFA, /* CPB Indirect Indexed. */ + PLX_IMP = 0xFE /* PuLl X register from stack. */ }; enum base_ext { @@ -270,7 +270,7 @@ uint64_t lex(char *str, uint64_t address, uint8_t dbg) { for (; isdelm(str[i], dbg) == 16; i++); } uint8_t ptok = get_ptok(str[i], dbg); - if (ptok == PTOK_X || ptok == PTOK_Y || ptok == PTOK_S || ptok == PTOK_P) { + if (is_altok(ptok, dbg)) { offset++; if ((ptok == PTOK_S && toupper(str[i+1]) == 'P') || (ptok == PTOK_P && toupper(str[i+1]) == 'C')) { offset++; @@ -278,6 +278,7 @@ uint64_t lex(char *str, uint64_t address, uint8_t dbg) { } switch (get_ptok(str[i+offset], dbg)) { + case PTOK_B : case PTOK_X : case PTOK_Y : case PTOK_S : @@ -455,6 +456,13 @@ uint64_t lex(char *str, uint64_t address, uint8_t dbg) { lexeme[j+1] = '\0'; lexeme[j+2] = '\0'; break; + case PTOK_B: + lexeme[j] = str[i++]; + lexeme[j+1] = '\0'; + lexeme[j+2] = '\0'; + lex_type = TOK_BREG; + l->tok->type = BREG; + break; case PTOK_X: case PTOK_Y: lexeme[j] = str[i++]; @@ -44,6 +44,7 @@ static inline uint8_t get_ptok(char c, uint8_t dbg) { case '(' : return PTOK_LBRACK ; case ')' : return PTOK_RBRACK ; case ',' : return PTOK_COMMA ; + case 'B': case 'b' : return PTOK_B ; case 'X': case 'x' : return PTOK_X ; case 'Y': case 'y' : return PTOK_Y ; case 'S': case 's' : return PTOK_S ; @@ -64,3 +65,14 @@ static inline uint8_t get_ptok(char c, uint8_t dbg) { } } } + +static inline uint8_t is_altok(uint8_t ptok, uint8_t dbg) { + switch (ptok) { + case PTOK_B: + case PTOK_X: + case PTOK_Y: + case PTOK_S: + case PTOK_P: return 1; + default : return 0; + } +} @@ -10,7 +10,7 @@ #define getclk 0 #define keypoll 0 -#define OPNUM 87 +#define OPNUM 74 #define C (1 << 0) /* Carry flag. */ #define Z (1 << 1) /* Zero flag. */ diff --git a/programs/sub-suite/declare.s b/programs/sub-suite/declare.s index 745445b..2991e66 100644 --- a/programs/sub-suite/declare.s +++ b/programs/sub-suite/declare.s @@ -108,19 +108,19 @@ scr_ptr3: .res 2 ; Pseudo registers. -a: +rega: .res 1 -b: +regb: .res 1 -c: +regc: .res 1 -d: +regd: .res 1 -e: +rege: .res 1 -f: +regf: .res 1 -g: +regg: .res 1 ; This pseudo register is always zero. zero: diff --git a/programs/sub-suite/lexer.s b/programs/sub-suite/lexer.s index c144f9a..dc5a3b0 100644 --- a/programs/sub-suite/lexer.s +++ b/programs/sub-suite/lexer.s @@ -8,7 +8,7 @@ lex: sty.q idx0 ; Clear the first index. sty.q idx1 ; Clear the second index. sty.q idx2 ; Clear the third index. - sty b ; Clear the isop flag. + sty regb ; Clear the isop flag. ; lda (ptr), y ; Get a character from the line. ; pha ; Preserve the character. ; jsr isdigit ; Is this character a digit? @@ -99,7 +99,7 @@ ptok_dot: ldb #$11 ; Set the delimiter comparison value to whitespace. jsr delmcpy ; Copy the string, to the lexeme buffer, until delimiter. @isop: - lda b ; Has the isop flag been set? + lda regb ; Has the isop flag been set? beq @dir ; No, so check for a directive. @rs: lda #TOK_RS ; Yes, so set the lexeme type to TOK_RS. @@ -248,7 +248,7 @@ ptok_alph: tba ; Use isdelm2 for the comparison. jsr delmcpy ; Copy the string, to the lexeme buffer, until delimiter. lda #0 ; Reset A. - sta b ; Clear the isop flag. + sta regb ; Clear the isop flag. @isop: ldb #0 ; Make the lexeme buffer, the first pointer. stb.q idx1 ; Reset the second index. @@ -272,7 +272,7 @@ ptok_alph: @found: lda #TOK_MNE ; Set the lexeme type to TOK_MNE. sta lex_type ; - inc b ; Set the isop flag. + inc regb ; Set the isop flag. @end: jsr make_tok ; Create the token. jsr set_cmdbuf ; Set the first pointer to the command buffer. @@ -325,23 +325,23 @@ init_lex: delmcpy: - sta a ; Save the delimiter check flag. - stb c ; Save the delimiter comparison value. + sta rega ; Save the delimiter check flag. + stb regc ; Save the delimiter comparison value. @loop: ldb #0 ; Reset the B register. - stb g ; Reset the byte count. + stb regg ; Reset the byte count. ldy.w idx0 ; Get the string index. lda.q (ptr), y ; Get eight bytes from the current line. @loop1: pha.q ; Save the string buffer. and #$FF ; Get the current byte. pha ; Preserve the character. - lda a ; Are we calling isdelm2? + lda rega ; Are we calling isdelm2? pla ; Get the character back. bne @isdelm2 ; Yes, so use isdelm2. jsr isdelm ; No, so get the delimiter value from isdelm. @delmchk: - and c ; Are both delimiter values, the same? + and regc ; Are both delimiter values, the same? pla.q ; Get back the string buffer. bne @end ; Yes, so we're done. bra @copy ; No, so start copying the character. @@ -354,8 +354,8 @@ delmcpy: inc.w idx0 ; Increment the string index. inc.w idx1 ; Increment the lexeme index. lsr #8 ; Shift in the next byte. - inc g ; Increment the byte count. - ldb g ; Get back the byte count. + inc regg ; Increment the byte count. + ldb regg ; Get back the byte count. cpb #7 ; Did we shift in eight bytes? beq @loop ; Yes, so get eight more bytes. bra @loop1 ; No, so keep shifting in more bytes. @@ -372,12 +372,12 @@ delmcpy: ; ldy.w idx0 ; Get the string index. ; lda (ptr), y ; Get a character from the line. ; pha ; Preserve the character. -; lda a ; Are we calling isdelm2? +; lda rega ; Are we calling isdelm2? ; pla ; Get the character back. ; bne @isdelm2 ; Yes, so use isdelm2. ; jsr isdelm ; No, so get the delimiter value from isdelm. ;@delmchk: -; and c ; Are both delimiter values, the same? +; and regc ; Are both delimiter values, the same? ; bne @end ; Yes, so we're done. ; bra @copy ; No, so start copying the character. ;@isdelm2: diff --git a/programs/sub-suite/libc.s b/programs/sub-suite/libc.s index bd55f9c..d13d983 100644 --- a/programs/sub-suite/libc.s +++ b/programs/sub-suite/libc.s @@ -31,7 +31,7 @@ strtoull: lda.q sp+1 ; Get the value from the value buffer. mul sp+19 ; Multiply the value by the base. clc ; Prepare for a non carrying add. - aab ; Add the digit value to the total value. + adc b ; Add the digit value to the total value. sta.q sp+1 ; Place the value in the value buffer. iny ; Increment the string index. and #0 ; Reset A. @@ -96,7 +96,7 @@ strcasecmp: jsr tolower ; Convert the character of string 2 to lowercase. tab ; Place it in B. pla ; Get the character of string 1 back. - cab ; Is the character of both strings, the same? + cmp b ; Is the character of both strings, the same? plb ; Get the islong flag back. bne cmpr ; No, so check if we're too short, or too long. iny ; Yes, so increment the index. diff --git a/programs/sub-suite/subasm.s b/programs/sub-suite/subasm.s index 0a7640d..ec58a40 100644 --- a/programs/sub-suite/subasm.s +++ b/programs/sub-suite/subasm.s @@ -21,7 +21,7 @@ subasm: jsr set_ptr ; deb ; Reset B. tba ; Reset A. - lda f ; Get the command ID. + lda regf ; Get the command ID. cmp #8 ; Is the command ID greater than the command count? bcs @end ; Yes, so we're done. lsl #1 ; No, so multiply the command ID by two. @@ -55,12 +55,12 @@ chk_shcmd: @loop: ldb (ptr2), y ; Are we at the end of the table? beq @false ; Yes, so return that we failed. - cab ; No, so did the character match? + cmp b ; No, so did the character match? beq @found ; Yes, so check if there are any arguments. iny ; No, so check the next command. bra @loop ; Keep looping. @found: - sty f ; Save the command ID. + sty regf ; Save the command ID. ldy #1 ; Check the next character in the command buffer. lda (ptr), y ; Is this the end of the buffer? beq @true ; Yes, so return that we succeded. @@ -105,7 +105,7 @@ chk_cmd: bra @loop ; Keep looping. @true: ldb idx1 ; Get the command ID. - stb f ; Return the command ID. + stb regf ; Return the command ID. ldb #1 ; Return true. bra @end ; We are done. @false: diff --git a/programs/sub-suite/subeditor.s b/programs/sub-suite/subeditor.s index 2282a72..fb3f3c4 100644 --- a/programs/sub-suite/subeditor.s +++ b/programs/sub-suite/subeditor.s @@ -117,7 +117,7 @@ print_str: tba ; Clear the Accumulator. @loop: ldb #1 ; Enable replace mode. - stb b ; + stb regb ; lda.q ptr ; Get the first pointer. cmp.q end ; Did the pointer change? bne @reset ; Yes, so set it back. @@ -133,7 +133,7 @@ print_str: bra @loop ; Keep looping. @end: ldb #0 ; Enable insert mode. - stb b ; + stb regb ; tba ; Reset A. rts ; End of print_str. @@ -159,7 +159,7 @@ getbt1: txy ; Get the byte position. ldb (ptr2), y ; Get one byte of the wrap table. ply.w ; Get the screen index back. - aba ; Mask out the bit of the current line number. + and b ; Mask out the bit of the current line number. cmp #1 ; Set the carry flag, if true. bra bitout ; We are done. @@ -175,7 +175,7 @@ clrbit: phy.w ; Save the screen index. txy ; Get the byte position. ldb (ptr2), y ; Get one byte of the wrap table. - aba ; Clear the bit of the current line number. + and b ; Clear the bit of the current line number. bitsav: sta (ptr2), y ; Update the wrap table. ply.w ; Get the screen index back. @@ -194,7 +194,7 @@ setbit: phy.w ; Save the screen index. txy ; Get the byte position. ldb (ptr2), y ; Get one byte of the wrap table. - oab ; Set the bit of the current line number. + ora b ; Set the bit of the current line number. bra bitsav ; Save the bit. bitpos: @@ -222,8 +222,8 @@ bitpos: handle_char: ldb #0 ; Reset the B register. - stb e ; Set the temporary row position to zero, in case we get a newline. - stb b ; Enable insert mode. + stb rege ; Set the temporary row position to zero, in case we get a newline. + stb regb ; Enable insert mode. pha ; Save the character. phy.w ; Save the cursor index. cmp #'\n' ; Was the character that was typed, a newline? @@ -232,16 +232,16 @@ handle_char: @print: ply.w ; Get back the cursor index. pla ; Get back the character. - ldb e ; Is the temporary row position non zero? + ldb rege ; Is the temporary row position non zero? bne @row ; Yes, so reset the row positon. @print1: jsr print_char ; No, so print the character. - lda a ; Get the return value. + lda rega ; Get the return value. cmp #'\n' ; Is the return value, a newline? beq @true ; Yes, so return true. bra @false ; No, so return false. @row: - ldb e ; Get the temporary row position. + ldb rege ; Get the temporary row position. cpb #maxrow ; Is temporary row position, at, or above the bottom of the screen? beq @row2 ; Yes, so leave it as is. bcs @row1 ; No, so set it to the bottom of the screen. @@ -272,7 +272,7 @@ cmd_cpy: clc ; Clear the carry flag, so that nothing odd occurs. @start: sta scr_row ; Set the row position to the end of the line. - sta e ; Save it into the temporary row posiition. + sta rege ; Save it into the temporary row posiition. jsr findst ; Find the start of the line. clc ; Clear the carry flag. lda scr_row ; Get the row position. @@ -302,12 +302,12 @@ cmd_cpy: iny ; No, so increment the screen index. inb ; Increment the byte count. lsr #8 ; Shift in the next byte. - stb g ; Save the byte count. + stb regg ; Save the byte count. tab ; Save the string buffer. and #$FF ; Is this byte of the buffer, a null terminator? beq @end1 ; Yes, so we're done. tba ; No so get back the string buffer. - ldb g ; Get back the byte count. + ldb regg ; Get back the byte count. cpb #7 ; Did we shift in eight bytes? beq @loop ; Yes, so get eight more bytes. bra @loop1 ; No, so keep shifting in more bytes. @@ -365,13 +365,13 @@ findend: print_char: - sta a ; Save the typed character for now. + sta rega ; Save the typed character for now. ldb #2 ; Make sure that set_ptr sets the third pointer. lda.d #buffer ; Set the third pointer to the start of the screen buffer. jsr set_ptr ; ldb #0 ; Set B to zero. tba ; Set the Accumulator to zero. - lda a ; Get back the character. + lda rega ; Get back the character. cmp #$1B ; Did the user type an escape character? beq esc ; Yes, so go check the escape code. cmp #'\n' ; No, but did the user type a newline? @@ -388,10 +388,10 @@ print_char: beq bs ; Yes, so treat it as a backspace. printc: lda #0 ; No, so start trying to print a character. - sta d ; + sta regd ; lda (ptr3), y ; Are we at the end of the string? beq @save ; Yes, so just print the character. - lda b ; No, but was the flag set? + lda regb ; No, but was the flag set? bne @save ; Yes, so don't shift the line. sty.w scr_ptr ; No, so save the cursor index for later. jsr fndend ; Find the end of the line. @@ -401,19 +401,19 @@ printc: sta scr_tcol ; @update1: jsr findend ; Find the end of the line. - sta e ; Use it for redrawing the line. + sta rege ; Use it for redrawing the line. sta scr_row ; Set the row position to to the end of the line. jsr findst ; Find the start of the line. lda scr_row ; Get the start of the line. @update2: - sta f ; Set the starting line, to the start of the line. + sta regf ; Set the starting line, to the start of the line. jsr rdrw_ln ; Redraw the line. lda scr_trow ; Get the real row position back. sta scr_row ; lda scr_tcol ; Get the real column position back. sta scr_col ; jsr update_pos ; Update the cursor's position. - dec d ; + dec regd ; bra @save1 ; @shift: ldy.w scr_ptr3 ; @@ -421,33 +421,33 @@ printc: tyx ; dey ; ldb #1 ; - stb d ; + stb regd ; jsr shftln ; ldb #1 ; - stb d ; - lda a ; + stb regd ; + lda rega ; sta (ptr3), y ; store typed character into the input buffer. lda scr_row ; sta scr_trow ; bra @update ; @save: - ldb d ; + ldb regd ; bne @update ; @save1: - lda a ; + lda rega ; sta (ptr3), y ; store typed character into the input buffer. @incr: inc scr_col ; Increment the cursor's x coordinate. iny ; @wrapped: ldb #1 ; - stb f ; + stb regf ; ldb scr_col ; cpb #maxcol+1 ; bcs @scrolled ; @print: sta scr ; Echo typed character. - ldb f ; + ldb regf ; beq @wrap ; bra printc_end ; @scrolled: @@ -456,7 +456,7 @@ printc: bcs @scroll ; @wrapped2: ldb #0 ; - stb f ; + stb regf ; bra @print ; @scroll: sta scr ; Echo typed character. @@ -501,7 +501,7 @@ nl: jsr update_pos ; Update the cursor's position. @end: lda #'\n' ; Print the newline. - sta a ; + sta rega ; rts ; @@ -580,8 +580,8 @@ bs: jsr update_pos ; Update the cursor's position. back: ldb #0 ; Reset B, and some flags. - stb e ; - stb f ; + stb rege ; + stb regf ; lda scr_row ; Save the current row position for later. sta scr_trow ; jsr findend ; Find the end of the line. @@ -599,15 +599,15 @@ back: tyx ; Copy the current cursor index to X. iny ; Increment cursor index. ldb #0 ; Set shifting direction to left. - stb d ; + stb regd ; jsr shftln ; Shift line back by one character. lda #$7F ; Print a backspace to the screen. sta scr ; - lda e ; Are we updating more than one line? + lda rege ; Are we updating more than one line? beq @load ; No, so skip to the next step. @find_end: jsr findend ; Yes, so find the end of the line. - sta e ; Set the end parameter to it. + sta rege ; Set the end parameter to it. lda scr_col ; Save the current column position for now. sta scr_tcol ; jsr rdrw_ln ; Start redrawing the line. @@ -621,13 +621,13 @@ back: rts ; We are done. @update: lda scr_row ; Set the line to start redrawing, to the start of the line. - sta f ; - inc e ; Set the redraw flag to true. + sta regf ; + inc rege ; Set the redraw flag to true. bra @shift ; Start shifting the line back. shftln: - ldb d ; Is the flag not set? + ldb regd ; Is the flag not set? beq @dec_loop ; Yes, so shift, and decrement. ldb #0 ; Clear the B register. bra @inc_loop ; No, so shift, and increment. @@ -680,14 +680,14 @@ shftln: sta (ptr3), y ; @end1: jsr findend ; Find the ending line. - sta d ; Save ending line for later. + sta regd ; Save ending line for later. lda (ptr3), y ; Is this character a space? cmp #$20 ; bne @end5 ; No, so skip the conversion. lda #0 ; Yes, so convert it back to zero. sta (ptr3), y ; @end2: - lda d ; Get the ending line. + lda regd ; Get the ending line. cmp scr_row ; Is the ending line greater than the starting line? beq @end5 ; No, so we're done. bcs @wrap ; Yes, so set the wrap bit. @@ -712,23 +712,23 @@ esc: lda status ; No, so wait for the next character. beq @end ; We have an error, so discard it, and go back to getting user input. lda kbd ; Get the escape code. - sta c ; Store the escape code, until we need it. + sta regc ; Store the escape code, until we need it. lda #0 ; Set the D pseudo register to zero. - sta d ; + sta regd ; jsr isup ; Check if the user pressed up. - lda d ; Did the user press up? + lda regd ; Did the user press up? bne @end ; Yes, so we're done. jsr isdown ; No, so check if the user pressed down. - lda d ; Did the user press down? + lda regd ; Did the user press down? bne @end ; Yes, so we're done. lda #0 ; No, so check if the user pressed left. jsr isleft ; - lda d ; Did the user press left? + lda regd ; Did the user press left? bne @end ; Yes, so we're done. jsr isright ; No, so check if the user pressed right. @end: lda #0 ; Clear the D pseudo register. - sta d ; + sta regd ; rts ; We are done. shftesc: @@ -737,27 +737,27 @@ shftesc: lda status ; Wait for the next character. beq @end ; We have an error, so discard it, and go back to getting user input. lda kbd ; Get the escape code. - sta c ; Store the escape code, until we need it. + sta regc ; Store the escape code, until we need it. lda #0 ; Use the D pseudo register as a skip flag. - sta d ; + sta regd ; jsr isshftup ; Check if the user pressed shift+up. - lda d ; Was it successful? + lda regd ; Was it successful? bne @end ; Yes, so we're done. jsr isshftdown ; No, so check if the user pressed shift+down. @end: lda #0 ; Clear the D pseudo register. - sta d ; + sta regd ; rts ; We are done. isup: - lda c ; Load the escape code into the accumulator. + lda regc ; Load the escape code into the accumulator. cmp #'A' ; Did the user press the up arrow key? bne @end ; No, so we're done. lda scr_row ; Yes, but is the cursor at the top of the screen? beq @scroll ; Yes, so check if we need to scroll. @check2: - lda c ; No, so load the escape code back into the accumulator. + lda regc ; No, so load the escape code back into the accumulator. cmp #'A' ; Did the user press the up arrow key? beq @up ; Yes, so move the cursor up. bra @end ; No, so we're done. @@ -765,26 +765,26 @@ isup: dec scr_row ; Move the cursor up a line. jsr update_pos ; Update it's position. lda #1 ; Tell the escape routine that we succeded. - sta d ; + sta regd ; rts ; We are done. @scroll: lda scr_str ; Are we at the top of the screen buffer? beq @end ; Yes, so we're done. jsr scrl_up ; No, so scroll up. lda #1 ; Tell the escape routine that we were successful. - sta d ; + sta regd ; @end: rts ; End of isup. isdown: - lda c ; Load the escape code into the accumulator. + lda regc ; Load the escape code into the accumulator. cmp #'B' ; Did the user press the down arrow key? bne @end ; No, so we're done. lda scr_row ; Yes, so start checking the y coordinate of the cursor. cmp #maxrow ; Is the cursor at the bottom of the screen? beq @scroll ; Yes, so scroll down. - lda c ; No, so load the escape code back into the accumulator. + lda regc ; No, so load the escape code back into the accumulator. cmp #'B' ; Did the user press the down arrow key? beq @down ; Yes, so move the cursor down. bra @end ; No, so we're done. @@ -792,7 +792,7 @@ isdown: inc scr_row ; Move the cursor down a line. jsr update_pos ; Update it's position. lda #1 ; Tell the escape routine that we succeded. - sta d ; + sta regd ; rts ; We are done. @scroll: lda scr_row ; Save the cursor's row number. @@ -805,13 +805,13 @@ isdown: lda scr_tcol ; Load the cursor's column number. sta scr_col ; lda #1 ; Tell the escape routine that we were successful. - sta d ; + sta regd ; @end: rts ; End of isdown. isright: - lda c ; Load the escape code into the accumulator. + lda regc ; Load the escape code into the accumulator. cmp #'C' ; Did the user press the right arrow key? bne @end2 ; No, so we're done. lda scr_col ; Yes, so start checking the x coordinate of the cursor. @@ -854,12 +854,12 @@ isright: isleft: - lda c ; Load the escape code into the accumulator. + lda regc ; Load the escape code into the accumulator. cmp #'C' ; Did the user press right? beq @end1 ; Yes, so we're done lda scr_col ; No, but is the cursor at the far left of the screen? beq @wrap ; Yes, so start checking if this is a wrapped line. - lda c ; No, so load the escape code back into the accumulator. + lda regc ; No, so load the escape code back into the accumulator. cmp #'D' ; Did the user press the left arrow key? beq @left ; Yes, so move the cursor left. bra @end1 ; No, so we're done. @@ -877,7 +877,7 @@ isleft: lda #maxcol ; Move the Cursor to the far right of the screen. sta scr_col ; lda #1 ; Tell the escape routine that we were successful. - sta d ; + sta regd ; lda scr_row ; Are we at the top of the screen? beq @scroll ; Yes, so check if we need to scroll. bra @end ; No, so we're done. @@ -892,7 +892,7 @@ isleft: dec scr_col ; Move the cursor left a character. jsr update_pos ; Update it's position. lda #1 ; Tell the escape routine that we succeded. - sta d ; + sta regd ; rts ; We are done @end: jsr update_pos ; Update the cursor position. @@ -903,34 +903,34 @@ isleft: isshftup: - lda c ; Load the escape code back into the accumulator. + lda regc ; Load the escape code back into the accumulator. cmp #'A' ; Did the user press the up arrow key? bne @end ; lda #1 ; - sta d ; + sta regd ; lda scr_str ; beq @end ; @shftup: jsr scrl_up ; lda #1 ; - sta d ; + sta regd ; @end: rts ; isshftdown: - lda c ; Load the escape code back into the accumulator. + lda regc ; Load the escape code back into the accumulator. cmp #'B' ; Did the user press the down arrow key? bne @end ; lda #1 ; - sta d ; + sta regd ; lda scr_end ; cmp #71 ; bcs @end ; @shftdown: jsr scrl_down ; lda #1 ; - sta d ; + sta regd ; @end: rts ; @@ -948,7 +948,7 @@ update_ptr: update_pos: ldb #1 ; Set the F pseudo register to one, to fix some bugs. - stb f ; + stb regf ; jsr update_ptr ; Update the screen buffer index. tay ; Place the index into the Y register. tba ; Reset A. @@ -1070,14 +1070,14 @@ rdrw_row: rdrw_ln: lda scr_row ; pha ; - lda f ; + lda regf ; sta scr_row ; lda scr_col ; pha ; jsr update_pos ; @loop: lda scr_row ; - cmp e ; + cmp rege ; beq @loop1 ; bcs @end ; @loop1: @@ -1092,8 +1092,8 @@ rdrw_ln: sta scr_row ; jsr update_pos ; lda #0 ; - sta e ; - sta f ; + sta rege ; + sta regf ; rts ; diff --git a/programs/sub-suite/subsuite.s b/programs/sub-suite/subsuite.s index 36ac541..d425550 100644 --- a/programs/sub-suite/subsuite.s +++ b/programs/sub-suite/subsuite.s @@ -18,5 +18,7 @@ .qword reset a ;l a +;.org reset +;v ;q d diff --git a/programs/sub-suite/utils.s b/programs/sub-suite/utils.s index 046164a..3ab948b 100644 --- a/programs/sub-suite/utils.s +++ b/programs/sub-suite/utils.s @@ -176,7 +176,7 @@ isdelm2: @loop: ldb dtab2, x ; Get the compare value. beq @other ; We hit the end of the table, so check for the others. - cab ; Are they the same? + cmp b ; Are they the same? beq @r1 ; Yes, so return 1. inx ; No, so increment the table index. bra @loop ; Keep looping. @@ -202,11 +202,11 @@ isdelm2: isdelm: ldx #0 ; Reset X. - stx a ; Reset the shift value. + stx rega ; Reset the shift value. @loop: ldb dtab, x ; Get the compare value. beq @other ; We hit the end of the table, so check for the others. - cab ; Are they the same? + cmp b ; Are they the same? beq @rshft ; Yes, so return 1 << index. inx ; No, so increment the table index. bra @loop ; Keep looping. @@ -222,10 +222,10 @@ isdelm: lda #0 ; Return 0. rts ; End of isdelm. @rshft: - stx a ; Save the shift value. + stx rega ; Save the shift value. ldx #0 ; Reset X. lda #1 ; Set up the bitshift. - lsl a ; Return 1 << X. + lsl rega ; Return 1 << X. rts ; End of isdelm. @@ -235,7 +235,7 @@ get_ptok: @loop: ldb ptok_tab, x ; Get the compare value. beq @other ; We hit the end of the table, so check for the others. - cab ; Are they the same? + cmp b ; Are they the same? beq @rtab ; Yes, so return X. inx ; No, so increment the table index. bra @loop ; Keep looping. @@ -182,7 +182,7 @@ void *run(void *args) { case CPS_IMP: /* Clear Processor Status. */ cpu->ps.u64 = 0; break; - case AAB_IMP: /* Add Accumulator with carry by B register. */ + case ADC_B: /* ADC B register. */ value.u64 = cpu->b; /* Falls Through. */ case ADC_IMM: /* ADC Immediate. */ case ADC_AB: /* ADC Absolute. */ @@ -212,7 +212,7 @@ void *run(void *args) { case JMP_IN: /* JMP Indirect. */ cpu->pc = address.u64; break; - case SAB_IMP: /* Subtract Accumulator with carry by B register. */ + case SBC_B: /* SBC B register. */ value.u64 = cpu->b; /* Falls Through. */ case SBC_IMM: /* SBC Immediate. */ case SBC_AB: /* SBC Absolute. */ @@ -225,7 +225,7 @@ void *run(void *args) { case PLY_IMP: cpu->y = pull(cpu, size, thread); break; /* PuLl Y register from stack. */ case PLX_IMP: cpu->x = pull(cpu, size, thread); break; /* PuLl X register from stack. */ break; - case ABA_IMP: /* bitwise And with Accumulator, and B register. */ + case AND_B: /* AND B register. */ value.u64 = cpu->b; /* Falls Through. */ case AND_IMM: /* AND Immediate. */ case AND_AB: /* AND Absolute. */ @@ -237,7 +237,7 @@ void *run(void *args) { cpu->pc = address.u64; } break; - case OAB_IMP: /* bitwise Or with Accumulator, and B register. */ + case ORA_B: /* ORA B register. */ value.u64 = cpu->b; /* Falls Through. */ case ORA_IMM: /* ORA Immediate. */ case ORA_AB: /* ORA Absolute. */ @@ -252,7 +252,7 @@ void *run(void *args) { cpu->pc = address.u64; } break; - case XAB_IMP: /* bitwise Xor with Accumulator, and B register. */ + case XOR_B: /* XOR B register. */ value.u64 = cpu->b; /* Falls Through. */ case XOR_IMM: /* XOR Immediate. */ case XOR_AB: /* XOR Absolute. */ @@ -267,7 +267,7 @@ void *run(void *args) { cpu->pc = address.u64; } break; - case LLB_IMP: /* Logical shift Left accumulator by B. */ + case LSL_B: /* LSL B register. */ value.u64 = cpu->b; /* Falls Through. */ case LSL_IMM: /* LSL Immediate. */ case LSL_AB: /* LSL Absolute. */ @@ -310,14 +310,14 @@ void *run(void *args) { cpu->pc = address.u64; } break; - case LRB_IMP: /* Logical shift Right accumulator by B. */ + case LSR_B: /* LSR B register. */ value.u64 = cpu->b; /* Falls Through. */ case LSR_IMM: /* LSR Immediate. */ case LSR_AB: /* LSR Absolute. */ case LSR_Z: /* LSR Zero Matrix. */ lsr(cpu, value.u64, thread); break; - case ARB_IMP: /* Arithmetic shift Right accumulator by B. */ + case ASR_B: /* ASR B register. */ value.u64 = cpu->b; /* Falls Through. */ case ASR_IMM: /* ASR Immediate. */ case ASR_AB: /* ASR Absolute. */ @@ -364,7 +364,7 @@ void *run(void *args) { cpu->pc = address.u64; } break; - case RLB_IMP: /* Rotate Left accumulator by B. */ + case ROL_B: /* ROL B register. */ value.u64 = cpu->b; /* Falls Through. */ case ROL_IMM: /* ROL Immediate. */ case ROL_AB: /* ROL Absolute. */ @@ -376,7 +376,7 @@ void *run(void *args) { cpu->pc = address.u64; } break; - case RRB_IMP: /* Rotate Right accumulator by B. */ + case ROR_B: /* ROR B register. */ value.u64 = cpu->b; /* Falls Through. */ case ROR_IMM: /* ROR Immediate. */ case ROR_AB: /* ROR Absolute. */ @@ -388,7 +388,7 @@ void *run(void *args) { cpu->pc = address.u64; } break; - case MAB_IMP: /* Multiply Accumulator by B. */ + case MUL_B: /* MUL B register. */ value.u64 = cpu->b; /* Falls Through. */ case MUL_IMM: /* MUL Immediate. */ case MUL_AB: /* MUL Absolute. */ @@ -401,7 +401,7 @@ void *run(void *args) { } break; case DIV_IMM: /* DIV Immediate. */ - case DAB_IMP: /* Divide Accumulator by B. */ + case DIV_B: /* DIV B register. */ case DIV_AB: /* DIV Absolute. */ case DIV_Z: /* DIV Zero Matrix. */ divd(cpu, value.u64, opcode, thread); @@ -417,7 +417,7 @@ void *run(void *args) { case CPB_IY: /* CPB Indirect Indexed. */ cmp(cpu, value.u64, cpu->b, thread); break; - case CAB_IMP: /* Compare Accumulator, and B. */ + case CMP_B: /* CMP B register. */ value.u64 = cpu->b; /* Falls Through. */ case CMP_IMM: /* CMP Immediate. */ case CMP_AB: /* CMP Absolute. */ @@ -50,6 +50,7 @@ static inline uint64_t get_addr(struct sux *cpu, uint64_t *tmpaddr, uint8_t opco address.u64 = 0; value.u64 = 0; switch (optype[opcode]) { + case BREG: case IMPL: break; case IMM: @@ -125,6 +126,7 @@ static inline uint64_t get_addr(struct sux *cpu, uint64_t *tmpaddr, uint8_t opco iclk++; #endif } + /* Falls Through. */ case IND: setreg(value.u8, +, 0, addr, +, address.u64, 7); #if getclk @@ -293,7 +295,7 @@ static inline void mul(struct sux *cpu, uint64_t value, uint8_t thread) { static inline void divd(struct sux *cpu, uint64_t value, uint8_t opcode, uint8_t thread) { uint64_t sum = cpu->a/value; - if (opcode != DAB_IMP) { + if (opcode != DIV_B) { cpu->b = cpu->a % value; } else { value = cpu->b; @@ -364,4 +366,3 @@ static inline void store(struct sux *cpu, uint64_t address, uint64_t reg, uint8_ #endif #endif } - @@ -3,171 +3,171 @@ static const uint8_t optype[0x100] = { [CPS_IMP ] = IMPL, [ADC_IMM ] = IMM, - [AAB_IMP ] = IMPL, - [ADC_AB ] = ABS, - [LDA_IN ] = IND, + [ROR_IMM ] = IMM, + [CPB_IMM ] = IMM, [ADC_Z ] = ZM, + [ROR_Z ] = ZM, + [CPB_Z ] = ZM, [CLC_IMP ] = IMPL, - [DEX_IMP ] = IMPL, - [DEC_IMP ] = IMPL, - [DEC_AB ] = ABS, - [DEC_Z ] = ZM, + [TAB_IMP ] = IMPL, + [STY_Z ] = ZM, [JMP_AB ] = ABS, + [ADC_AB ] = ABS, + [ROR_AB ] = ABS, + [CPB_AB ] = ABS, + [ADC_B ] = BREG, + [ROR_B ] = BREG, + [STY_AB ] = ABS, + [SEC_IMP ] = IMPL, + [TBA_IMP ] = IMPL, + [JMP_Z ] = ZM, [SBC_IMM ] = IMM, - [SAB_IMP ] = IMPL, - [SBC_AB ] = ABS, - [STA_IN ] = IND, + [MUL_IMM ] = IMM, + [CPX_IMM ] = IMM, [SBC_Z ] = ZM, - [SEC_IMP ] = IMPL, - [INX_IMP ] = IMPL, - [INC_IMP ] = IMPL, - [INC_AB ] = ABS, - [INC_Z ] = ZM, + [MUL_Z ] = ZM, + [CPX_Z ] = ZM, + [CLI_IMP ] = IMPL, + [TAY_IMP ] = IMPL, + [STA_Z ] = ZM, + [STA_ZX ] = ZMX, [JSR_AB ] = ABS, + [SBC_AB ] = ABS, + [MUL_AB ] = ABS, + [CPX_AB ] = ABS, + [SBC_B ] = BREG, + [MUL_B ] = BREG, + [STA_AB ] = ABS, + [SEI_IMP ] = IMPL, + [TYA_IMP ] = IMPL, + [STA_ZY ] = ZMY, + [STA_IX ] = INDX, + [JSR_Z ] = ZM, [AND_IMM ] = IMM, - [ABA_IMP ] = IMPL, - [AND_AB ] = ABS, - [CMP_IN ] = IND, + [DIV_IMM ] = IMM, + [CPY_IMM ] = IMM, [AND_Z ] = ZM, - [CLI_IMP ] = IMPL, - [DEY_IMP ] = IMPL, - [CPB_IMM ] = IMM, - [CPB_AB ] = ABS, - [CPB_Z ] = ZM, - [JMP_Z ] = ZM, - [ORA_IMM ] = IMM, - [OAB_IMP ] = IMPL, - [ORA_AB ] = ABS, - [LDB_IN ] = IND, - [ORA_Z ] = ZM, - [SEI_IMP ] = IMPL, - [INY_IMP ] = IMPL, - [CPX_IMM ] = IMM, - [CPX_AB ] = ABS, + [DIV_Z ] = ZM, [CPY_Z ] = ZM, - [JSR_Z ] = ZM, - [XOR_IMM ] = IMM, - [XAB_IMP ] = IMPL, - [XOR_AB ] = ABS, - [STB_IN ] = IND, - [XOR_Z ] = ZM, [CLV_IMP ] = IMPL, - [CPY_IMM ] = IMM, + [TAX_IMP ] = IMPL, + [STB_Z ] = ZM, + [STB_ZX ] = ZMX, + [RTS_IMP ] = IMPL, + [AND_AB ] = ABS, + [DIV_AB ] = ABS, [CPY_AB ] = ABS, - [CPX_Z ] = ZM, - [BPO_REL ] = REL, - [LSL_IMM ] = IMM, - [LLB_IMP ] = IMPL, - [LSL_AB ] = ABS, - [CPB_IN ] = IND, - [LSL_Z ] = ZM, + [AND_B ] = BREG, + [DIV_B ] = BREG, + [STB_AB ] = ABS, [WAI_IMP ] = IMPL, - [PHP_IMP ] = IMPL, - [TAB_IMP ] = IMPL, - [LDA_IY ] = INDY, - [LDA_IX ] = INDX, - [BNG_REL ] = REL, - [LSR_IMM ] = IMM, - [LRB_IMP ] = IMPL, - [LSR_AB ] = ABS, - [LDY_IN ] = IND, - [LSR_Z ] = ZM, + [TXA_IMP ] = IMPL, + [STB_ZY ] = ZMY, + [STB_IX ] = INDX, + [RTI_IMP ] = IMPL, + [ORA_IMM ] = IMM, + [ASR_IMM ] = IMM, + [LDX_IMM ] = IMM, + [ORA_Z ] = ZM, + [ASR_Z ] = ZM, + [LDX_Z ] = ZM, [BRK_IMP ] = IMPL, + [TYX_IMP ] = IMPL, + [STX_Z ] = ZM, + [PHP_IMP ] = IMPL, + [BPO_REL ] = REL, + [ORA_AB ] = ABS, + [ASR_AB ] = ABS, + [LDX_AB ] = ABS, + [ORA_B ] = BREG, + [ASR_B ] = BREG, + [STX_AB ] = ABS, + [DEY_IMP ] = IMPL, + [TXY_IMP ] = IMPL, + [CPB_IN ] = IND, [PLP_IMP ] = IMPL, - [TBA_IMP ] = IMPL, - [STA_IY ] = INDY, - [STA_IX ] = INDX, + [BNG_REL ] = REL, + [XOR_IMM ] = IMM, + [CMP_IMM ] = IMM, + [DEC_IMP ] = IMPL, + [XOR_Z ] = ZM, + [CMP_Z ] = ZM, + [DEC_Z ] = ZM, + [INY_IMP ] = IMPL, + [TSX_IMP ] = IMPL, + [CMP_IN ] = IND, + [PHA_IMP ] = IMPL, [BCS_REL ] = REL, - [ROL_IMM ] = IMM, - [RLB_IMP ] = IMPL, - [ROL_AB ] = ABS, + [XOR_AB ] = ABS, + [CMP_AB ] = ABS, + [DEC_AB ] = ABS, + [XOR_B ] = BREG, + [CMP_B ] = BREG, + [DEB_IMP ] = IMPL, + [TXS_IMM ] = IMM, [STY_IN ] = IND, - [ROL_Z ] = ZM, - [LDA_ZY ] = ZMY, - [PHA_IMP ] = IMPL, - [TAY_IMP ] = IMPL, - [CMP_IY ] = INDY, - [CMP_IX ] = INDX, - [BCC_REL ] = REL, - [ROR_IMM ] = IMM, - [RRB_IMP ] = IMPL, - [ROR_AB ] = ABS, - [LDX_IN ] = IND, - [ROR_Z ] = ZM, - [STA_ZY ] = ZMY, [PLA_IMP ] = IMPL, - [TYA_IMP ] = IMPL, - [LDB_IY ] = INDY, - [LDB_IX ] = INDX, - [BEQ_REL ] = REL, - [MUL_IMM ] = IMM, - [MAB_IMP ] = IMPL, - [MUL_AB ] = ABS, - [STX_IN ] = IND, - [MUL_Z ] = ZM, - [LDB_ZY ] = ZMY, + [BCC_REL ] = REL, + [LSL_IMM ] = IMM, + [LDY_IMM ] = IMM, + [INC_IMP ] = IMPL, + [LSL_Z ] = ZM, + [LDY_Z ] = ZM, + [INC_Z ] = ZM, + [INB_IMP ] = IMPL, + [CMP_IX ] = INDX, + [LDY_IN ] = IND, [PHB_IMP ] = IMPL, - [TAX_IMP ] = IMPL, - [STB_IY ] = INDY, - [STB_IX ] = INDX, - [BNE_REL ] = REL, - [DIV_IMM ] = IMM, - [DAB_IMP ] = IMPL, - [DIV_AB ] = ABS, - [JSR_IN ] = IND, - [DIV_Z ] = ZM, - [STB_ZY ] = ZMY, - [PLB_IMP ] = IMPL, - [TXA_IMP ] = IMPL, - [CPB_IY ] = INDY, + [BEQ_REL ] = REL, + [LSL_AB ] = ABS, + [LDY_AB ] = ABS, + [INC_AB ] = ABS, + [LSL_B ] = BREG, + [DEX_IMP ] = IMPL, [CPB_IX ] = INDX, - [BVS_REL ] = REL, - [CMP_IMM ] = IMM, - [CAB_IMP ] = IMPL, - [CMP_AB ] = ABS, - [JMP_IN ] = IND, - [CMP_Z ] = ZM, - [LDA_ZX ] = ZMX, - [LDX_IMM ] = IMM, - [TYX_IMP ] = IMPL, - [LDX_AB ] = ABS, - [LDX_Z ] = ZM, - [BVC_REL ] = REL, + [LDX_IN ] = IND, + [PLB_IMP ] = IMPL, + [BNE_REL ] = REL, + [LSR_IMM ] = IMM, [LDA_IMM ] = IMM, - [DEB_IMP ] = IMPL, - [LDA_AB ] = ABS, + [LDA_IN ] = IND, + [LSR_Z ] = ZM, [LDA_Z ] = ZM, - [STA_ZX ] = ZMX, + [LDA_ZX ] = ZMX, + [INX_IMP ] = IMPL, + [STA_IY ] = INDY, + [STX_IN ] = IND, [PHY_IMP ] = IMPL, - [TXY_IMP ] = IMPL, - [STA_AB ] = ABS, - [STA_Z ] = ZM, - [BRA_REL ] = REL, + [BVS_REL ] = REL, + [LSR_AB ] = ABS, + [LDA_AB ] = ABS, + [STA_IN ] = IND, + [LSR_B ] = BREG, + [LDA_ZY ] = ZMY, + [LDA_IX ] = INDX, + [LDA_IY ] = INDY, + [STB_IY ] = INDY, + [JSR_IN ] = IND, + [PLY_IMP ] = IMPL, + [BVC_REL ] = REL, + [ROL_IMM ] = IMM, [LDB_IMM ] = IMM, - [INB_IMP ] = IMPL, - [LDB_AB ] = ABS, + [LDB_IN ] = IND, + [ROL_Z ] = ZM, [LDB_Z ] = ZM, [LDB_ZX ] = ZMX, - [PLY_IMP ] = IMPL, - [TSX_IMP ] = IMPL, - [STB_AB ] = ABS, - [STB_Z ] = ZM, - [RTS_IMP ] = IMPL, - [LDY_IMM ] = IMM, - [LDY_AB ] = ABS, - [LDY_Z ] = ZM, - [STB_ZX ] = ZMX, - [PHX_IMP ] = IMPL, + [LDB_IY ] = INDY, [NOP_IMP ] = IMPL, - [STY_AB ] = ABS, - [STY_Z ] = ZM, - [RTI_IMP ] = IMPL, - [ASR_IMM ] = IMM, - [ARB_IMP ] = IMPL, - [ASR_AB ] = ABS, - [ASR_Z ] = ZM, - [PLX_IMP ] = IMPL, - [TXS_IMM ] = IMM, - [STX_AB ] = ABS, - [STX_Z ] = ZM + [JMP_IN ] = IND, + [PHX_IMP ] = IMPL, + [BRA_REL ] = REL, + [ROL_AB ] = ABS, + [LDB_AB ] = ABS, + [STB_IN ] = IND, + [ROL_B ] = BREG, + [LDB_ZY ] = ZMY, + [LDB_IX ] = INDX, + [CMP_IY ] = INDY, + [CPB_IY ] = INDY, + [PLX_IMP ] = IMPL }; diff --git a/test/fib2.s b/test/fib2.s index 9bb2406..ee58697 100644 --- a/test/fib2.s +++ b/test/fib2.s @@ -11,7 +11,7 @@ start: clc ; fib: tya ; - aab ; Add x with y. But did we also carry over? + adc b ; Add x with y. But did we also carry over? bcs start ; Yes, so restart. tax ; tya ; diff --git a/test/ind-addr.s b/test/ind-addr.s index 005c016..aa4686b 100644 --- a/test/ind-addr.s +++ b/test/ind-addr.s @@ -14,11 +14,11 @@ main: jmp main rotate_left: - rlb + rol b rts rotate_right: - rrb + ror b rts .org $FFC0 @@ -26,4 +26,3 @@ rotate_right: a d - diff --git a/test/popcnt2.s b/test/popcnt2.s index aaa4743..503b074 100644 --- a/test/popcnt2.s +++ b/test/popcnt2.s @@ -10,7 +10,7 @@ popcnt: tab ; Place the value in the B register. deb ; Decrement the temp value by one. iny ; Increment the bit count. - aba ; AND value with value-1. + and b ; AND value with value-1. bra @loop ; Keep looping. @end: tya ; Return the bit count. |