diff options
| -rw-r--r-- | opcode.h | 176 | ||||
| -rw-r--r-- | sux.c | 31 |
2 files changed, 119 insertions, 88 deletions
@@ -1,88 +1,88 @@ -#define OPNAME(opcode) #opcode -#define CPS 0x00 -#define ADC 0x01 -#define PHP 0x08 -#define PHA 0x09 -#define PHY 0x0A -#define PAY 0x0B -#define PHX 0x0C -#define PAX 0x0D -#define JMP 0x10 -#define SBC 0x11 -#define PLP 0x18 -#define PLA 0x19 -#define PLY 0x1A -#define PYA 0x1B -#define PLX 0x1C -#define PXA 0x1D -#define JSR 0x20 -#define AND 0x21 -#define ANY 0x22 -#define AAY 0x23 -#define ANX 0x24 -#define AAX 0x25 -#define TSR 0x28 -#define BPO 0x30 -#define ORA 0x31 -#define ORY 0x32 -#define OAY 0x33 -#define ORX 0x34 -#define OAX 0x35 -#define SEZ 0x38 -#define BNG 0x40 -#define XOR 0x41 -#define XRY 0x42 -#define XAY 0x43 -#define XRX 0x44 -#define XAX 0x45 -#define CLZ 0x48 -#define BCS 0x50 -#define SLA 0x51 -#define SEC 0x58 -#define BCC 0x60 -#define SRA 0x61 -#define CLC 0x68 -#define BEQ 0x70 -#define ROL 0x71 -#define SSP 0x78 -#define BNE 0x80 -#define ROR 0x81 -#define CSP 0x88 -#define BVS 0x90 -#define MUL 0x91 -#define SEV 0x98 -#define BVC 0xA0 -#define DIV 0xA1 -#define CLV 0xA8 -#define RTS 0xB0 -#define CMP 0xB1 -#define CPY 0xB2 -#define CAY 0xB3 -#define CPX 0xB4 -#define CAX 0xB5 -#define RTT 0xB8 -#define RTI 0xC0 -#define INC 0xC1 -#define INY 0xC2 -#define IAY 0xC3 -#define INX 0xC4 -#define IAX 0xC5 -#define SFI 0xC8 -#define DEC 0xD1 -#define DEY 0xD2 -#define DAY 0xD3 -#define DEX 0xD4 -#define DAX 0xD5 -#define CFI 0xD8 -#define LDA 0xE1 -#define LDY 0xE2 -#define LAY 0xE3 -#define LDX 0xE4 -#define LAX 0xE5 -#define NOP 0xE8 -#define STA 0xF1 -#define STY 0xF2 -#define SAY 0xF3 -#define STX 0xF4 -#define SAX 0xF5 -#define BRK 0xF8 +#define OPNAME(opcode) #opcode /* Get name of Opcode, for dissambly. */ +#define CPS 0x00 /* Clear Processor Status. */ +#define ADC 0x01 /* ADd with Carry. */ +#define PHP 0x08 /* PusH Processor status to stack. */ +#define PHA 0x09 /* PusH Accumulator to stack. */ +#define PHY 0x0A /* PusH Y register to stack. */ +#define PAY 0x0B /* Push Accumulator, and Y register to stack. */ +#define PHX 0x0C /* PusH X register to stack. */ +#define PAX 0x0D /* Push Accumulator, and X register to stack. */ +#define JMP 0x10 /* JuMP to memory location. */ +#define SBC 0x11 /* SuBtract with Carry. */ +#define PLP 0x18 /* PuLl Processor status from stack. */ +#define PLA 0x19 /* PuLl Accumulator from stack. */ +#define PLY 0x1A /* PuLl Y register from stack. */ +#define PYA 0x1B /* Pull Y register, and Accumulator from stack. */ +#define PLX 0x1C /* PuLl X register from stack. */ +#define PXA 0x1D /* Pull X register, and Accumulator from stack. */ +#define JSR 0x20 /* Jump to SubRoutine. */ +#define AND 0x21 /* bitwise AND with accumulator. */ +#define ANY 0x22 /* bitwise ANd with Y register.*/ +#define AAY 0x23 /* bitwise And with Accumulator, and Y register. */ +#define ANX 0x24 /* bitwise ANd with X register. */ +#define AAX 0x25 /* bitwise And with Accumulator, and X register. */ +#define TSR 0x28 /* multi-Threaded jump to SubRoutine. */ +#define BPO 0x30 /* Branch if POsitive. */ +#define ORA 0x31 /* bitwise OR with Accumulator. */ +#define ORY 0x32 /* bitwise OR with Y register. */ +#define OAY 0x33 /* bitwise Or with Accumulator, and Y register. */ +#define ORX 0x34 /* bitwise OR with X register. */ +#define OAX 0x35 /* bitwise Or with Accumulator, and X register. */ +#define SEZ 0x38 /* SEt Zero flag. */ +#define BNG 0x40 /* Branch if NeGative. */ +#define XOR 0x41 /* bitwise XOR with accumulator. */ +#define XRY 0x42 /* bitwise XoR with Y register. */ +#define XAY 0x43 /* bitwise Xor with Accumulator, and Y register. */ +#define XRX 0x44 /* bitwise XoR with X register. */ +#define XAX 0x45 /* bitwise Xor with Accumulator, and X register. */ +#define CLZ 0x48 /* CLear Zero flag. */ +#define BCS 0x50 /* Branch if Carry Set. */ +#define SLA 0x51 /* Shift Left with Accumulator. */ +#define SEC 0x58 /* SEt Carry flag. */ +#define BCC 0x60 /* Branch if Carry Clear. */ +#define SRA 0x61 /* Shift Right with Accumulator. */ +#define CLC 0x68 /* CLear Carry flag. */ +#define BEQ 0x70 /* Branch if EQual. */ +#define ROL 0x71 /* ROtate Left. */ +#define SSP 0x78 /* Set Stack Protection flag. */ +#define BNE 0x80 /* Branch if Not Equal. */ +#define ROR 0x81 /* ROtate Right. */ +#define CSP 0x88 /* Clear Stack Protection flag. */ +#define BVS 0x90 /* Branch if oVerflow Set. */ +#define MUL 0x91 /* MULtiply with accumulator. */ +#define SEV 0x98 /* SEt oVerflow flag. */ +#define BVC 0xA0 /* Branch if oVerflow Clear. */ +#define DIV 0xA1 /* DIVide with accumulator. */ +#define CLV 0xA8 /* CLear oVerflow flag. */ +#define RTS 0xB0 /* ReTurn from Subroutine. */ +#define CMP 0xB1 /* CoMPare accumulator. */ +#define CPY 0xB2 /* ComPare Y register. */ +#define CAY 0xB3 /* Compare Accumulator, and Y register. */ +#define CPX 0xB4 /* ComPare X register. */ +#define CAX 0xB5 /* Compare Accumulator, and X register. */ +#define RTT 0xB8 /* ReTurn from multi-Threaded subroutine. */ +#define RTI 0xC0 /* ReTurn from Interupt. */ +#define INC 0xC1 /* INCrement accumulator. */ +#define INY 0xC2 /* INcrement Y register. */ +#define IAY 0xC3 /* Increment Accumulator, and Y register. */ +#define INX 0xC4 /* INcrement X register. */ +#define IAX 0xC5 /* Increment Accumulator, and X register. */ +#define SFB 0xC8 /* Set Fetch Byte(s) sub-register. */ +#define DEC 0xD1 /* DECrement accumulator. */ +#define DEY 0xD2 /* DEcrement Y register. */ +#define DAY 0xD3 /* Decrement Accumulator, and Y register. */ +#define DEX 0xD4 /* DEcrement X register. */ +#define DAX 0xD5 /* Decrement Accumulator, and X register. */ +#define CFB 0xD8 /* Clear Fetch Byte(s) sub-register. */ +#define LDA 0xE1 /* LoaD Accumulator. */ +#define LDY 0xE2 /* LoaD Y register. */ +#define LAY 0xE3 /* Load Accumulator, and Y register. */ +#define LDX 0xE4 /* LoaD X register. */ +#define LAX 0xE5 /* Load Accumulator, and X register. */ +#define NOP 0xE8 /* No OPeration. */ +#define STA 0xF1 /* STore Accumulator. */ +#define STY 0xF2 /* STore Y register. */ +#define SAY 0xF3 /* Store Accumulator, and Y register. */ +#define STX 0xF4 /* STore X register. */ +#define SAX 0xF5 /* Store Accumulator, and X register. */ +#define BRK 0xF8 /* BReaK. */ @@ -0,0 +1,31 @@ +#include <limits.h> +#include "opcode.h" +#include <stdint.h> +uint64_t a; /* Accumulator. */ +uint64_t y; /* Y index. */ +uint64_t x; /* X index. */ +uint64_t ps; /* Processor status. */ + +uint64_t alu(uint8_t opcode, uint64_t value) { + uint64_t sum; + uint8_t carry, vf; + switch(opcode) { + /* Add with carry. */ + case ADC: + sum = a+value+carry; + vf = (~(a^value) & (a^sum & 0x80)); + carry = (sum < value) ? 1 : 0; + a |= sum; + break; + /* Subtract with carry. */ + case SBC: + sum = a-value-!carry + vf = (a^value) & (a^sum) & 0x80; + carry = (sum > value) ? 1 : 0; + a |= sum; + break; + + + + } +} |