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-rw-r--r--opcode.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/opcode.h b/opcode.h
index 833bfe5..b98803b 100644
--- a/opcode.h
+++ b/opcode.h
@@ -18,6 +18,31 @@
#define V (1 << 6) /* oVerflow flag. */
#define N (1 << 7) /* Negative flag. */
+extern uint8_t get_addrsize(uint8_t prefix, uint8_t addrmode);
+
+/* reg_expr, and val_expr are the arithmetic expressions
+ * that will be used for either the value, or register, such as '+', or '-'.
+ */
+#define setreg(reg, reg_expr, reg_idx, val, val_expr, val_idx, size) {\
+ switch (size) {\
+ case 7: reg[(reg_idx) reg_expr 7] = val[(val_idx) val_expr 7];\
+ case 6: reg[(reg_idx) reg_expr 6] = val[(val_idx) val_expr 6];\
+ case 5: reg[(reg_idx) reg_expr 5] = val[(val_idx) val_expr 5];\
+ case 4: reg[(reg_idx) reg_expr 4] = val[(val_idx) val_expr 4];\
+ case 3: reg[(reg_idx) reg_expr 3] = val[(val_idx) val_expr 3];\
+ case 2: reg[(reg_idx) reg_expr 2] = val[(val_idx) val_expr 2];\
+ case 1: reg[(reg_idx) reg_expr 1] = val[(val_idx) val_expr 1];\
+ case 0: reg[(reg_idx) reg_expr 0] = val[(val_idx) val_expr 0];\
+ }\
+}
+
+#define setreg_sw(reg, reg_idx, val, val_idx, prefix, addrmode, type) {\
+ switch (type) {\
+ case RS: setreg(reg, +, reg_idx, val, +, val_idx, (1 << (prefix >> 4))-1); break;\
+ case AM: setreg(reg, +, reg_idx, val, +, val_idx, get_addrsize(prefix, addrmode)); break;\
+ }\
+}
+
extern uint8_t *addr; /* Address Space. */
union reg {
@@ -37,3 +62,5 @@ struct sux {
};
extern int asmmon();
+
+enum sw_type {RS, AM, BYTE};