cisc-0.2 - An emulator for the Sux instruction set.

Age	Commit message (Expand)	Author
2022-02-02	sux.h: Add third implementation of the `t()` macro.	mrb0nk500
2022-02-02	sux.h: Corrected some typos, and fixed some bugs in	mrb0nk500
2022-01-29	sux.h: Added bitmasks for updating the status flags.	mrb0nk500
2022-01-29	sux.h: Make `msb` non const.	mrb0nk500
2022-01-24	sux.h: Add bitmasks for writing registers.	mrb0nk500
2022-01-24	sux.h: Corrected typo in `reg2` initialization.	mrb0nk500
2022-01-24	sux.h: Add bitmasks for arithmetic operations.	mrb0nk500
2022-01-24	sux.h: Add bitmasks for register transfers.	mrb0nk500
2022-01-24	sux.h: Correct typos in bitmasks for register	mrb0nk500
2022-01-21	sux.h: Use conditional branch code for unconditional	mrb0nk500
2022-01-21	sux.h: Add bitmask for relative addressing.	mrb0nk500
2022-01-21	sux.h: Add bitmasks for conditional branches.	mrb0nk500
2022-01-21	sux.h: Corrected typos in bitmasks that dealt with	mrb0nk500
2022-01-21	opcode-bitmask-gen: Add relative addressing to the	mrb0nk500
2022-01-21	sux.h: Add bitmasks for setting/testing/clearing flags,	mrb0nk500
2022-01-19	sux.h: Add bitmask for unconditional jumps.	mrb0nk500
2022-01-19	sux.h: Add bitmasks for stack related operations.	mrb0nk500
2022-01-19	sux.h: Make `rs` non const.	mrb0nk500
2022-01-19	sux.h: Set program counter to interrupt vectors, when	mrb0nk500
2022-01-19	sux.h: Add bitmasks for writing a value to memory.	mrb0nk500
2022-01-19	sux.h: Corrected bitmask for `reg = &cpu->a;`.	mrb0nk500
2022-01-19	opcode-bitmask-gen: Fixed bug that occurred when masking	mrb0nk500
2022-01-18	opcode-bitmask-gen: Invert the addressing mode bitmask	mrb0nk500
2022-01-18	Add support for getting an inverted addressing mode	mrb0nk500
2022-01-18	Add bitmasks for operations that mogrify (overwrite)	mrb0nk500
2022-01-18	Add bitmask for instructions that use the processor	mrb0nk500
2022-01-18	Remove `pbits` from instruction handler.	mrb0nk500
2022-01-18	Initialize `tmp`, and `tmp2` to `0`, rather than `-1`.	mrb0nk500
2022-01-18	Add the rest of the load opcodes to the other register	mrb0nk500
2022-01-18	Add `LDA` opcodes to accumulator bitmask.	mrb0nk500
2022-01-16	Add bitmasks for the registers.	mrb0nk500
2022-01-16	Fix bug in print_mask() where it'd always use the first	mrb0nk500
2022-01-14	Consolidate reading addresses for non-indirect addressing	mrb0nk500
2022-01-14	Add bitmasks for indexing, and indirect addressing.	mrb0nk500
2022-01-14	Add bitmasks for reading data from memory, and	mrb0nk500
2022-01-14	Add bitmask for absolute addressing.	mrb0nk500
2022-01-14	Add a bitmask generator for the new instruction handler	mrb0nk500
2022-01-14	Start work on new instruction handler macro.	mrb0nk500
2021-05-09	Subtract another 16 from the size in clr_arr.HEAD master	mrb0nk500
2021-05-09	Replace call to memcpy, with call to memcpy_dir.	mrb0nk500
2021-05-09	Add a end to start version of memcpy, and a selectable	mrb0nk500
2021-05-09	Add scr_ptr to the list of outputted addresses when in	mrb0nk500
2021-05-08	Fixed a bug in print_char caused by not zero extending	mrb0nk500
2021-05-08	Fixed a bug in print_str to do with clobbered	mrb0nk500
2021-05-08	Replace get_ctrlidx with get_index in print_char.	mrb0nk500
2021-05-08	Add a new subroutine called get_index.	mrb0nk500
2021-05-08	Get the pointer from the control code handler table	mrb0nk500
2021-05-08	Replace the old string parsing code in	mrb0nk500
2021-05-08	Add support for saving to a string buffer in	mrb0nk500
2021-05-08	Rewrite `clr_arr` to use the ortho extension.	mrb0nk500