| Age | Commit message (Collapse) | Author |
|---|
|
|
|
|
|
|
|
The other one I was about to do would've been harder
to read, and understand.
So, I've decided to write a more readable version.
|
|
generator.
This will make it easier in the long run to modify
instructions, add new instructions, and move the opcode
tables around.
|
|
|
|
instruction handler for reading the interrupt vectors.
|
|
|
|
handler.
|
|
This is used by the delay code in `get_key()`.
|
|
|
|
cycle.
|
|
|
|
This function will increment the cycle count by one
everytime it's called.
Later on, this'll help simplify I/O emulation, as I've
considered implementing read, write, and tick callbacks
for I/O.
|
|
|
|
the bitmasks.
|
|
|
|
|
|
|
|
|
|
|
|
|
|
assignments, and for inverting `tmp`.
|
|
jumps.
This gets rid of some code duplication, and is also
how `bra` was implemented anyway. So, might as well use
it for unconditional jumps too.
|
|
|
|
|
|
conditional branches.
|
|
list of addressing modes.
oof, forgot about that until just now.
|
|
and for bitwise operations.
|
|
|
|
|
|
|
|
an interrupt gets triggered.
This is done in order to properly use the `read_addr()`
function.
|
|
|
|
|
|
out unwanted bits when inverting the addressing mode
bitmask.
|
|
after all bits have been found, if inverting is enabled.
|
|
bitmask in `opcode-bitmask-gen`.
|
|
memory directly.
|
|
status register.
|
|
|
|
|
|
bitmasks.
|
|
|
|
|
|
instruction entry, rather than the entry of the supplied
instruction id(s).
|
|
modes into a single block.
|
|
|
|
immediate data.
|
|
|
