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The other one I was about to do would've been harder
to read, and understand.
So, I've decided to write a more readable version.
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generator.
This will make it easier in the long run to modify
instructions, add new instructions, and move the opcode
tables around.
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instruction handler for reading the interrupt vectors.
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handler.
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This is used by the delay code in `get_key()`.
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cycle.
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This function will increment the cycle count by one
everytime it's called.
Later on, this'll help simplify I/O emulation, as I've
considered implementing read, write, and tick callbacks
for I/O.
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the bitmasks.
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assignments, and for inverting `tmp`.
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jumps.
This gets rid of some code duplication, and is also
how `bra` was implemented anyway. So, might as well use
it for unconditional jumps too.
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conditional branches.
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list of addressing modes.
oof, forgot about that until just now.
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and for bitwise operations.
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an interrupt gets triggered.
This is done in order to properly use the `read_addr()`
function.
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out unwanted bits when inverting the addressing mode
bitmask.
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after all bits have been found, if inverting is enabled.
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bitmask in `opcode-bitmask-gen`.
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memory directly.
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status register.
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bitmasks.
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instruction entry, rather than the entry of the supplied
instruction id(s).
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modes into a single block.
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