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2019-12-08Added support for resolving fixup labels.mrb0nk500
AKA, referencing a label before it has been declared yet.
2019-12-07Added six instructions for transfering datamrb0nk500
between the three main registers. These instructions are: TAY: Transfer Accumulator to Y. TAX: Transfer Accumulator to X. TYX: Transfer Y to X. TYA: Transfer Y to Accumulator. TXA: Transfer X to Accumulator. TXY: Transfer X to Y.
2019-12-06Finally got multithreading support working!!mrb0nk500
I have also added a program that computes the Fibonacci sequence that I wrote in Sux assembly.
2019-12-02Added the ability to disable the prefix byte.mrb0nk500
Any instructions that either have a register size of 8 bits, use implied addressing, or branch can save a byte by disabling the prefix byte. It does this by checking if the first three bits are all set to 1. If true, then it will treat it as a prefix byte, otherwise, it will treat it as an opcode.
2019-11-30Start work on rev2 of Sux.mrb0nk500
Added a prefix byte to tell the CPU certain information such as, how many bytes to load into the registers, or what ISA extension we want to use. I also added an assembly language monitor, so that I don't have to write stuff in machine code.
2019-11-26rev1 of Sux has been completed!rev1mrb0nk500
I have now implemented BRK, and RTI. Also, BieHDC, and I will both be working on rev2.
2019-11-26Revamped the entire emulator.mrb0nk500
I finally implemented the other addressing modes, and added a Makefile. Not sure when I will start work on rev2 of Sux, but it will be sometime soon.
2019-11-20Fixed some bugs in some instructions.mrb0nk500
Fixed stack based instructions. Fixed the rotate instructions. Added carry to the shift instructions.
2019-11-17The emulator is working!!!mrb0nk500
2019-11-16Implemented memory based instructions, and removedmrb0nk500
some unneeded instructions.
2019-11-11Added comments in opcode.h, and started work on themrb0nk500
Sux emulator.
2019-11-10Initial commit.mrb0nk500