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between the three main registers.
These instructions are:
TAY: Transfer Accumulator to Y.
TAX: Transfer Accumulator to X.
TYX: Transfer Y to X.
TYA: Transfer Y to Accumulator.
TXA: Transfer X to Accumulator.
TXY: Transfer X to Y.
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I have also added a program that computes the
Fibonacci sequence that I wrote in Sux assembly.
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Any instructions that either have a register size of
8 bits, use implied addressing, or branch can save a
byte by disabling the prefix byte.
It does this by checking if the first three bits are
all set to 1.
If true, then it will treat it as a prefix
byte, otherwise, it will treat it as an opcode.
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Added a prefix byte to tell the CPU certain
information such as, how many bytes to load into the
registers, or what ISA extension we want to use.
I also added an assembly language monitor, so that I
don't have to write stuff in machine code.
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I have now implemented BRK, and RTI.
Also, BieHDC, and I will both be working on rev2.
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I finally implemented the other addressing modes, and
added a Makefile.
Not sure when I will start work on rev2 of Sux, but it
will be sometime soon.
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Fixed stack based instructions.
Fixed the rotate instructions.
Added carry to the shift instructions.
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some unneeded instructions.
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Sux emulator.
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