cisc-0.2 - An emulator for the Sux instruction set.

Age	Commit message (Collapse)	Author
2019-12-17	Revamped how the keyboard works.	mrb0nk500
	It now does not use an interrupt, although, in the emulator, it does act like an interrupt, when the keypoll macro is set to 0.
2019-12-14	We now have keyboard support!!!	mrb0nk500
	I also added the WAI instruction, which puts the thread that executed it, into a catatonic stat, where it can't do anything, until an interrupt occurs. I will be starting work on GFsuX next. I also might start work on SuBAsm, the Sux Bootstrapping Assembler.
2019-12-13	Added support for specifying the number of bytes as	mrb0nk500
	the suffix. I added this because BieHDC said the already existing notation glowed in the dark too much.
2019-12-11	We can print to the Screen!!!!	mrb0nk500
	I also added the ASR instruction, for doing arithmetic shifts, and have added a hello world program.
2019-12-08	Added support for resolving fixup labels.	mrb0nk500
	AKA, referencing a label before it has been declared yet.
2019-12-07	Added six instructions for transfering data	mrb0nk500
	between the three main registers. These instructions are: TAY: Transfer Accumulator to Y. TAX: Transfer Accumulator to X. TYX: Transfer Y to X. TYA: Transfer Y to Accumulator. TXA: Transfer X to Accumulator. TXY: Transfer X to Y.
2019-12-06	Delete opcode.c, since I added all the functions	mrb0nk500
	from it into sux.c.
2019-12-06	Finally got multithreading support working!!	mrb0nk500
	I have also added a program that computes the Fibonacci sequence that I wrote in Sux assembly.
2019-12-03	Start optimizing the emulator.	mrb0nk500

2019-12-02	Started implementing some pthreads support.	mrb0nk500

2019-12-02	Added the ability to disable the prefix byte.	mrb0nk500
	Any instructions that either have a register size of 8 bits, use implied addressing, or branch can save a byte by disabling the prefix byte. It does this by checking if the first three bits are all set to 1. If true, then it will treat it as a prefix byte, otherwise, it will treat it as an opcode.
2019-11-30	Start work on rev2 of Sux.	mrb0nk500
	Added a prefix byte to tell the CPU certain information such as, how many bytes to load into the registers, or what ISA extension we want to use. I also added an assembly language monitor, so that I don't have to write stuff in machine code.
2019-11-26	rev1 of Sux has been completed!rev1	mrb0nk500
	I have now implemented BRK, and RTI. Also, BieHDC, and I will both be working on rev2.
2019-11-26	Revamped the entire emulator.	mrb0nk500
	I finally implemented the other addressing modes, and added a Makefile. Not sure when I will start work on rev2 of Sux, but it will be sometime soon.
2019-11-20	Fixed some bugs in some instructions.	mrb0nk500
	Fixed stack based instructions. Fixed the rotate instructions. Added carry to the shift instructions.
2019-11-17	The emulator is working!!!	mrb0nk500

2019-11-16	Implemented memory based instructions, and removed	mrb0nk500
	some unneeded instructions.
2019-11-13	Actually set the Processor Status flags correctly, and	mrb0nk500
	revamp some other stuff.
2019-11-11	Started work on simultanious multithreading, and branching.	mrb0nk500

2019-11-11	Added more instructions to the ALU.	mrb0nk500

2019-11-11	Added comments in opcode.h, and started work on the	mrb0nk500
	Sux emulator.