| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2022-02-13 | sux.h: Add bitmask for b register addressing mode. | mrb0nk500 | |
| 2022-02-09 | sux.{c,h}, opcode.h, disasm.c: Add code to use the new | mrb0nk500 | |
| instruction handler for reading the interrupt vectors. | |||
| 2022-02-09 | sux.h: Fix some bugs in the interrupt bitmasks. | mrb0nk500 | |
| 2022-02-02 | sux.c, sux.h: Add code for using the new instruction | mrb0nk500 | |
| handler. | |||
| 2022-02-02 | sux.h: Remove unneeded, and inaccurate cycle increments. | mrb0nk500 | |
| 2022-02-02 | sux.h, io.c: Added support for setting key timeout. | mrb0nk500 | |
| 2022-02-02 | sux.h: Added a `tick()` function. | mrb0nk500 | |
| This function will increment the cycle count by one everytime it's called. Later on, this'll help simplify I/O emulation, as I've considered implementing read, write, and tick callbacks for I/O. | |||
| 2022-02-02 | sux.h: Add third implementation of the `t()` macro. | mrb0nk500 | |
| 2022-02-02 | sux.h: Corrected some typos, and fixed some bugs in | mrb0nk500 | |
| the bitmasks. | |||
| 2022-01-29 | sux.h: Added bitmasks for updating the status flags. | mrb0nk500 | |
| 2022-01-29 | sux.h: Make `msb` non const. | mrb0nk500 | |
| 2022-01-24 | sux.h: Add bitmasks for writing registers. | mrb0nk500 | |
| 2022-01-24 | sux.h: Corrected typo in `reg2` initialization. | mrb0nk500 | |
| 2022-01-24 | sux.h: Add bitmasks for arithmetic operations. | mrb0nk500 | |
| 2022-01-24 | sux.h: Add bitmasks for register transfers. | mrb0nk500 | |
| 2022-01-24 | sux.h: Correct typos in bitmasks for register | mrb0nk500 | |
| assignments, and for inverting `tmp`. | |||
| 2022-01-21 | sux.h: Use conditional branch code for unconditional | mrb0nk500 | |
| jumps. This gets rid of some code duplication, and is also how `bra` was implemented anyway. So, might as well use it for unconditional jumps too. | |||
| 2022-01-21 | sux.h: Add bitmask for relative addressing. | mrb0nk500 | |
| 2022-01-21 | sux.h: Add bitmasks for conditional branches. | mrb0nk500 | |
| 2022-01-21 | sux.h: Corrected typos in bitmasks that dealt with | mrb0nk500 | |
| conditional branches. | |||
| 2022-01-21 | sux.h: Add bitmasks for setting/testing/clearing flags, | mrb0nk500 | |
| and for bitwise operations. | |||
| 2022-01-19 | sux.h: Add bitmask for unconditional jumps. | mrb0nk500 | |
| 2022-01-19 | sux.h: Add bitmasks for stack related operations. | mrb0nk500 | |
| 2022-01-19 | sux.h: Make `rs` non const. | mrb0nk500 | |
| 2022-01-19 | sux.h: Set program counter to interrupt vectors, when | mrb0nk500 | |
| an interrupt gets triggered. This is done in order to properly use the `read_addr()` function. | |||
| 2022-01-19 | sux.h: Add bitmasks for writing a value to memory. | mrb0nk500 | |
| 2022-01-19 | sux.h: Corrected bitmask for `reg = &cpu->a;`. | mrb0nk500 | |
| 2022-01-18 | Add bitmasks for operations that mogrify (overwrite) | mrb0nk500 | |
| memory directly. | |||
| 2022-01-18 | Add bitmask for instructions that use the processor | mrb0nk500 | |
| status register. | |||
| 2022-01-18 | Remove `pbits` from instruction handler. | mrb0nk500 | |
| 2022-01-18 | Initialize `tmp`, and `tmp2` to `0`, rather than `-1`. | mrb0nk500 | |
| 2022-01-18 | Add the rest of the load opcodes to the other register | mrb0nk500 | |
| bitmasks. | |||
| 2022-01-18 | Add `LDA` opcodes to accumulator bitmask. | mrb0nk500 | |
| 2022-01-16 | Add bitmasks for the registers. | mrb0nk500 | |
| 2022-01-14 | Consolidate reading addresses for non-indirect addressing | mrb0nk500 | |
| modes into a single block. | |||
| 2022-01-14 | Add bitmasks for indexing, and indirect addressing. | mrb0nk500 | |
| 2022-01-14 | Add bitmasks for reading data from memory, and | mrb0nk500 | |
| immediate data. | |||
| 2022-01-14 | Add bitmask for absolute addressing. | mrb0nk500 | |
| 2022-01-14 | Start work on new instruction handler macro. | mrb0nk500 | |
| This macro will create a function for each opcode, but with only a single block of code for each one. It uses a bitmask (one bit for each opcode) that will evaluate which blocks of code are used by each opcode. The bitmask checks are (usually) evaluated at compile time, which means that each function will only have the blocks that had the bit for that opcode set in the bitmask. | |||
| 2021-04-04 | - Fixed a bug to do with how SIB operands were parsed | mrb0nk500 | |
| in the assembler. - Rewrote more of the SuB Suite to use the new calling convention. - Fixed a bug to do with SIB operands in the emulator's disassembler. - Made the MMV instruction not require a loop prefix for copying data. | |||
| 2021-02-13 | - Reverted back one commit before the previous commit. | mrb0nk500 | |
| This is because the previous commit actually created a bug, rather than fixing one. - Added JMP, and JSR to the ortho extension, and implemented them both in the assembler, and emulator. | |||
| 2021-01-27 | - Fixed some bugs in the emulator. | mrb0nk500 | |
| - Started work on implementing the Super VIA emulation. - Added support for disabling disassembly per instruction, when in debug mode. - Did some more work on rewriting the SuB Suite to work with the new calling convention. - Rewrote the symbol handling code in the emulator's assembler, to make it both simpler, and to add support for arbitrarily deep symbol scopes. - Added support for arbitrarily deep local symbol scopes. For example, to declare a symbol of depth 2, you add two '@' characters to the start of the symbol name. In other words, the number of '@' characters before the symbol name is what determines the scope of that symbol. And to use a symbol thats outside the current scope, you would use the same syntax as using a struct member, so you would do `global.local`. | |||
| 2020-12-09 | - Made the emulator's debugger use individual windows. | mrb0nk500 | |
| I mainly did this to be able to display all 16 main registers, but also to simplify the debugger. | |||
| 2020-12-09 | - Made the `set` instruction also set the Zero flag. | mrb0nk500 | |
| This was done in order to save three bytes whenever you want to immediatly do a conditional branch after the `set` instruction. | |||
| 2020-12-09 | - Implemented support for the `set` instruction in the | mrb0nk500 | |
| assembler. The main thing I had to do was implement the parsing of the condition code token, but that wasn't hard to do, since I had already done the lexing part already. The next thing to do, will be to design a calling convention for Sux. | |||
| 2020-12-08 | - Fixed yet another bug with the ortho extension. | mrb0nk500 | |
| 2020-12-08 | - Fixed a bug with the ortho extension implementation | mrb0nk500 | |
| in the emulator. | |||
| 2020-12-08 | - Implemented support for the Orthogonal extension into | mrb0nk500 | |
| both the assembler, and the emulator. I finally figured out how I could get support for the Ortho extension implemented into the old assembler. The only reason for doing this, is to buy me some while I start work on the new assembler, and to help me get an idea for how to do the same in the new assembler. | |||
| 2020-11-20 | - Implemented support for Sux's base extension. | mrb0nk500 | |
| This is the biggest milestone I've reached for this project, since the base extension changes alot about what Sux can do by default, and now makes it a viable instruction set for modern day use, when compared with other instruction sets. | |||
| 2020-11-20 | - Cleaned up a bit of the code. | mrb0nk500 | |
| - Made the debug print for the CPU flags more readable. - Started work on implementing line number support into SuBAsm. | |||
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index : cisc-0.2 | |
| An emulator for the Sux instruction set. | mr b0nk 500 |
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