From a769f65a13db5546e427989d85f9646303f4fa32 Mon Sep 17 00:00:00 2001 From: mrb0nk500 Date: Tue, 8 Dec 2020 10:42:10 -0500 Subject: - Implemented support for the Orthogonal extension into both the assembler, and the emulator. I finally figured out how I could get support for the Ortho extension implemented into the old assembler. The only reason for doing this, is to buy me some while I start work on the new assembler, and to help me get an idea for how to do the same in the new assembler. --- opcode.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'opcode.h') diff --git a/opcode.h b/opcode.h index 40b832f..1e5d820 100644 --- a/opcode.h +++ b/opcode.h @@ -11,6 +11,7 @@ #define OPNUM 74 #define EXT_OPNUM 49 +#define ORTHO_OPNUM 16 #define C (1 << 0) /* Carry flag. */ #define Z (1 << 1) /* Zero flag. */ @@ -57,11 +58,25 @@ struct sux { union reg ps; /* The processor status register. */ uint64_t a, b, y, x; /* Registers A, B, X, and Y. */ uint64_t e; /* Effective address register. */ + uint64_t c, d, s, f; /* Registers C, D, S, and F. */; uint64_t pc; /* Program counter. */ uint64_t sp; /* Stack pointer. */ + uint64_t bp; /* Base pointer. */ + uint64_t r11, r12, r13, r14, r15; /* Registers R11-R15. */; uint64_t clk; /* Number of clock cycles. */ }; +typedef struct op operand; + +struct op { + uint8_t type; /* Operand Type. 0 = register, 1 = memory. */ + uint8_t id; /* Operand Type ID 1. 4 bits. */ + uint8_t rind[2]; /* Register(s) used for register indirect. */ + uint8_t scale; /* Scale used for SIB. */ + int is_ind : 1; /* Flag used to determine if this operand is an indirect mode. */ + uint64_t value; /* Value of operand (used only by memory operands). */ +}; + extern int asmmon(); enum sw_type {RS, AM, BYTE}; -- cgit v1.2.3-13-gbd6f