From c1e735ec8b0481c1ebc631cd495a10f72e47ba32 Mon Sep 17 00:00:00 2001 From: mrb0nk500 Date: Tue, 26 Nov 2019 00:33:20 -0500 Subject: Revamped the entire emulator. I finally implemented the other addressing modes, and added a Makefile. Not sure when I will start work on rev2 of Sux, but it will be sometime soon. --- opcode.h | 217 +++++++++++++++++++++++++++++++++++++++++++++++---------------- 1 file changed, 162 insertions(+), 55 deletions(-) (limited to 'opcode.h') diff --git a/opcode.h b/opcode.h index f634be3..cf93a16 100644 --- a/opcode.h +++ b/opcode.h @@ -1,20 +1,21 @@ +#include +#include +#include +#include + #define OPNAME(opcode) [opcode] = #opcode /* Get name of Opcode, for dissambly. */ #define CPS 0x00 /* Clear Processor Status. */ #define ADC 0x01 /* ADd with Carry. */ #define PHP 0x08 /* PusH Processor status to stack. */ #define PHA 0x09 /* PusH Accumulator to stack. */ #define PHY 0x0A /* PusH Y register to stack. */ -#define PAY 0x0B /* Push Accumulator, and Y register to stack. */ #define PHX 0x0C /* PusH X register to stack. */ -#define PAX 0x0D /* Push Accumulator, and X register to stack. */ #define JMP 0x10 /* JuMP to memory location. */ #define SBC 0x11 /* SuBtract with Carry. */ #define PLP 0x18 /* PuLl Processor status from stack. */ #define PLA 0x19 /* PuLl Accumulator from stack. */ #define PLY 0x1A /* PuLl Y register from stack. */ -#define PYA 0x1B /* Pull Y register, and Accumulator from stack. */ #define PLX 0x1C /* PuLl X register from stack. */ -#define PXA 0x1D /* Pull X register, and Accumulator from stack. */ #define JSR 0x20 /* Jump to SubRoutine. */ #define AND 0x21 /* bitwise AND with accumulator. */ #define ANY 0x22 /* bitwise ANd with Y register.*/ @@ -37,11 +38,17 @@ #define XAX 0x45 /* bitwise Xor with Accumulator, and X register. */ #define CLI 0x48 /* CLear Interupt flag. */ #define BCS 0x50 /* Branch if Carry Set. */ -#define SLA 0x51 /* Shift Left with Accumulator. */ +#define LSL 0x51 /* Logical Shift Left. */ #define SEC 0x58 /* SEt Carry flag. */ #define BCC 0x60 /* Branch if Carry Clear. */ -#define SRA 0x61 /* Shift Right with Accumulator. */ +#define LSR 0x61 /* Logical Shift Right. */ #define CLC 0x68 /* CLear Carry flag. */ +#define LDA 0x69 /* LoaD Accumulator. */ +#define LDY 0x6A /* LoaD Y register. */ +#define STA 0x6B /* STore Accumulator. */ +#define LDX 0x6C /* LoaD X register. */ +#define STY 0x6D /* STore Y register. */ +#define STX 0x6E /* STore X register. */ #define BEQ 0x70 /* Branch if EQual. */ #define ROL 0x71 /* ROtate Left. */ #define SSP 0x78 /* Set Stack Protection flag. */ @@ -72,107 +79,207 @@ #define DAY 0xD3 /* Decrement Accumulator, and Y register. */ #define DEX 0xD4 /* DEcrement X register. */ #define DAX 0xD5 /* Decrement Accumulator, and X register. */ -#define LDA 0xE1 /* LoaD Accumulator. */ -#define LDY 0xE2 /* LoaD Y register. */ -#define LAY 0xE3 /* Load Accumulator, and Y register. */ -#define LDX 0xE4 /* LoaD X register. */ -#define LAX 0xE5 /* Load Accumulator, and X register. */ #define NOP 0xE8 /* No OPeration. */ -#define STA 0xF1 /* STore Accumulator. */ -#define STY 0xF2 /* STore Y register. */ -#define SAY 0xF3 /* Store Accumulator, and Y register. */ -#define STX 0xF4 /* STore X register. */ -#define SAX 0xF5 /* Store Accumulator, and X register. */ #define BRK 0xF8 /* BReaK. */ -#define STP 0xFF /* SToP. */ -enum {ALU, THREAD, BRANCH, FLAG, MEMORY, MISC}; +#define C ((uint64_t)1 << 0) +#define Z ((uint64_t)1 << 1) +#define I ((uint64_t)1 << 2) +#define S ((uint64_t)1 << 3) +#define V ((uint64_t)1 << 6) +#define N ((uint64_t)1 << 7) + +#define STK_STADDR 0x010000 /* Starting address of the stack. */ + +struct sux; + +uint8_t *addr; /* Address Space. */ + +struct sux { + uint64_t ps; /* The processor status register. */ + uint64_t a[8], y[8], x[8]; /* Registers A, X, and Y. */ + uint64_t pc[8]; /* Program counter. */ + uint16_t sp; /* Stack pointer. */ + uint8_t crt; /* Current running threads. */ + uint8_t c[8], z[8], i[8], s[8], v[8], n[8]; /* Processor Status Flags. */ + +}; static const char *opname[0x100] = { OPNAME(CPS), - OPNAME(ADC), + [ADC] = "ADC #", + [0x03] = "ADC a", + [0x05] = "ADC zm", OPNAME(PHP), OPNAME(PHA), OPNAME(PHY), - OPNAME(PAY), OPNAME(PHX), - OPNAME(PAX), OPNAME(JMP), - OPNAME(SBC), + [SBC] = "SBC #", + [0x13] = "SBC a", + [0x15] = "SBC zm", OPNAME(PLP), OPNAME(PLA), OPNAME(PLY), - OPNAME(PYA), OPNAME(PLX), - OPNAME(PXA), OPNAME(JSR), - OPNAME(AND), - OPNAME(ANY), + [AND] = "AND #", + [ANY] = "ANY #", OPNAME(AAY), - OPNAME(ANX), + [ANX] = "ANX #", OPNAME(AAX), OPNAME(STT), + [0x29] = "AND a", + [0x2B] = "AND zm", OPNAME(BPO), - OPNAME(ORA), - OPNAME(ORY), + [ORA] = "ORA #", + [ORY] = "ORY #", OPNAME(OAY), - OPNAME(ORX), + [ORX] = "ORX #", OPNAME(OAX), OPNAME(SEI), + [0x39] = "ORA a", + [0x3B] = "ORA zm", OPNAME(BNG), - OPNAME(XOR), - OPNAME(XRY), + [XOR] = "XOR #", + [XRY] = "XRY #", OPNAME(XAY), - OPNAME(XRX), + [XRX] = "XRX #", OPNAME(XAX), OPNAME(CLI), + [0x49] = "XOR a", + [0x4B] = "XOR zm", OPNAME(BCS), - OPNAME(SLA), + [LSL] = "LSL #", + [0x52] = "ANY a", + [0x53] = "LSL a", + [0x54] = "ANX a", + [0x55] = "LSL zm", OPNAME(SEC), + [0x59] = "LDA a", + [0x5A] = "LDY a", + [0x5B] = "STA a", + [0x5C] = "LDX a", + [0x5D] = "STY a", + [0x5E] = "STX a", OPNAME(BCC), - OPNAME(SRA), + [LSR] = "LSR #", + [0x62] = "ORY a", + [0x63] = "LSR a", + [0x64] = "ORX a", + [0x65] = "LSR zm", OPNAME(CLC), + [LDA]= "LDA #", + [LDY]= "LDY #", + [STA]= "STA #", + [LDX]= "LDX #", + [STY]= "STY #", + [STX]= "STX #", OPNAME(BEQ), - OPNAME(ROL), + [ROL] = "ROL #", + [0x72] = "XRY a", + [0x73] = "ROL a", + [0x74] = "XRX a", + [0x75] = "ROL zm", OPNAME(SSP), + [0x79] = "LDA zm", + [0x7A] = "LDY zm", + [0x7B] = "STA zm", + [0x7C] = "LDX zm", + [0x7D] = "STY zm", + [0x7E] = "STX zm", OPNAME(BNE), - OPNAME(ROR), + [ROR] = "ROR #", + [0x82] = "ANY zm", + [0x83] = "ROR a", + [0x84] = "ANX zm", + [0x85] = "ROR zm", OPNAME(CSP), + [0x89] = "LDA zm, x", + [0x8A] = "LDY zm, x", + [0x8B] = "STA zm, x", + [0x8D] = "STY zm, x", OPNAME(BVS), - OPNAME(MUL), + [MUL] = "MUL #", + [0x92] = "ORY zm", + [0x93] = "MUL a", + [0x94] = "ORX zm", + [0x95] = "MUL zm", OPNAME(SEV), + [0x99] = "LDA zm, y", + [0x9B] = "LDX zm, y", + [0x9C] = "STA zm, y", + [0x9E] = "STX zm, y", OPNAME(BVC), - OPNAME(DIV), + [DIV] = "DIV #", + [0xA2] = "XRY zm", + [0xA3] = "DIV a", + [0xA4] = "XRX zm", + [0xA5] = "DIV zm", OPNAME(CLV), OPNAME(RTS), - OPNAME(CMP), - OPNAME(CPY), + [CMP] = "CMP #", + [CPY] = "CPY #", OPNAME(CAY), - OPNAME(CPX), + [CPX] = "CPX #", OPNAME(CAX), OPNAME(ENT), OPNAME(RTI), - OPNAME(INC), + [INC] = "INC #", OPNAME(INY), OPNAME(IAY), OPNAME(INX), OPNAME(IAX), - OPNAME(DEC), + [DEC] = "DEC #", OPNAME(DEY), OPNAME(DAY), OPNAME(DEX), OPNAME(DAX), - OPNAME(LDA), - OPNAME(LDY), - OPNAME(LAY), - OPNAME(LDX), - OPNAME(LAX), + [0xE1] = "INC a", + [0xE2] = "CPY a", + [0xE3] = "INC zm", + [0xE4] = "CPX a", + [0xE5] = "CMP a", OPNAME(NOP), - OPNAME(STA), - OPNAME(STY), - OPNAME(SAY), - OPNAME(STX), - OPNAME(SAX), + [0xF1] = "DEC a", + [0xF2] = "CPY zm", + [0xF3] = "DEC zm", + [0xF4] = "CPX zm", + [0xF4] = "CMP zm", OPNAME(BRK), - OPNAME(STP), }; + +extern void adc(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void sbc(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void mul(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void divd(struct sux *cpu, uint64_t adr, uint8_t thread); +extern uint64_t and(struct sux *cpu, uint64_t value, uint8_t thread); +extern void and_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread); +extern uint64_t or(struct sux *cpu, uint64_t value, uint8_t thread); +extern void or_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread); +extern uint64_t xor(struct sux *cpu, uint64_t value, uint8_t thread); +extern void xor_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread); +extern void rol(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void ror(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void lsl(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void lsr(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void inc(struct sux *cpu, uint64_t *reg, uint8_t thread); +extern void inc_addr(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void dec(struct sux *cpu, uint64_t *reg, uint8_t thread); +extern void dec_addr(struct sux *cpu, uint64_t adr, uint8_t thread); +extern void stt(struct sux *cpu, uint8_t value); +extern void ent(struct sux *cpu, uint8_t value); +extern void ld(struct sux *cpu, uint64_t *reg, uint64_t adr, uint8_t thread); +extern void st(struct sux *cpu, uint64_t *reg, uint64_t adr, uint8_t thread); +extern void push(struct sux *cpu, uint8_t value); +extern uint8_t pull(struct sux *cpu); +extern void cmp_addr(struct sux *cpu, uint64_t reg, uint64_t adr, uint8_t thread); +extern void cmp(struct sux *cpu, uint64_t reg1, uint64_t reg2, uint8_t thread); +extern void bfs(struct sux *cpu, uint8_t flag, uint64_t adr, uint8_t thread); +extern void bfc(struct sux *cpu, uint8_t flag, uint64_t adr, uint8_t thread); +extern void setps(struct sux *cpu, uint8_t thread); +extern uint64_t immaddr(struct sux *cpu, uint8_t thread, uint8_t size); +extern uint64_t absaddr(struct sux *cpu, uint8_t thread); +extern uint32_t zeromtx(struct sux *cpu, uint8_t thread); +extern uint32_t zeromx(struct sux *cpu, uint8_t thread); +extern uint32_t zeromy(struct sux *cpu, uint8_t thread); -- cgit v1.2.3-13-gbd6f