From 460832c13c9d476d71e626a0c42de4eeff3feb63 Mon Sep 17 00:00:00 2001 From: mrb0nk500 Date: Thu, 11 Jun 2020 21:39:59 -0400 Subject: Did some more stuff. - Fix some bugs with strings. - Started to refactor the instruction functions. - Added support for using RS prefixes on the memory based increment, and decrement instructions. - Started work on SuBAsm's lexer. Have fun looking at this, BieHDC. :) --- sux.c | 166 +++++++++++++++++++++++++++++++++++------------------------------- 1 file changed, 87 insertions(+), 79 deletions(-) (limited to 'sux.c') diff --git a/sux.c b/sux.c index 41fbb5a..84bab1c 100644 --- a/sux.c +++ b/sux.c @@ -29,6 +29,7 @@ pthread_cond_t main_cond = PTHREAD_COND_INITIALIZER; uint8_t threads_done = 0; uint8_t step = 0; +uint8_t esc = 0; uint8_t *addr; @@ -52,7 +53,6 @@ void *run(void *args) { uint8_t thread = thr->th; uint8_t prefix = 0; uint8_t opcode = 0; - uint8_t esc = 0; union reg address; union reg value; #if getclk @@ -165,13 +165,11 @@ void *run(void *args) { case ADC_Z: /* ADC Zero Matrix. */ adc(cpu, value.u64, thread); break; - case PHB: /* PusH B register to stack. */ - case PHP: /* PusH Processor status to stack. */ - case PHA: /* PusH Accumulator to stack. */ - case PHY: /* PusH Y register to stack. */ - case PHX: /* PusH X register to stack. */ - push(cpu, value.u64, opcode, thread); - break; + case PHP: push(cpu, value.u64, cpu->ps.u8[thread], thread); break; /* PusH Processor status to stack. */ + case PHA: push(cpu, value.u64, cpu->a[thread ], thread); break; /* PusH Accumulator to stack. */ + case PHB: push(cpu, value.u64, cpu->b[thread ], thread); break; /* PusH B register to stack. */ + case PHY: push(cpu, value.u64, cpu->y[thread ], thread); break; /* PusH Y register to stack. */ + case PHX: push(cpu, value.u64, cpu->x[thread ], thread); break; /* PusH X register to stack. */ case TAY: /* Transfer Accumulator to Y. */ case TAX: /* Transfer Accumulator to Y. */ case TYX: /* Transfer Y to X. */ @@ -196,12 +194,11 @@ void *run(void *args) { case SBC_Z: /* SBC Zero Matrix. */ sbc(cpu, value.u64, thread); break; - case PLB: /* PuLl B register from stack. */ - case PLP: /* PuLl Processor status from stack. */ - case PLA: /* PuLl Accumulator from stack. */ - case PLY: /* PuLl Y register from stack. */ - case PLX: /* PuLl X register from stack. */ - pull(cpu, value.u64, opcode, thread); + case PLP: cpu->ps.u8[thread] = pull(cpu, value.u64, thread); break; /* PuLl Processor status from stack. */ + case PLA: cpu->a[thread ] = pull(cpu, value.u64, thread); break; /* PuLl Accumulator from stack. */ + case PLB: cpu->b[thread ] = pull(cpu, value.u64, thread); break; /* PuLl B register from stack. */ + case PLY: cpu->y[thread ] = pull(cpu, value.u64, thread); break; /* PuLl Y register from stack. */ + case PLX: cpu->x[thread ] = pull(cpu, value.u64, thread); break; /* PuLl X register from stack. */ break; case ABA: /* bitwise And with Accumulator, and B register. */ value.u64 = cpu->b[thread]; /* Falls Through. */ @@ -275,29 +272,34 @@ void *run(void *args) { setflag(1, C); break; case STA: /* STA Absolute. */ - case STY: /* STY Absolute. */ - case STX: /* STX Absolute. */ - case STB: /* STB Absolute. */ case STA_Z: /* STA Zero Matrix. */ - case STY_Z: /* STY Zero Matrix. */ - case STX_Z: /* STX Zero Matrix. */ - case STB_Z: /* STB Zero Matrix. */ case STA_ZX: /* STA Zero Matrix, Indexed with X. */ + case STA_ZY: /* STA Zero Matrix, Indexed with Y. */ + case STA_IN: /* STA Indirect. */ + case STA_IX: /* STA Indexed Indirect. */ + case STA_IY: /* STA Indirect Indexed. */ + store(cpu, address.u64, cpu->a[thread], prefix, thread); + break; + case STY: /* STY Absolute. */ + case STY_Z: /* STY Zero Matrix. */ case STY_ZX: /* STY Zero Matrix, Indexed with X. */ + case STY_IN: /* STY Indirect. */ + store(cpu, address.u64, cpu->y[thread], prefix, thread); + break; + case STX: /* STX Absolute. */ + case STX_Z: /* STX Zero Matrix. */ case STX_ZY: /* STX Zero Matrix, Indexed with Y. */ + case STX_IN: /* STX Indirect. */ + store(cpu, address.u64, cpu->x[thread], prefix, thread); + break; + case STB: /* STB Absolute. */ + case STB_Z: /* STB Zero Matrix. */ case STB_ZX: /* STB Zero Matrix, Indexed with X. */ - case STA_ZY: /* STA Zero Matrix, Indexed with Y. */ case STB_ZY: /* STB Zero Matrix, Indexed with Y. */ - case STY_IN: /* STY Indirect. */ - case STX_IN: /* STX Indirect. */ - case STA_IN: /* STA Indirect. */ case STB_IN: /* STB Indirect. */ - case STA_IX: /* STA Indexed Indirect. */ case STB_IX: /* STB Indexed Indirect. */ - case STA_IY: /* STA Indirect Indexed. */ case STB_IY: /* STB Indirect Indexed. */ - store(cpu, address.u64, &esc, opcode, prefix, thread); - step = addr[STEP_ADDR] || cpu->pc[thread] == CTRL_ADDR; + store(cpu, address.u64, cpu->b[thread], prefix, thread); break; case BCC: /* BCC Absolute. */ case BCC_Z: /* BCC Zero Matrix. */ @@ -323,32 +325,38 @@ void *run(void *args) { setflag(0, C); break; case LDB: /* LDB Immediate. */ - case LDA: /* LDA Immediate. */ - case LDY: /* LDY Immediate. */ - case LDX: /* LDX Immediate. */ case LDB_AB: /* LDB Absolute. */ - case LDA_AB: /* LDA Absolute. */ - case LDY_AB: /* LDY Absolute. */ - case LDX_AB: /* LDX Absolute. */ case LDB_Z: /* LDB Zero Matrix. */ - case LDA_Z: /* LDA Zero Matrix. */ - case LDY_Z: /* LDY Zero Matrix. */ - case LDX_Z: /* LDX Zero Matrix. */ case LDB_ZX: /* LDB Zero Matrix, Indexed with X. */ - case LDA_ZX: /* LDA Zero Matrix, Indexed with X. */ - case LDY_ZX: /* LDY Zero Matrix, Indexed with X. */ - case LDX_ZY: /* LDX Zero Matrix, Indexed with Y. */ case LDB_ZY: /* LDB Zero Matrix, Indexed with Y. */ - case LDA_ZY: /* LDA Zero Matrix, Indexed with Y. */ - case LDB_IN: /* LDY Indirect. */ - case LDA_IN: /* LDX Indirect. */ - case LDY_IN: /* LDB Indirect. */ - case LDX_IN: /* LDA Indirect. */ + case LDB_IN: /* LDB Indirect. */ case LDB_IX: /* LDB Indexed Indirect. */ - case LDA_IX: /* LDA Indexed Indirect. */ case LDB_IY: /* LDB Indirect Indexed. */ + cpu->b[thread] = load(cpu, address.u64, cpu->b[thread], prefix, thread); + break; + case LDA: /* LDA Immediate. */ + case LDA_AB: /* LDA Absolute. */ + case LDA_Z: /* LDA Zero Matrix. */ + case LDA_ZX: /* LDA Zero Matrix, Indexed with X. */ + case LDA_ZY: /* LDA Zero Matrix, Indexed with Y. */ + case LDA_IN: /* LDA Indirect. */ + case LDA_IX: /* LDA Indexed Indirect. */ case LDA_IY: /* LDA Indirect Indexed. */ - load(cpu, address.u64, &esc, opcode, prefix, thread); + cpu->a[thread] = load(cpu, address.u64, cpu->a[thread], prefix, thread); + break; + case LDY: /* LDY Immediate. */ + case LDY_AB: /* LDY Absolute. */ + case LDY_Z: /* LDY Zero Matrix. */ + case LDY_ZX: /* LDY Zero Matrix, Indexed with X. */ + case LDY_IN: /* LDY Indirect. */ + cpu->y[thread] = load(cpu, address.u64, cpu->y[thread], prefix, thread); + break; + case LDX: /* LDX Immediate. */ + case LDX_AB: /* LDX Absolute. */ + case LDX_Z: /* LDX Zero Matrix. */ + case LDX_ZY: /* LDX Zero Matrix, Indexed with Y. */ + case LDX_IN: /* LDX Indirect. */ + cpu->x[thread] = load(cpu, address.u64, cpu->x[thread], prefix, thread); break; case BEQ: /* BEQ Absolute. */ case BEQ_Z: /* BEQ Zero Matrix. */ @@ -404,29 +412,35 @@ void *run(void *args) { case CLV: /* CLear oVerflow flag. */ setflag(0, V); break; + case CPB: /* CPB Immediate. */ + case CPB_AB: /* CPB Absolute. */ + case CPB_Z: /* CPB Zero Matrix. */ + case CPB_IN: /* CPB Indirect. */ + case CPB_IX: /* CPB Indexed Indirect. */ + case CPB_IY: /* CPB Indirect Indexed. */ + cmp(cpu, value.u64, cpu->b[thread], thread); + break; case CAB: /* Compare Accumulator, and B. */ value.u64 = cpu->b[thread]; /* Falls Through. */ - case CPB: /* CPB Immediate. */ case CMP: /* CMP Immediate. */ - case CPY: /* CPY Immediate. */ - case CPX: /* CPX Immediate. */ - case CPY_AB: /* CPY Absolute. */ - case CPX_AB: /* CPX Absolute. */ case CMP_AB: /* CMP Absolute. */ - case CPB_AB: /* CPB Absolute. */ - case CPY_Z: /* CPY Zero Matrix. */ - case CPX_Z: /* CPX Zero Matrix. */ case CMP_Z: /* CMP Zero Matrix. */ - case CPB_Z: /* CPB Zero Matrix. */ - case CPY_IN: /* CMP Indirect. */ - case CPX_IN: /* CPY Indirect. */ - case CMP_IN: /* CPX Indirect. */ - case CPB_IN: /* CPB Indirect. */ + case CMP_IN: /* CMP Indirect. */ case CMP_IX: /* CMP Indexed Indirect. */ - case CPB_IX: /* CPB Indexed Indirect. */ case CMP_IY: /* CMP Indirect Indexed. */ - case CPB_IY: /* CPB Indirect Indexed. */ - cmp(cpu, value.u64, opcode, thread); + cmp(cpu, value.u64, cpu->a[thread], thread); + break; + case CPY: /* CPY Immediate. */ + case CPY_AB: /* CPY Absolute. */ + case CPY_Z: /* CPY Zero Matrix. */ + case CPY_IN: /* CPY Indirect. */ + cmp(cpu, value.u64, cpu->y[thread], thread); + break; + case CPX: /* CPX Immediate. */ + case CPX_AB: /* CPX Absolute. */ + case CPX_Z: /* CPX Zero Matrix. */ + case CPX_IN: /* CPX Indirect. */ + cmp(cpu, value.u64, cpu->x[thread], thread); break; case ENT: /* ENd Thread. */ /* cpu->crt &= ~value; @@ -434,18 +448,14 @@ void *run(void *args) { if ((value >> i) & 1) cpu->pc[i+1] = cpu->pc[0]+(i+1);*/ break; - case INC: /* INC Accumulator. */ - case INB: - case INY: - case INX: - incr(cpu, opcode, thread); - break; - case DEC: /* DEC Accumulator. */ - case DEB: - case DEY: - case DEX: - decr(cpu, opcode, thread); - break; + case INC: cpu->a[thread] = idr(cpu, cpu->a[thread], 1, thread); break; + case INB: cpu->b[thread] = idr(cpu, cpu->b[thread], 1, thread); break; + case INY: cpu->y[thread] = idr(cpu, cpu->y[thread], 1, thread); break; + case INX: cpu->x[thread] = idr(cpu, cpu->x[thread], 1, thread); break; + case DEC: cpu->a[thread] = idr(cpu, cpu->a[thread], 0, thread); break; + case DEB: cpu->b[thread] = idr(cpu, cpu->b[thread], 0, thread); break; + case DEY: cpu->y[thread] = idr(cpu, cpu->y[thread], 0, thread); break; + case DEX: cpu->x[thread] = idr(cpu, cpu->x[thread], 0, thread); break; case JSR_IN: /* JSR Indirect. */ case JSR: /* Jump to SubRoutine. */ case JSR_Z: /* JSR Zero Matrix. */ @@ -463,8 +473,7 @@ void *run(void *args) { break; case INC_AB: /* INC Absolute. */ case INC_Z: /* INC Zero Matrix. */ - incm(cpu, address.u64, thread); - step = addr[STEP_ADDR] || cpu->pc[thread] == CTRL_ADDR; + idm(cpu, address.u64, prefix, 1, thread); break; case NOP: /* No OPeration. */ break; @@ -485,8 +494,7 @@ void *run(void *args) { break; case DEC_AB: /* DEC Absolute. */ case DEC_Z: /* DEC Zero Matrix. */ - decm(cpu, address.u64, thread); - step = addr[STEP_ADDR] || cpu->pc[thread] == CTRL_ADDR; + idm(cpu, address.u64, prefix, 0, thread); break; case BRK: /* BReaK. */ case WAI: /* WAit for Interrupt. */ -- cgit v1.2.3-13-gbd6f