#include #include #include #include #define OPNAME(opcode) [opcode] = #opcode /* Get name of Opcode, for disassembly. */ #define CPS 0x00 /* Clear Processor Status. */ #define ADC 0x01 /* ADd with Carry. */ #define AAB 0x02 /* Add Accumulator with carry by B register. */ #define PHB 0x06 /* PusH B register to stack. */ #define PHP 0x08 /* PusH Processor status to stack. */ #define LDA 0x09 /* LoaD Accumulator. */ #define LDY 0x0A /* LoaD Y register. */ #define LDX 0x0B /* LoaD X register. */ #define TAB 0x0C /* Transfer Accumulator to B. */ #define LDB 0x0E /* LoaD B register. */ #define JMP 0x10 /* JuMP to memory location. */ #define SBC 0x11 /* SuBtract with Carry. */ #define SAB 0x12 /* Subtract Accumulator with carry by B register. */ #define PLB 0x16 /* PuLl B register to stack. */ #define PLP 0x18 /* PuLl Processor status from stack. */ #define TBA 0x1C /* Transfer B to Accumulator. */ #define JSR 0x20 /* Jump to SubRoutine. */ #define AND 0x21 /* bitwise AND with accumulator. */ #define ABA 0x22 /* bitwise And with Accumulator, and B register. */ #define CPB 0x26 /* ComPare B register. */ #define STT 0x28 /* STart Threads. */ #define STA 0x29 /* STore Accumulator. */ #define STY 0x2A /* STore Y register. */ #define STX 0x2B /* STore X register. */ #define TAY 0x2C /* Transfer Accumulator to Y. */ #define STB 0x2E /* STore B register. */ #define BPO 0x30 /* Branch if POsitive. */ #define ORA 0x31 /* bitwise OR with Accumulator. */ #define OAB 0x32 /* bitwise Or with Accumulator, and B register. */ #define SEI 0x38 /* SEt Interupt flag. */ #define TYA 0x3C /* Transfer Y to Accumulator. */ #define BNG 0x40 /* Branch if NeGative. */ #define XOR 0x41 /* bitwise XOR with accumulator. */ #define XAB 0x42 /* bitwise Xor with Accumulator, and B register. */ #define CLI 0x48 /* CLear Interupt flag. */ #define TAX 0x4C /* Transfer Accumulator to X. */ #define BCS 0x50 /* Branch if Carry Set. */ #define LSL 0x51 /* Logical Shift Left. */ #define LLB 0x52 /* Logical shift Left accumulator by B. */ #define SEC 0x58 /* SEt Carry flag. */ #define TXA 0x5C /* Transfer X to Accumulator. */ #define BCC 0x60 /* Branch if Carry Clear. */ #define LSR 0x61 /* Logical Shift Right. */ #define LRB 0x62 /* Logical shift Right accumulator by B. */ #define CLC 0x68 /* CLear Carry flag. */ #define TYX 0x6C /* Transfer Y to X. */ #define BEQ 0x70 /* Branch if EQual. */ #define ROL 0x71 /* ROtate Left. */ #define RLB 0x72 /* Rotate Left accumulator by B. */ #define SSP 0x78 /* Set Stack Protection flag. */ #define TXY 0x7C /* Transfer X to Y. */ #define BNE 0x80 /* Branch if Not Equal. */ #define ROR 0x81 /* ROtate Right. */ #define RRB 0x82 /* Rotate Right accumulator by B. */ #define INY 0x86 /* INcrement Y register. */ #define CSP 0x88 /* Clear Stack Protection flag. */ #define TSX 0x8C /* Transfer Stack pointer to X. */ #define BVS 0x90 /* Branch if oVerflow Set. */ #define MUL 0x91 /* MULtiply accumulator. */ #define MAB 0x92 /* Multiply Accumulator by B. */ #define DEY 0x96 /* DEcrement Y register. */ #define SEV 0x98 /* SEt oVerflow flag. */ #define TXS 0x9C /* Transfer X to Stack pointer. */ #define BVC 0xA0 /* Branch if oVerflow Clear. */ #define DIV 0xA1 /* DIVide with accumulator. */ #define DAB 0xA2 /* Divide Accumulator by B. */ #define INX 0xA6 /* INcrement X register. */ #define CLV 0xA8 /* CLear oVerflow flag. */ #define PHY 0xAC /* PusH Y register to stack. */ #define RTS 0xB0 /* ReTurn from Subroutine. */ #define CMP 0xB1 /* CoMPare accumulator. */ #define CAB 0xB2 /* Compare Accumulator, and B. */ #define DEX 0xB6 /* DEcrement X register. */ #define ENT 0xB8 /* ENd Threads. */ #define CPY 0xBA /* ComPare Y register. */ #define CPX 0xBB /* ComPare X register. */ #define PLY 0xBC /* PuLl Y register from stack. */ #define RTI 0xC0 /* ReTurn from Interrupt. */ #define INC 0xC1 /* INCrement accumulator. */ #define IAB 0xC2 /* Increment Accumulator, and B register. */ #define WAI 0xC8 /* WAit for Interrupt. */ #define PHX 0xCC /* PusH X register to stack. */ #define DEC 0xD1 /* DECrement accumulator. */ #define DBA 0xD2 /* Decrement Accumulator, and B register. */ #define PLX 0xDC /* PuLl X register from stack. */ #define JSL 0xE0 /* Jump to Subroutine Long. */ #define ASR 0xE1 /* Arithmetic Shift Right. */ #define ARB 0xE2 /* Arithmetic shift Right accumulator by B. */ #define NOP 0xE8 /* No OPeration. */ #define PHA 0xEC /* PusH Accumulator to stack. */ #define RTL 0xF0 /* ReTurn from subroutine Long. */ #define BRK 0xF8 /* BReaK. */ #define PLA 0xFC /* PuLl Accumulator from stack. */ #define OPNUM 93 #define C ((uint64_t)1 << 0) #define Z ((uint64_t)1 << 1) #define I ((uint64_t)1 << 2) #define S ((uint64_t)1 << 3) #define V ((uint64_t)1 << 6) #define N ((uint64_t)1 << 7) struct sux; uint8_t *addr; /* Address Space. */ uint8_t ibcount; /* Number of bytes taken up by instruction. */ struct sux { uint64_t ps; /* The processor status register. */ uint64_t a[8], b[8], y[8], x[8]; /* Registers A, B, X, and Y. */ uint64_t pc[8]; /* Program counter. */ uint16_t sp[8]; /* Stack pointer. */ uint16_t stk_st[8]; /* Starting address of each threads stack. */ uint8_t crt; /* Current running threads. */ uint8_t c[8], z[8], i[8], s[8], v[8], n[8]; /* Processor Status Flags. */ }; typedef struct { char mnemonic[4]; uint8_t imm; uint8_t abs; uint8_t zm; uint8_t zmy; uint8_t zmx; uint8_t ind; uint8_t inx; uint8_t iny; uint8_t impl; } opent; opent opcodes[OPNUM]; enum {IMPL, IMM, ZM, ZMX, ZMY, ABS, IND, INDX, INDY}; static const uint8_t optype[0x100] = { [0x00] = IMPL, [0x01] = IMM, [0x02] = IMPL, [0x03] = ABS, [0x04] = IND, [0x05] = ZM, [0x06] = IMM, [0x08] = IMM, [0x09] = IMM, [0x0A] = IMM, [0x0B] = IMM, [0x0C] = IMPL, [0x0E] = IMM, [0x10] = ABS, [0x11] = IMM, [0x12] = IMPL, [0x13] = ABS, [0x14] = INDX, [0x15] = ZM, [0x16] = IMM, [0x18] = IMM, [0x19] = ABS, [0x1A] = ABS, [0x1B] = ABS, [0x1C] = IMPL, [0x1E] = ABS, [0x20] = ZM, [0x21] = IMM, [0x22] = IMPL, [0x23] = ABS, [0x24] = INDY, [0x25] = ZM, [0x26] = IMM, [0x28] = IMPL, [0x29] = ABS, [0x2A] = ABS, [0x2B] = ABS, [0x2C] = IMPL, [0x2E] = ABS, [0x30] = ABS, [0x31] = IMM, [0x32] = IMPL, [0x33] = ABS, [0x34] = IND, [0x35] = ZM, [0x36] = ABS, [0x38] = IMPL, [0x39] = ZM, [0x3A] = ZM, [0x3B] = ZM, [0x3C] = IMPL, [0x3E] = ZM, [0x40] = ABS, [0x41] = IMM, [0x42] = IMPL, [0x43] = ABS, [0x44] = INDX, [0x45] = ZM, [0x46] = ZM, [0x48] = IMPL, [0x49] = ZM, [0x4A] = ZM, [0x4B] = ZM, [0x4C] = IMPL, [0x4E] = ZM, [0x50] = ABS, [0x51] = IMM, [0x52] = IMPL, [0x53] = ABS, [0x54] = INDY, [0x55] = ZM, [0x56] = IND, [0x58] = IMPL, [0x59] = ZMX, [0x5A] = ZMX, [0x5B] = ZMY, [0x5C] = IMPL, [0x5E] = ZMX, [0x60] = ABS, [0x61] = IMM, [0x62] = IMPL, [0x63] = ABS, [0x64] = ZM, [0x65] = ZM, [0x66] = INDX, [0x68] = IMPL, [0x69] = ZMX, [0x6A] = ZMX, [0x6B] = ZMY, [0x6C] = IMPL, [0x6E] = ZMX, [0x70] = ABS, [0x71] = IMM, [0x72] = IMPL, [0x73] = ABS, [0x74] = ZM, [0x75] = ZM, [0x76] = INDY, [0x78] = IMPL, [0x79] = ZMY, [0x7A] = IND, [0x7B] = IND, [0x7C] = IMPL, [0x7E] = ZMY, [0x80] = ABS, [0x81] = IMM, [0x82] = IMPL, [0x83] = ABS, [0x84] = ZM, [0x85] = ZM, [0x86] = IMPL, [0x88] = IMPL, [0x89] = ZMY, [0x8A] = IND, [0x8B] = IND, [0x8C] = IMPL, [0x8E] = ZMY, [0x90] = ABS, [0x91] = IMM, [0x92] = IMPL, [0x93] = ABS, [0x94] = ZM, [0x95] = ZM, [0x96] = IMPL, [0x98] = IMPL, [0x99] = IND, [0x9A] = INDX, [0x9B] = INDY, [0x9C] = IMM, [0x9E] = IND, [0xA0] = ABS, [0xA1] = IMM, [0xA2] = IMPL, [0xA3] = ABS, [0xA4] = ZM, [0xA5] = ZM, [0xA6] = IMPL, [0xA8] = IMPL, [0xA9] = IND, [0xAA] = INDX, [0xAB] = INDY, [0xAC] = IMM, [0xAE] = IND, [0xB0] = IMPL, [0xB1] = IMM, [0xB2] = IMPL, [0xB3] = ABS, [0xB4] = ZM, [0xB5] = ZM, [0xB6] = IMPL, [0xB8] = IMPL, [0xB9] = INDX, [0xBA] = IMM, [0xBB] = IMM, [0xBC] = IMM, [0xBE] = INDX, [0xC0] = IMPL, [0xC1] = IMPL, [0xC2] = IMPL, [0xC3] = ABS, [0xC4] = ZM, [0xC5] = ZM, [0xC8] = IMPL, [0xC9] = INDX, [0xCA] = ABS, [0xCB] = ABS, [0xCC] = IMM, [0xCE] = INDX, [0xD0] = ZM, [0xD1] = IMPL, [0xD2] = IMPL, [0xD3] = ABS, [0xD4] = ZM, [0xD5] = ZM, [0xD9] = INDY, [0xDA] = ZM, [0xDB] = ZM, [0xDC] = IMM, [0xDE] = INDY, [0xE0] = ABS, [0xE1] = IMM, [0xE2] = IMPL, [0xE3] = ABS, [0xE5] = ZM, [0xE8] = IMPL, [0xE9] = INDY, [0xEA] = IND, [0xEB] = IND, [0xEC] = IMM, [0xEE] = INDY, [0xF0] = IMPL, [0xF1] = IND, [0xF3] = INDX, [0xF5] = INDY, [0xF8] = IMPL, [0xFA] = INDX, [0xFB] = INDY, [0xFC] = IMM }; static const char *mne[OPNUM] = { [ 0] = "CPS", [ 1] = "ADC", [ 2] = "AAB", [ 3] = "JMP", [ 4] = "PHB", [ 5] = "PHP", [ 6] = "LDA", [ 7] = "LDY", [ 8] = "LDX", [ 9] = "TAB", [10] = "LDB", [11] = "SBC", [12] = "SAB", [13] = "PLB", [14] = "PLP", [15] = "TBA", [16] = "JSR", [17] = "AND", [18] = "ABA", [19] = "CPB", [20] = "STT", [21] = "STA", [22] = "STY", [23] = "STX", [24] = "TAY", [25] = "STB", [26] = "BPO", [27] = "ORA", [28] = "OAB", [29] = "SEI", [30] = "TYA", [31] = "BNG", [32] = "XOR", [33] = "XAB", [34] = "CLI", [35] = "TAX", [36] = "BCS", [37] = "LSL", [38] = "LLB", [39] = "SEC", [40] = "TXA", [41] = "BCC", [42] = "LSR", [43] = "LRB", [44] = "CLC", [45] = "TYX", [46] = "BEQ", [47] = "ROL", [48] = "RLB", [49] = "SSP", [50] = "TXY", [51] = "BNE", [52] = "ROR", [53] = "RRB", [54] = "INY", [55] = "CSP", [56] = "TSX", [57] = "BVS", [58] = "MUL", [59] = "MAB", [60] = "DEY", [61] = "SEV", [62] = "TXS", [63] = "BVC", [64] = "DIV", [65] = "DAB", [66] = "INX", [67] = "CLV", [68] = "PHY", [69] = "RTS", [70] = "CMP", [71] = "CAB", [72] = "DEX", [73] = "ENT", [74] = "CPY", [75] = "CPX", [76] = "PLY", [77] = "RTI", [78] = "INC", [79] = "IAB", [80] = "WAI", [81] = "PHX", [82] = "DEC", [83] = "DBA", [84] = "PLX", [85] = "JSL", [86] = "ASR", [87] = "ARB", [88] = "NOP", [89] = "PHA", [90] = "RTL", [91] = "BRK", [92] = "PLA" }; static const char *instdesc[OPNUM] = { [ 0] = "Clears the Processor Status register.", [ 1] = "ADd accumulator, with operand, Carry if needed.", [ 2] = "Add Accumulator, with B, carry if needed.", [ 3] = "JuMP to the address specified.", [ 4] = "PusH the number of bytes specified, from the B register to the stack.", [ 5] = "PusH the number of bytes specified, from the Processor status register to the stack.", [ 6] = "LoaD the value from the operand, to the Accumulator.", [ 7] = "LoaD the value from the operand, to the Y register.", [ 8] = "LoaD the value from the operand, to the X register.", [ 9] = "Transfer the value from the Accumulator, to the B register.", [10] = "LoaD the value from the operand, to the B register.", [11] = "SuBtract accumulator, with operand, Carry if needed", [12] = "Subtract Accumulator, with B, carry if needed.", [13] = "PuLl the number of bytes specified, from the stack, to the B register.", [14] = "PuLl the number of bytes specified, from the stack, to the Processor status register.", [15] = "Transfer the value from the Y register, to the Accumulator.", [16] = "Jump to a SubRoutine.", [17] = "Bitwise AND accumulator, with operand.", [18] = "Bitwise AND Accumulator, with B.", [19] = "ComPare the B register, with operand.", [20] = "STart a Thread.", [21] = "STore the value from the Accumulator, in memory.", [22] = "STore the value from the Y register, in memory.", [23] = "STore the value from the X register, in memory.", [24] = "Transfer the value from the Accumulator, to the Y register.", [25] = "STore the value from the B register, in memory.", [26] = "Branch if POsitive.", [27] = "Bitwise OR Accumulator, with operand.", [28] = "Bitwise OR Accumulator, with B.", [29] = "SEt the Interrupt flag.", [30] = "Transfer the value from the Y register, to the Accumulator.", [31] = "Branch if NeGative.", [32] = "Bitwise XOR Accumulator, with operand.", [33] = "Bitwise XOR Accumulator, with B.", [34] = "CLear the Interrupt flag.", [35] = "Transfer the value from the Accumulator, to the X register.", [36] = "Branch if the Carry flag is Set.", [37] = "Logical Shift Left accumulator, with operand.", [38] = "Logical Shift Left accumulator, with B.", [39] = "SEt the Carry flag.", [40] = "Transfer the value from the X register, to the Accumulator.", [41] = "Branch if the Carry flag has been Cleared.", [42] = "Logical Shift Right accumulator, with operand.", [43] = "Logical Shift Right accumulator, with B.", [44] = "CLear the Carry flag.", [45] = "Transfer the value from the Y register, to the X register.", [46] = "Branch if EQual (the zero flag has been set).", [47] = "ROtate Left accumulator, with operand.", [48] = "Rotate Left accumulator, with B.", [49] = "Set the Stack Protection flag.", [50] = "Transfer the value from the X register, to the Y register.", [51] = "Branch if Not Equal (the zero flag has been cleared).", [52] = "ROtate Right accumulator, with operand.", [53] = "Rotate Right accumulator, with B.", [54] = "INcrement the Y register.", [55] = "Clear the Stack Protection flag.", [56] = "Transfer the value from the Stack pointer, to the X register.", [57] = "Branch if the oVerflow flag is Set.", [58] = "MULtiply accumulator, with operand.", [59] = "Multiply Accumulator, with B.", [60] = "DEcrement the Y register.", [61] = "SEt the oVerflow flag.", [62] = "Transfer the value from the X register, to the Stack pointer.", [63] = "Branch if the oVerflow flag has been Cleared.", [64] = "DIVide accumulator, with operand, and put the remainder into the B register.", [65] = "Divide Accumulator, with B, and put the remainder into the X register.", [66] = "INcrement the X register.", [67] = "CLear the oVerflow flag.", [68] = "PusH the number of bytes specified, from the Y register to the stack.", [69] = "ReTurn from a Subroutine.", [70] = "CoMPare acumulator, with operand.", [71] = "Compare Accumulator, with B.", [72] = "DEcrement the X register.", [73] = "ENd a Thread.", [74] = "ComPare the Y register, with operand.", [75] = "ComPare the X register, with operand.", [76] = "PuLl the number of bytes specified, from the stack, to the Y register.", [77] = "ReTurn from an Interrupt.", [78] = "INCrement accumulator, or memory.", [79] = "Increment Accumulator, and B.", [80] = "WAIt for an interrupt.", [81] = "PusH the number of bytes specified, from the X register to the stack.", [82] = "DECrement accumulator, or memory.", [83] = "Decrement Accumulator, and B.", [84] = "PuLl the number of bytes specified, from the stack, to the X register.", [85] = "Jump to a Subroutine, Long address.", [86] = "Arithmetic Shift Right accumulator, with operand.", [87] = "Arithmetic shift Right accumulator, with B.", [88] = "NO oPeration.", [89] = "PusH the number of bytes specified, from the Accumulator to the stack.", [90] = "ReTurn from subroutine, Long address.", [91] = "BReaKpoint.", [92] = "PuLl the number of bytes specified, from the stack, to the Accumulator." }; static const char *opname[0x100] = { [0x00] = "CPS", [0x01] = "ADC #", [0x02] = "AAB", [0x03] = "ADC a", [0x04] = "JMP (ind)", [0x05] = "ADC zm", [0x06] = "PHB", [0x08] = "PHP", [0x09] = "LDA #", [0x0A] = "LDY #", [0x0B] = "LDX #", [0x0C] = "TAB", [0x0E] = "LDB #", [0x10] = "JMP a", [0x11] = "SBC #", [0x12] = "SAB", [0x13] = "SBC a", [0x14] = "JMP (ind, x)", [0x15] = "SBC zm", [0x16] = "PLB", [0x18] = "PLP", [0x19] = "LDA a", [0x1A] = "LDY a", [0x1B] = "LDX a", [0x1C] = "TBA", [0x1E] = "LDB a", [0x20] = "JSR", [0x21] = "AND #", [0x22] = "ABA", [0x23] = "AND a", [0x24] = "JMP (ind), y", [0x25] = "AND zm", [0x26] = "CPB #", [0x28] = "STT", [0x29] = "STA a", [0x2A] = "STY a", [0x2B] = "STX a", [0x2C] = "TAY", [0x2E] = "STB a", [0x30] = "BPO", [0x31] = "ORA #", [0x32] = "OAB", [0x33] = "ORA a", [0x34] = "JSR (ind)", [0x35] = "ORA zm", [0x36] = "CPB a", [0x38] = "SEI", [0x39] = "LDA zm", [0x3A] = "LDY zm", [0x3B] = "LDX zm", [0x3C] = "TYA", [0x3E] = "LDB zm", [0x40] = "BNG", [0x41] = "XOR #", [0x42] = "XAB", [0x43] = "XOR a", [0x44] = "JSR (ind, x)", [0x45] = "XOR zm", [0x46] = "CPB zm", [0x48] = "CLI", [0x49] = "STA zm", [0x4A] = "STY zm", [0x4B] = "STX zm", [0x4C] = "TAX", [0x4E] = "STB zm", [0x50] = "BCS", [0x51] = "LSL #", [0x52] = "LLB", [0x53] = "LSL a", [0x54] = "JSR (ind), y", [0x55] = "LSL zm", [0x56] = "CPB (ind)", [0x58] = "SEC", [0x59] = "LDA zm, x", [0x5A] = "LDY zm, x", [0x5B] = "LDX zm, y", [0x5C] = "TXA", [0x5E] = "LDB zm, x", [0x60] = "BCC", [0x61] = "LSR #", [0x62] = "LRB", [0x63] = "LSR a", [0x64] = "BPO zm", [0x65] = "LSR zm", [0x66] = "CPB (ind, x)", [0x68] = "CLC", [0x69] = "STA zm, x", [0x6A] = "STY zm, x", [0x6B] = "STX zm, y", [0x6C] = "TYX", [0x6E] = "STB zm, x", [0x70] = "BEQ", [0x71] = "ROL #", [0x72] = "RLB", [0x73] = "ROL a", [0x74] = "BNG zm", [0x75] = "ROL zm", [0x76] = "CPB (ind), y", [0x78] = "SSP", [0x79] = "LDA zm, y", [0x7A] = "LDY (ind)", [0x7B] = "LDX (ind)", [0x7C] = "TXY", [0x7E] = "LDB zm, y", [0x80] = "BNE", [0x81] = "ROR #", [0x82] = "RRB", [0x83] = "ROR a", [0x84] = "BCS zm", [0x85] = "ROR zm", [0x86] = "INY", [0x88] = "CSP", [0x89] = "STA zm, y", [0x8A] = "STY (ind)", [0x8B] = "STX (ind)", [0x8C] = "TSX", [0x8E] = "STB zm, y", [0x90] = "BVS", [0x91] = "MUL #", [0x92] = "MAB", [0x93] = "MUL a", [0x94] = "BCC zm", [0x95] = "MUL zm", [0x96] = "DEY", [0x98] = "SEV", [0x99] = "LDA (ind)", [0x9A] = "LDY (ind, x)", [0x9B] = "LDX (ind), y", [0x9C] = "TXS", [0x9E] = "LDB (ind)", [0xA0] = "BVC", [0xA1] = "DIV #", [0xA2] = "DAB", [0xA3] = "DIV a", [0xA4] = "BEQ zm", [0xA5] = "DIV zm", [0xA6] = "INX", [0xA8] = "CLV", [0xA9] = "STA (ind)", [0xAA] = "STY (ind, x)", [0xAB] = "STX (ind), y", [0xAC] = "PHY", [0xAE] = "STB (ind)", [0xB0] = "RTS", [0xB1] = "CMP #", [0xB2] = "CAB", [0xB3] = "CMP a", [0xB4] = "BNE zm", [0xB5] = "CMP zm", [0xB6] = "DEX", [0xB8] = "ENT", [0xB9] = "LDA (ind, x)", [0xBA] = "CPY #", [0xBB] = "CPX #", [0xBC] = "PLY", [0xBE] = "LDB (ind, x)", [0xC0] = "RTI", [0xC1] = "INC A", [0xC2] = "IAB", [0xC3] = "INC a", [0xC4] = "BVS zm", [0xC5] = "INC zm", [0xC8] = "WAI", [0xC9] = "STA (ind, x)", [0xCA] = "CPY a", [0xCB] = "CPX a", [0xCC] = "PHX", [0xCE] = "STB (ind, x)", [0xD0] = "JMP zm", [0xD1] = "DEC A", [0xD2] = "DBA", [0xD3] = "DEC a", [0xD4] = "BVC zm", [0xD5] = "DEC zm", [0xD9] = "LDA (ind), y", [0xDA] = "CPY zm", [0xDB] = "CPX zm", [0xDC] = "PLX", [0xDE] = "LDB (ind), y", [0xE0] = "JSL", [0xE1] = "ASR #", [0xE2] = "ARB", [0xE3] = "ASR a", [0xE5] = "ASR zm", [0xE8] = "NOP", [0xE9] = "STA (ind), y", [0xEA] = "CPY (ind)", [0xEB] = "CPX (ind)", [0xEC] = "PHA", [0xEE] = "STB (ind), y", [0xF0] = "RTL", [0xF1] = "CMP (ind)", [0xF3] = "CMP (ind, x)", [0xF5] = "CMP (ind), y", [0xF8] = "BRK", [0xFA] = "CPY (ind, x)", [0xFB] = "CPX (ind), y", [0xFC] = "PLA" }; extern int asmmon(); extern void adc(struct sux *cpu, uint64_t adr, uint8_t thread, uint8_t regsize); extern void sbc(struct sux *cpu, uint64_t adr, uint8_t thread, uint8_t regsize); extern void mul(struct sux *cpu, uint64_t adr, uint8_t thread, uint8_t regsize); extern void divd(struct sux *cpu, uint64_t adr, uint8_t thread, uint8_t regsize); extern uint64_t and(struct sux *cpu, uint64_t value, uint8_t thread); extern void and_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread, uint8_t regsize); extern uint64_t or(struct sux *cpu, uint64_t value, uint8_t thread); extern void or_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread, uint8_t regsize); extern uint64_t xor(struct sux *cpu, uint64_t value, uint8_t thread); extern void xor_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread, uint8_t regsize); extern void rol(struct sux *cpu, uint64_t adr, uint8_t thread); extern void ror(struct sux *cpu, uint64_t adr, uint8_t thread); extern void lsl(struct sux *cpu, uint64_t adr, uint8_t thread); extern void lsr(struct sux *cpu, uint64_t adr, uint8_t thread); extern void inc(struct sux *cpu, uint64_t *reg, uint8_t thread); extern void inc_addr(struct sux *cpu, uint64_t adr, uint8_t thread); extern void dec(struct sux *cpu, uint64_t *reg, uint8_t thread); extern void dec_addr(struct sux *cpu, uint64_t adr, uint8_t thread); extern void stt(struct sux *cpu, uint8_t value); extern void ent(struct sux *cpu, uint8_t value); extern void ld(struct sux *cpu, uint64_t *reg, uint64_t adr, uint8_t thread, uint8_t regsize); extern void st(struct sux *cpu, uint64_t *reg, uint64_t adr, uint8_t thread, uint8_t regsize); extern void push(struct sux *cpu, uint8_t value); extern uint8_t pull(struct sux *cpu); extern void cmp_addr(struct sux *cpu, uint64_t reg, uint64_t adr, uint8_t thread, uint8_t regsize); extern void cmp(struct sux *cpu, uint64_t reg1, uint64_t reg2, uint8_t thread); extern void bfs(struct sux *cpu, uint8_t flag, uint64_t adr, uint8_t thread); extern void bfc(struct sux *cpu, uint8_t flag, uint64_t adr, uint8_t thread); extern void setps(struct sux *cpu, uint8_t thread); extern uint64_t immaddr(struct sux *cpu, uint8_t thread, uint8_t size); extern uint64_t absaddr(struct sux *cpu, uint8_t thread); extern uint32_t zeromtx(struct sux *cpu, uint8_t thread); extern uint32_t zeromx(struct sux *cpu, uint8_t thread); extern uint32_t zeromy(struct sux *cpu, uint8_t thread);