#define OPNAME(opcode) #opcode /* Get name of Opcode, for dissambly. */
#define CPS 0x00 /* Clear Processor Status. */
#define ADC 0x01 /* ADd with Carry. */
#define PHP 0x08 /* PusH Processor status to stack. */
#define PHA 0x09 /* PusH Accumulator to stack. */
#define PHY 0x0A /* PusH Y register to stack. */
#define PAY 0x0B /* Push Accumulator, and Y register to stack. */
#define PHX 0x0C /* PusH X register to stack. */
#define PAX 0x0D /* Push Accumulator, and X register to stack. */
#define JMP 0x10 /* JuMP to memory location. */
#define SBC 0x11 /* SuBtract with Carry. */
#define PLP 0x18 /* PuLl Processor status from stack. */
#define PLA 0x19 /* PuLl Accumulator from stack. */
#define PLY 0x1A /* PuLl Y register from stack. */
#define PYA 0x1B /* Pull Y register, and Accumulator from stack. */
#define PLX 0x1C /* PuLl X register from stack. */
#define PXA 0x1D /* Pull X register, and Accumulator from stack. */
#define JSR 0x20 /* Jump to SubRoutine. */
#define AND 0x21 /* bitwise AND with accumulator. */
#define ANY 0x22 /* bitwise ANd with Y register.*/
#define AAY 0x23 /* bitwise And with Accumulator, and Y register. */
#define ANX 0x24 /* bitwise ANd with X register. */
#define AAX 0x25 /* bitwise And with Accumulator, and X register. */
#define TSR 0x28 /* multi-Threaded jump to SubRoutine. */
#define BPO 0x30 /* Branch if POsitive. */
#define ORA 0x31 /* bitwise OR with Accumulator. */
#define ORY 0x32 /* bitwise OR with Y register. */
#define OAY 0x33 /* bitwise Or with Accumulator, and Y register. */
#define ORX 0x34 /* bitwise OR with X register. */
#define OAX 0x35 /* bitwise Or with Accumulator, and X register. */
#define SEZ 0x38 /* SEt Zero flag. */
#define BNG 0x40 /* Branch if NeGative. */
#define XOR 0x41 /* bitwise XOR with accumulator. */
#define XRY 0x42 /* bitwise XoR with Y register. */
#define XAY 0x43 /* bitwise Xor with Accumulator, and Y register. */
#define XRX 0x44 /* bitwise XoR with X register. */
#define XAX 0x45 /* bitwise Xor with Accumulator, and X register. */
#define CLZ 0x48 /* CLear Zero flag. */
#define BCS 0x50 /* Branch if Carry Set. */
#define SLA 0x51 /* Shift Left with Accumulator. */
#define SEC 0x58 /* SEt Carry flag. */
#define BCC 0x60 /* Branch if Carry Clear. */
#define SRA 0x61 /* Shift Right with Accumulator. */
#define CLC 0x68 /* CLear Carry flag. */
#define BEQ 0x70 /* Branch if EQual. */
#define ROL 0x71 /* ROtate Left. */
#define SSP 0x78 /* Set Stack Protection flag. */
#define BNE 0x80 /* Branch if Not Equal. */
#define ROR 0x81 /* ROtate Right. */
#define CSP 0x88 /* Clear Stack Protection flag. */
#define BVS 0x90 /* Branch if oVerflow Set. */
#define MUL 0x91 /* MULtiply with accumulator. */
#define SEV 0x98 /* SEt oVerflow flag. */
#define BVC 0xA0 /* Branch if oVerflow Clear. */
#define DIV 0xA1 /* DIVide with accumulator. */
#define CLV 0xA8 /* CLear oVerflow flag. */
#define RTS 0xB0 /* ReTurn from Subroutine. */
#define CMP 0xB1 /* CoMPare accumulator. */
#define CPY 0xB2 /* ComPare Y register. */
#define CAY 0xB3 /* Compare Accumulator, and Y register. */
#define CPX 0xB4 /* ComPare X register. */
#define CAX 0xB5 /* Compare Accumulator, and X register. */
#define RTT 0xB8 /* ReTurn from multi-Threaded subroutine. */
#define RTI 0xC0 /* ReTurn from Interupt. */
#define INC 0xC1 /* INCrement accumulator. */
#define INY 0xC2 /* INcrement Y register. */
#define IAY 0xC3 /* Increment Accumulator, and Y register. */
#define INX 0xC4 /* INcrement X register. */
#define IAX 0xC5 /* Increment Accumulator, and X register. */
#define SFB 0xC8 /* Set Fetch Byte(s) sub-register. */
#define DEC 0xD1 /* DECrement accumulator. */
#define DEY 0xD2 /* DEcrement Y register. */
#define DAY 0xD3 /* Decrement Accumulator, and Y register. */
#define DEX 0xD4 /* DEcrement X register. */
#define DAX 0xD5 /* Decrement Accumulator, and X register. */
#define CFB 0xD8 /* Clear Fetch Byte(s) sub-register. */
#define LDA 0xE1 /* LoaD Accumulator. */
#define LDY 0xE2 /* LoaD Y register. */
#define LAY 0xE3 /* Load Accumulator, and Y register. */
#define LDX 0xE4 /* LoaD X register. */
#define LAX 0xE5 /* Load Accumulator, and X register. */
#define NOP 0xE8 /* No OPeration. */
#define STA 0xF1 /* STore Accumulator. */
#define STY 0xF2 /* STore Y register. */
#define SAY 0xF3 /* Store Accumulator, and Y register. */
#define STX 0xF4 /* STore X register. */
#define SAX 0xF5 /* Store Accumulator, and X register. */
#define BRK 0xF8 /* BReaK. */