#include "opcode.h"
#include <assert.h>
#include <curses.h>
#include <ctype.h>
#include <string.h>
#include <pthread.h>
#define bench 0
#define debug 1
#define IO 0
#define keypoll 0
#if bench
#include <sys/time.h>
#endif

#define THREADS	1
#define BENCH_INST 100000000*THREADS
#define CTRL_ADDR 0xC000
#define TX_ADDR 0xC001
#define RX_ADDR 0xC002
#define CURSES_BACKSPACE 0x7F

uint64_t clk[THREADS];	/* Per Thread Clock cycles. */
uint64_t tclk;		/* Total Clock cycles. */
uint64_t inst[THREADS];
uint64_t inss;
uint8_t threads_done = 0;
uint8_t kbd_rdy = 0;
uint8_t wai = 0;
uint8_t irq = 0;
WINDOW *scr;
pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;
pthread_mutex_t main_mutex = PTHREAD_MUTEX_INITIALIZER;
pthread_cond_t cond = PTHREAD_COND_INITIALIZER;
pthread_cond_t main_cond = PTHREAD_COND_INITIALIZER;
struct suxthr {
	struct sux sx;
	uint8_t th;
};
#if bench
double ipc;
struct timeval str[THREADS], en[THREADS];
#endif

void *run(void *args) {
	struct suxthr *thr = (void *)args;
	struct sux *cpu = &thr->sx;
	uint8_t thread = thr->th;
	uint64_t address = 0;
	uint8_t prefix = 0;
	uint8_t opcode = 0;
	uint8_t end = 0;
	uint64_t sum = 0;
	uint64_t value = 0;
	uint64_t iclk = 0;
	uint64_t ins = 0;
	uint64_t sign = 0;
	char *s = malloc(2048);
	uint8_t lines = (6*thread)+2;
	uint8_t bcd[4];
	uint8_t idx = 3, iscol = 0;
	uint16_t tv = 0xFF50; /* Starting address of the Thread Vectors. */
	int x = 0, y = 0;
	uint8_t esc = 0;
#if bench
	gettimeofday(&str[thread], 0);
#endif
	while (!end) {
		address = 0;
		if (wai) {
			for (int8_t i = 56; i >= 0; i-=8) {
				if (i)
					addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->pc[thread]-1 >> i;
				else
					addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->pc[thread]-1 & 0xFF;
				cpu->sp[thread]--;
			}
			addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->ps >> 8*thread;
			cpu->sp[thread]--;
			cpu->i[thread] = 1;
			(cpu->i[thread]) ? (cpu->ps |= (I << 8*thread)) : (cpu->ps &= ~(I << 8*thread));
			cpu->pc[thread] = (uint64_t)addr[0xFFA0]
					| (uint64_t)addr[0xFFA1] << 8
					| (uint64_t)addr[0xFFA2] << 16
					| (uint64_t)addr[0xFFA3] << 24
					| (uint64_t)addr[0xFFA4] << 32
					| (uint64_t)addr[0xFFA5] << 40
					| (uint64_t)addr[0xFFA6] << 48
					| (uint64_t)addr[0xFFA7] << 56;
			wai = 0;
			kbd_rdy &= (uint8_t)~(1 << thread);
		}
		prefix = addr[cpu->pc[thread]];
		if ((prefix & 0x0F) == 0x07)
			cpu->pc[thread]++;
		else
			prefix = 0;
		opcode = addr[cpu->pc[thread]];

	#if debug && !bench
		#if keypoll
		pthread_mutex_lock(&mutex);
		#endif
		mvwprintw(scr, lines, 0, "pc: $%08llx, a: $%016llx, b: $%016llx, x: $%016llx, y: $%016llx"
			", sp: $%04lx, ps: $%016llx, prefix: $%02x, opcode: $%02x, thread: %u, inst: %s       \r"
			, cpu->pc[thread], cpu->a[thread], cpu->b[thread], cpu->x[thread], cpu->y[thread]
			, cpu->sp[thread], cpu->ps, prefix, opcode, thread, opname[opcode]);
		wrefresh(scr);
		#if keypoll
		pthread_mutex_unlock(&mutex);
		#endif
		lines++;
		if (lines > 24*(thread+1))
			lines = (24*thread)+2;
	#endif

		uint8_t rs = (prefix & 0x30) >> 4;
		uint8_t regsize = (1 << rs);
		uint8_t tmp;
		address = cpu->pc[thread];
		cpu->pc[thread]++;
		iclk++;
		switch(opcode) {
			case CPS: /* Clear Processor Status. */
				for (uint8_t i = 0; i < 8; i++) {
					cpu->c[i] = 0;
					cpu->z[i] = 0;
					cpu->i[i] = 0;
					cpu->s[i] = 0;
					cpu->v[i] = 0;
					cpu->n[i] = 0;
				}
				cpu->ps &= 0;
				break;
			case ADC:  /* ADC Immediate. */
			case AAB: /* Add Accumulator with carry by B register. */
			case 0x03: /* ADC Absolute. */
			case 0x05: /* ADC Zero Matrix. */
				if (opcode != AAB) {
					if (opcode == ADC) {
						address = cpu->pc[thread];
						cpu->pc[thread]+=regsize;
					}
					if (opcode == 0x03) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x05) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = addr[address];
					if (regsize >= 2) {
						value += (uint64_t)addr[address+1] << 8;
					}
					if (regsize >= 4) {
						value += (uint64_t)addr[address+2] << 16;
						value += (uint64_t)addr[address+3] << 24;
					}
					if (regsize >= 8) {
						value += (uint64_t)addr[address+4] << 32;
						value += (uint64_t)addr[address+5] << 40;
						value += (uint64_t)addr[address+6] << 48;
						value += (uint64_t)addr[address+7] << 56;
					}
				} else {
					value = cpu->b[thread];
				}
				sum = cpu->a[thread]+value+cpu->c[thread];
				cpu->a[thread] = sum;
				cpu->z[thread] = (sum == 0);
				cpu->n[thread] = (sum >> 63);
				cpu->v[thread] = !((cpu->a[thread]^value) & 0x8000000000000000) && ((cpu->a[thread]^sum) & 0x8000000000000000);
				cpu->c[thread] = (sum < value);
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				(cpu->v[thread]) ? (cpu->ps |= (V << 8*thread)) : (cpu->ps &= ~(V << 8*thread));
				(cpu->c[thread]) ? (cpu->ps |= (C << 8*thread)) : (cpu->ps &= ~(C << 8*thread));
				break;
			case PHB: /* PusH B register to stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (int8_t i = tmp*8; i >= 0; i-=8) {
					if (i)
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->b[thread] >> i;
					else
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->b[thread] & 0xFF;
					cpu->sp[thread]--;
				}
				break;
			case PHP: /* PusH Processor status to stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (int8_t i = tmp*8; i >= 0; i-=8) {
					if (i)
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->ps >> i;
					else
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->ps & 0xFF;
					cpu->sp[thread]--;
				}
				break;
			case PHA: /* PusH Accumulator to stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (int8_t i = tmp*8; i >= 0; i-=8) {
					if (i)
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->a[thread] >> i;
					else
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->a[thread] & 0xFF;
					cpu->sp[thread]--;
				}
				break;
			case PHY: /* PusH Y register to stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (int8_t i = tmp*8; i >= 0; i-=8) {
					if (i)
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->y[thread] >> i;
					else
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->y[thread] & 0xFF;
					cpu->sp[thread]--;
				}
				break;
			case TAY: /* Transfer Accumulator to Y. */
			case TAX: /* Transfer Accumulator to Y. */
			case TYX: /* Transfer Y to X. */
			case TYA: /* Transfer Y to Accumulator. */
			case TXA: /* Transfer X to Accumulator. */
			case TXY: /* Transfer X to Y. */
			case TAB: /* Transfer Accumulator to B. */
			case TSX: /* Transfer Stack pointer to X. */
			case TBA: /* Transfer B to Accumulator. */
			case TXS: /* Transfer X to Stack pointer. */
				if (opcode == TAY)
					cpu->y[thread] = cpu->a[thread];
				if (opcode == TAX)
					cpu->x[thread] = cpu->a[thread];
				if (opcode == TYX)
					cpu->x[thread] = cpu->y[thread];
				if (opcode == TYA)
					cpu->a[thread] = cpu->y[thread];
				if (opcode == TXA)
					cpu->a[thread] = cpu->x[thread];
				if (opcode == TXY)
					cpu->y[thread] = cpu->x[thread];
				if (opcode == TAB) {
					cpu->b[thread] = cpu->a[thread];
					cpu->z[thread] = (cpu->b[thread] == 0);
					cpu->n[thread] = (cpu->b[thread] >> 63);
				}
				if (opcode == TSX) {
					cpu->x[thread] = cpu->sp[thread] & 0xFFFF;
					cpu->x[thread] = cpu->stk_st[thread] << 16;
				}
				if (opcode == TBA)
					cpu->a[thread] = cpu->b[thread];
				if (opcode == TXS) {
					cpu->sp[thread] = cpu->x[thread];
					if (prefix == 0x17 && (value == thread+1 || value > 8)) {
						cpu->stk_st[thread] = value & 0xFF;
						cpu->stk_st[thread] += value << 16;
						cpu->pc[thread]+=2;
					}
				}
				if (opcode == TYA || opcode == TXA || opcode == TBA) {
					cpu->z[thread] = (cpu->a[thread] == 0);
					cpu->n[thread] = (cpu->a[thread] >> 63);
				}
				if (opcode == TAY || opcode == TXY) {
					cpu->z[thread] = (cpu->y[thread] == 0);
					cpu->n[thread] = (cpu->y[thread] >> 63);
				}
				if (opcode == TAX || opcode == TYX) {
					cpu->z[thread] = (cpu->x[thread] == 0);
					cpu->n[thread] = (cpu->x[thread] >> 63);
				}
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				break;
			case PHX: /* PusH X register to stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (int8_t i = tmp*8; i >= 0; i-=8) {
					if (i)
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->x[thread] >> i;
					else
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->x[thread] & 0xFF;
					cpu->sp[thread]--;
				}
				break;
			case JMP: /* JMP Absolute. */
				address =	(uint64_t)addr[cpu->pc[thread]]
						| (uint64_t)addr[cpu->pc[thread]+1] << 8
						| (uint64_t)addr[cpu->pc[thread]+2] << 16
						| (uint64_t)addr[cpu->pc[thread]+3] << 24
						| (uint64_t)addr[cpu->pc[thread]+4] << 32
						| (uint64_t)addr[cpu->pc[thread]+5] << 40
						| (uint64_t)addr[cpu->pc[thread]+6] << 48
						| (uint64_t)addr[cpu->pc[thread]+7] << 56;
				cpu->pc[thread]+=8;
				iclk++;
				cpu->pc[thread] = address;
				break;
			case SBC: /* SBC Immediate. */
			case SAB: /* Subtract Accumulator with carry by B register. */
			case 0x13: /* SBC Absolute. */
			case 0x15: /* SBC Zero Matrix. */
				if (opcode != SAB) {
					if (opcode == SBC) {
						address = cpu->pc[thread];
						cpu->pc[thread]+=regsize;
					}
					if (opcode == 0x13) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x15) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = addr[address];
					if (regsize >= 2) {
						value += (uint64_t)addr[address+1] << 8;
					}
					if (regsize >= 4) {
						value += (uint64_t)addr[address+2] << 16;
						value += (uint64_t)addr[address+3] << 24;
					}
					if (regsize >= 8) {
						value += (uint64_t)addr[address+4] << 32;
						value += (uint64_t)addr[address+5] << 40;
						value += (uint64_t)addr[address+6] << 48;
						value += (uint64_t)addr[address+7] << 56;
					}
				} else {
					value = cpu->b[thread];
				}
				sum = cpu->a[thread]-value-!cpu->c[thread];
				cpu->z[thread] = (sum == 0);
				cpu->n[thread] = (sum >> 63);
				cpu->v[thread] = ((cpu->a[thread]^value) & 0x8000000000000000) && ((cpu->a[thread]^sum) & 0x8000000000000000);
				cpu->c[thread] = (sum > value);
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				(cpu->v[thread]) ? (cpu->ps |= (V << 8*thread)) : (cpu->ps &= ~(V << 8*thread));
				(cpu->c[thread]) ? (cpu->ps |= (C << 8*thread)) : (cpu->ps &= ~(C << 8*thread));
				cpu->a[thread] = sum;
				break;
			case PLB: /* PuLl B register from stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (uint8_t i = 0; i < (tmp+1)*8; i+=8) {
					cpu->sp[thread]++;
					if (i)
						cpu->b[thread] += (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i;
					else
						cpu->b[thread] = (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] & 0xFF;
				}
				break;
			case PLP: /* PuLl Processor status from stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (uint8_t i = 0; i < (tmp+1)*8; i+=8) {
					cpu->sp[thread]++;
					if (i)
						cpu->ps += (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i;
					else
						cpu->ps = (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] & 0xFF;
				}
				break;
			case PLA: /* PuLl Accumulator from stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (uint8_t i = 0; i < (tmp+1)*8; i+=8) {
					cpu->sp[thread]++;
					if (i)
						cpu->a[thread] += (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i;
					else
						cpu->a[thread] = (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] & 0xFF;
				}
				break;
			case PLY: /* PuLl Y register from stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (uint8_t i = 0; i < (tmp+1)*8; i+=8) {
					cpu->sp[thread]++;
					if (i)
						cpu->y[thread] += (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i;
					else
						cpu->y[thread] = (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] & 0xFF;
				}
				break;
			case PLX: /* PuLl X register from stack. */
				tmp = addr[cpu->pc[thread]++];
				if (tmp > 7)
					tmp = 7;
				for (uint8_t i = 0; i < (tmp+1)*8; i+=8) {
					cpu->sp[thread]++;
					if (i)
						cpu->x[thread] += (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i;
					else
						cpu->x[thread] = (uint64_t)addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] & 0xFF;
				}
				break;
			case 0x34: /* JSR Indirect. */
			case 0x44: /* JSR Indexed Indirect. */
			case 0x54: /* JSR Indirect Indexed. */
			case JSR: /* Jump to SubRoutine. */
				address =	(uint64_t)addr[cpu->pc[thread]]
						| (uint64_t)addr[cpu->pc[thread]+1] << 8
						| (uint64_t)addr[cpu->pc[thread]+2] << 16
						| (uint64_t)addr[cpu->pc[thread]+3] << 24;
				if (opcode == 0x34 || opcode == 0x44 || opcode == 0x54) {
					address =	(uint64_t)addr[address]
							| (uint64_t)addr[address+1] << 8
							| (uint64_t)addr[address+2] << 16
							| (uint64_t)addr[address+3] << 24
							| (uint64_t)addr[address+4] << 32
							| (uint64_t)addr[address+5] << 40
							| (uint64_t)addr[address+6] << 48
							| (uint64_t)addr[address+7] << 56;
					if (opcode == 0x44)
						address += cpu->x[thread];
					if (opcode == 0x54)
						address += cpu->y[thread];
				}
				cpu->pc[thread]+=4;
				for (int8_t i = 24; i >= 0; i-=8) {
					if (i)
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->pc[thread] >> i;
					else
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->pc[thread] & 0xFF;
					cpu->sp[thread]--;
				}
				cpu->pc[thread] = address;
				break;
			case AND: /* AND Immediate. */
			case ABA: /* bitwise And with Accumulator, and B register. */
			case 0x23: /* AND Absolute. */
			case 0x25: /* AND Zero Matrix. */
				if (opcode != ABA) {
					if (opcode == AND) {
						address = cpu->pc[thread];
						cpu->pc[thread]+=regsize;
					}
					if (opcode == 0x23) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x25) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = (uint64_t)addr[address];
					if (regsize >= 2)
						value += (uint64_t)addr[address+1] << 8;
					if (regsize >= 4) {
						value += (uint64_t)addr[address+2] << 16;
						value += (uint64_t)addr[address+3] << 24;
					}
					if (regsize >= 8) {
						value += (uint64_t)addr[address+4] << 32;
						value += (uint64_t)addr[address+5] << 40;
						value += (uint64_t)addr[address+6] << 48;
						value += (uint64_t)addr[address+7] << 56;
					}
				}
				cpu->a[thread] &= value;
				cpu->z[thread] = (value == 0);
				cpu->n[thread] = (value >> 63);
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				break;
			case STT: /* STart Thread. */
				address = cpu->pc[thread];
				cpu->pc[thread]++;
				value = addr[address];
				cpu->crt |= value;
				for (uint8_t i = 0; i < 7; i++) {
					if ((value >> i) & 1) {
						address = (uint64_t)addr[tv+(8*i)]
								| (uint64_t)addr[tv+1+(8*i)] << 8
								| (uint64_t)addr[tv+2+(8*i)] << 16
								| (uint64_t)addr[tv+3+(8*i)] << 24
								| (uint64_t)addr[tv+4+(8*i)] << 32
								| (uint64_t)addr[tv+5+(8*i)] << 40
								| (uint64_t)addr[tv+6+(8*i)] << 48
								| (uint64_t)addr[tv+7+(8*i)] << 56;
						cpu->pc[i+1] = address;
					}
				}
				break;
			case BPO: /* BPO Absolute. */
			case 0x64: /* BPO Zero Matrix. */
				if (opcode == BPO) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (cpu->n[thread])
					cpu->pc[thread] = address;
				break;
			case ORA: /* ORA Immediate. */
			case OAB: /* bitwise Or with Accumulator, and B register. */
			case 0x33: /* ORA Absolute. */
			case 0x35: /* ORA Zero Matrix. */
				if (opcode != OAB) {
					if (opcode == ORA) {
						address = cpu->pc[thread];
						cpu->pc[thread]+=regsize;
					}
					if (opcode == 0x39) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x3B) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = (uint64_t)addr[address];
					if (regsize >= 2)
						value += (uint64_t)addr[address+1] << 8;
					if (regsize >= 4) {
						value += (uint64_t)addr[address+2] << 16;
						value += (uint64_t)addr[address+3] << 24;
					}
					if (regsize >= 8) {
						value += (uint64_t)addr[address+4] << 32;
						value += (uint64_t)addr[address+5] << 40;
						value += (uint64_t)addr[address+6] << 48;
						value += (uint64_t)addr[address+7] << 56;
					}
				} else {
					value = cpu->b[thread];
				}
				cpu->a[thread] |= value;
				cpu->z[thread] = (value == 0);
				cpu->n[thread] = (value >> 63);
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				break;
			case SEI: /* SEt Interrupt. */
				cpu->i[thread] = 1;
				(cpu->ps |= (I << 8*thread));
				break;
			case BNG: /* BNG Absolute. */
			case 0x74: /* BNG Zero Matrix. */
				if (opcode == BNG) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (!cpu->n[thread])
					cpu->pc[thread] = address;
				break;
			case XOR: /* XOR Immediate. */
			case XAB: /* bitwise Xor with Accumulator, and B register. */
			case 0x43: /* XOR Absolute. */
			case 0x45: /* XOR Zero Matrix. */
				if (opcode != XAB) {
					if (opcode == XOR) {
						address = cpu->pc[thread];
						cpu->pc[thread]+=regsize;
					}
					if (opcode == 0x49) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x4B) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = (uint64_t)addr[address];
					if (regsize >= 2)
						value += (uint64_t)addr[address+1] << 8;
					if (regsize >= 4) {
						value += (uint64_t)addr[address+2] << 16;
						value += (uint64_t)addr[address+3] << 24;
					}
					if (regsize >= 8) {
						value += (uint64_t)addr[address+4] << 32;
						value += (uint64_t)addr[address+5] << 40;
						value += (uint64_t)addr[address+6] << 48;
						value += (uint64_t)addr[address+7] << 56;
					}
				} else {
					value = cpu->b[thread];
				}
				cpu->a[thread] ^= value;
				cpu->z[thread] = (value == 0);
				cpu->n[thread] = (value >> 63);
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				break;
			case CLI: /* CLear Interrupt. */
				cpu->i[thread] = 0;
				(cpu->ps &= ~(I << 8*thread));
				break;
			case BCS: /* BCS Absolute. */
			case 0x84: /* BCS Zero Matrix. */
				if (opcode == BCS) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (cpu->c[thread])
					cpu->pc[thread] = address;
				break;
			case LSL: /* LSL Immediate. */
			case LLB: /* Logical shift Left accumulator by B. */
			case 0x53: /* LSL Absolute. */
			case 0x55: /* LSL Zero Matrix. */
				if (opcode != LLB) {
					if (opcode == LSL) {
						address = cpu->pc[thread];
						cpu->pc[thread]++;
					}
					if (opcode == 0x53) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;

						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x55) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = addr[address];
				} else {
					value = cpu->b[thread];
				}
				sum = (value < 64) ? cpu->a[thread] << value : 0;
				cpu->z[thread] = (sum == 0);
				cpu->n[thread] = (sum >> 63);
				cpu->c[thread] = cpu->a[thread] >> 64-value;
				cpu->a[thread] = sum;
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				(cpu->c[thread]) ? (cpu->ps |= (C << 8*thread)) : (cpu->ps &= ~(C << 8*thread));
				break;
			case SEC: /* SEt Carry flag.*/
				cpu->c[thread] = 1;
				(cpu->ps |= (C << 8*thread));
				break;
			case STA: /* STA Absolute. */
			case STY: /* STY Absolute. */
			case STX: /* STX Absolute. */
			case STB: /* STB Absolute. */
			case 0x7B: /* STA Zero Matrix. */
			case 0x7D: /* STY Zero Matrix. */
			case 0x7E: /* STX Zero Matrix. */
			case 0x7F: /* STB Zero Matrix. */
			case 0x8B: /* STA Zero Matrix, Indexed with X. */
			case 0x8D: /* STY Zero Matrix, Indexed with X. */
			case 0x8F: /* STA Zero Matrix, Indexed with X. */
			case 0x9B: /* STA Zero Matrix, Indexed with Y. */
			case 0x9E: /* STX Zero Matrix, Indexed with Y. */
			case 0x9F: /* STA Zero Matrix, Indexed with Y. */
			case 0xAB: /* STA Indirect. */
			case 0xAD: /* STY Indirect. */
			case 0xAE: /* STX Indirect. */
			case 0xAF: /* STB Indirect. */
			case 0xBB: /* STA Indexed Indirect. */
			case 0xBD: /* STY Indexed Indirect. */
			case 0xBF: /* STB Indexed Indirect. */
			case 0xCB: /* STA Indirect Indexed. */
			case 0xCE: /* STX Indirect Indexed. */
			case 0xCF: /* STB Indirect Indexed. */
				if (opcode == STA || opcode == STY || opcode == STX || opcode == STB) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					if (opcode == 0xAB || opcode == 0xAD || opcode == 0xAE || opcode == 0xAF || opcode == 0xBB ||
					    opcode == 0xBD || opcode == 0xBF || opcode == 0xCB || opcode == 0xCE || opcode == 0xCF) {
							address =	(uint64_t)addr[address]
									| (uint64_t)addr[address+1] << 8
									| (uint64_t)addr[address+2] << 16
									| (uint64_t)addr[address+3] << 24
									| (uint64_t)addr[address+4] << 32
									| (uint64_t)addr[address+5] << 40
									| (uint64_t)addr[address+6] << 48
									| (uint64_t)addr[address+7] << 56;
						}
					if (opcode == 0x8B || opcode == 0x8D || opcode == 0x8F ||
					    opcode == 0xBB || opcode == 0xBD || opcode == 0xBF)
						address += cpu->x[thread];
					if (opcode == 0x9B || opcode == 0x9E || opcode == 0x9F ||
					    opcode == 0xCB || opcode == 0xCE || opcode == 0xCF)
						address += cpu->y[thread];
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (opcode == STA || opcode == 0x7B || opcode == 0x8B || opcode == 0x9B)
					value = cpu->a[thread];
				if (opcode == STY || opcode == 0x7D || opcode == 0x8D)
					value = cpu->y[thread];
				if (opcode == STX || opcode == 0x7E || opcode == 0x9E)
					value = cpu->x[thread];
				if (opcode == STB || opcode == 0x7F || opcode == 0x8F || opcode == 0x9F)
					value = cpu->b[thread];
				addr[address] = value & 0xFF;
				#if IO
				if (address == TX_ADDR) {
					#if keypoll
					pthread_mutex_lock(&mutex);
					#endif
					if (esc) {
						switch(addr[address]) {
							case 'A':
								if (y > 0)
									y--;
								wmove(scr, y, x);
								esc = 0;
								break;
							case 'B':
								if (y < getmaxy(scr))
									y++;
								wmove(scr, y, x);
								esc = 0;
								break;
							case 'C':
								if (x < getmaxx(scr))
									x++;
								wmove(scr, y, x);
								esc = 0;
								break;
							case 'D':
								if (x > 0)
									x--;
								wmove(scr, y, x);
								esc = 0;
								break;
							case 'H':
								if (!bcd[2] && !bcd[3])
									y = 0;
								else
									y = ((bcd[3]*10) + bcd[2]);
								if (!bcd[0] && !bcd[1])
									x = 0;
								else
									x = ((bcd[1]*10) + bcd[0]);
								idx = 3;
								wmove(scr, y, x);
								bcd[0] = 0;
								bcd[1] = 0;
								bcd[2] = 0;
								bcd[3] = 0;
								esc = 0;
								break;
							case '0':
							case '1':
							case '2':
							case '3':
							case '4':
							case '5':
							case '6':
							case '7':
							case '8':
							case '9':
								bcd[idx--] = (addr[address] - '0');
								break;
							default:
								iscol = (addr[address] == ';');
								break;
						}
					} else {
						if (addr[address] == CURSES_BACKSPACE || addr[address] == '\b') {
							if (x > 0) {
								x--;
								wmove(scr, y, x);
							}
							wdelch(scr);
							wrefresh(scr);
						} else if (addr[address] == '\033') {
							esc = 1;
						} else {
							wmove(scr, y, x);
							waddch(scr, addr[address]);
							wrefresh(scr);
							if (addr[address] == '\n') {
								x = 0;
								y+=1;
							} else {
								x+=1;
							}
						}
					}
					#if keypoll
					pthread_mutex_unlock(&mutex);
					#endif
				}
				#else
				if (address == TX_ADDR) {
					if (esc) {
						switch(addr[address]) {
							case 'A':
								if (y > 0)
									y--;
								esc = 0;
								break;
							case 'B':
								if (y < getmaxy(scr))
									y++;
								esc = 0;
								break;
							case 'C':
								if (x < getmaxx(scr))
									x++;
								esc = 0;
								break;
							case 'D':
								if (x > 0)
									x--;
								esc = 0;
								break;
							case 'H':
								if (!bcd[2] && !bcd[3])
									y = 0;
								else
									y = ((bcd[3]*10) + bcd[2]);
								if (!bcd[0] && !bcd[1])
									x = 0;
								else
									x = ((bcd[1]*10) + bcd[0]);
								mvwprintw(scr, getmaxy(scr)-25, 0, "x: %i, y: %i  ", x, y);
								idx = 3;
								bcd[0] = 0;
								bcd[1] = 0;
								bcd[2] = 0;
								bcd[3] = 0;
								esc = 0;
								break;
							case '0':
							case '1':
							case '2':
							case '3':
							case '4':
							case '5':
							case '6':
							case '7':
							case '8':
							case '9':
								bcd[idx--] = (addr[address] - '0');
								break;
							default:
								iscol = (addr[address] == ';');
								break;
						}
					} else {
						if (addr[address] == CURSES_BACKSPACE || addr[address] == '\b') {
							if (x > 0) {
								x--;
							}
						} else if (addr[address] == '\033') {
							esc = 1;
						} else {
							if (addr[address] == '\n') {
								x = 0;
								y+=1;
							} else {
								x+=1;
							}
						}
					}
				}
				#endif
				if (regsize >= 2)
					addr[address+1] = value >> 8;
				if (regsize >= 4) {
					addr[address+2] = value >> 16;
					addr[address+3] = value >> 24;
				}
				if (regsize >= 8) {
					addr[address+4] = value >> 32;
					addr[address+5] = value >> 40;
					addr[address+6] = value >> 48;
					addr[address+7] = value >> 56;
				}
				break;
			case BCC: /* BCC Absolute. */
			case 0x94: /* BCC Zero Matrix. */
				if (opcode == BCC) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (!cpu->c[thread])
					cpu->pc[thread] = address;
				break;
			case LSR: /* LSR Immediate. */
			case LRB: /* Logical shift Right accumulator by B. */
			case 0x63: /* LSR Absolute. */
			case 0x65: /* LSR Zero Matrix. */
			case ASR: /* ASR Immediate. */
			case ARB: /* Arithmetic shift Right accumulator by B. */
			case 0xE3: /* ASR Absolute. */
			case 0xE5: /* ASR Zero Matrix. */
				if (opcode != LRB || opcode != ARB) {
					if (opcode == LSR || opcode == ASR) {
						address = cpu->pc[thread];
						cpu->pc[thread]++;
					}
					if (opcode == 0x63 || opcode == 0xE3) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x65 || opcode == 0xE5) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = addr[address];
				} else {
					value = cpu->b[thread];
				}
				if (opcode == ASR || opcode == ARB || opcode == 0xE3 || opcode == 0xE5) {
					sign = cpu->a[thread] & 0x8000000000000000;
					sum = (value < 64) ? (cpu->a[thread] >> value) | sign : 0;
				}
				if (opcode == LSR || opcode == LRB || opcode == 0x63 || opcode == 0x65) {
					sum = (value < 64) ? cpu->a[thread] >> value : 0;
				}
				cpu->z[thread] = (sum == 0);
				cpu->n[thread] = (sum >> 63);
				cpu->c[thread] = cpu->a[thread] & 1;
				cpu->a[thread] = sum;
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				(cpu->c[thread]) ? (cpu->ps |= (C << 8*thread)) : (cpu->ps &= ~(C << 8*thread));
				break;
			case CLC: /* CLear Carry flag. */
				cpu->c[thread] = 0;
				(cpu->ps &= ~(C << 8*thread));
				break;
			case 0x56: /* LDB Absolute. */
			case 0x59: /* LDA Absolute. */
			case 0x5A: /* LDY Absolute. */
			case 0x5C: /* LDX Absolute. */
			case LDB: /* LDB Immediate. */
			case LDA: /* LDA Immediate. */
			case LDY: /* LDY Immediate. */
			case LDX: /* LDX Immediate. */
			case 0x76: /* LDB Zero Matrix. */
			case 0x79: /* LDA Zero Matrix. */
			case 0x7A: /* LDY Zero Matrix. */
			case 0x7C: /* LDX Zero Matrix. */
			case 0x86: /* LDB Zero Matrix, Indexed with X. */
			case 0x89: /* LDA Zero Matrix, Indexed with X. */
			case 0x8A: /* LDY Zero Matrix, Indexed with X. */
			case 0x96: /* LDB Zero Matrix, Indexed with Y. */
			case 0x99: /* LDA Zero Matrix, Indexed with Y. */
			case 0x9C: /* LDX Zero Matrix, Indexed with Y. */
			case 0xA6: /* LDB Indirect. */
			case 0xA9: /* LDA Indirect. */
			case 0xAA: /* LDY Indirect. */
			case 0xAC: /* LDX Indirect. */
			case 0xB6: /* LDB Indexed Indirect. */
			case 0xB9: /* LDA Indexed Indirect. */
			case 0xBA: /* LDY Indexed Indirect. */
			case 0xC6: /* LDB Indirect Indexed. */
			case 0xC9: /* LDA Indirect Indexed. */
			case 0xCC: /* LDX Indirect Indexed. */
				if (opcode == LDB || opcode == LDA || opcode == LDY || opcode == LDX) {
					address = cpu->pc[thread];
					cpu->pc[thread]+=regsize;
				} else if (opcode == 0x56 || opcode == 0x59 || opcode == 0x5A || opcode == 0x5C) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					if (opcode == 0xA6 || opcode == 0xA9 || opcode == 0xAA || opcode == 0xAC || opcode == 0xB6 ||
					    opcode == 0xB9 || opcode == 0xBA || opcode == 0xC6 || opcode == 0xC9 || opcode == 0xCC) {
							address =	(uint64_t)addr[address]
									| (uint64_t)addr[address+1] << 8
									| (uint64_t)addr[address+2] << 16
									| (uint64_t)addr[address+3] << 24
									| (uint64_t)addr[address+4] << 32
									| (uint64_t)addr[address+5] << 40
									| (uint64_t)addr[address+6] << 48
									| (uint64_t)addr[address+7] << 56;
						}
					if (opcode == 0x86 || opcode == 0x89 || opcode == 0x8A ||
					    opcode == 0xB6 || opcode == 0xB9 || opcode == 0xBA)
						address += cpu->x[thread];
					if (opcode == 0x96 || opcode == 0x99 || opcode == 0x9C ||
					    opcode == 0xC6 || opcode == 0xC9 || opcode == 0xCC)
						address += cpu->y[thread];
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (address == CTRL_ADDR) {
					pthread_mutex_lock(&main_mutex);
					pthread_cond_signal(&main_cond);
					pthread_mutex_unlock(&main_mutex);
					#if !keypoll
					pthread_mutex_lock(&mutex);
					pthread_cond_wait(&cond, &mutex);
					pthread_mutex_unlock(&mutex);
					#endif
				}
				value = (uint64_t)addr[address];
				if (regsize >= 2)
					value += (uint64_t)addr[address+1] << 8;
				if (regsize >= 4) {
					value += (uint64_t)addr[address+2] << 16;
					value += (uint64_t)addr[address+3] << 24;
				}
				if (regsize >= 8) {
					value += (uint64_t)addr[address+4] << 32;
					value += (uint64_t)addr[address+5] << 40;
					value += (uint64_t)addr[address+6] << 48;
					value += (uint64_t)addr[address+7] << 56;
				}
				if (opcode == LDB || opcode == 0x56 || opcode == 0x76 || opcode == 0x86 || opcode == 0x96)
					cpu->b[thread] = value;
				if (opcode == LDA || opcode == 0x59 || opcode == 0x79 || opcode == 0x89 || opcode == 0x99)
					cpu->a[thread] = value;
				if (opcode == LDY || opcode == 0x5A || opcode == 0x7A || opcode == 0x8A)
					cpu->y[thread] = value;
				if (opcode == LDX || opcode == 0x5C || opcode == 0x7C || opcode == 0x9C)
					cpu->x[thread] = value;
				cpu->z[thread] = (value == 0);
				cpu->n[thread] = (value >> 63);
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				break;
			case BEQ: /* BEQ Absolute. */
			case 0xA4: /* BEQ Zero Matrix. */
				if (opcode == BEQ) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (cpu->z[thread])
					cpu->pc[thread] = address;
				break;
			case ROL: /* ROL Immediate. */
			case RLB: /* Rotate Left accumulator by B. */
			case 0x73: /* ROL Absolute. */
			case 0x75: /* ROL Zero Matrix. */
				if (opcode != RLB) {
					if (opcode == ROL) {
						address = cpu->pc[thread];
						cpu->pc[thread]++;
					}
					if (opcode == 0x73) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x75) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = addr[address];
				} else {
					value = cpu->b[thread];
				}
				sum = cpu->a[thread] << value;
				sum |= cpu->c[thread];
				cpu->z[thread] = (sum == 0);
				cpu->n[thread] = (sum >> 63);
				cpu->c[thread] = cpu->a[thread] >> (uint64_t)64-value;
				cpu->a[thread] = sum;
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				(cpu->c[thread]) ? (cpu->ps |= (C << 8*thread)) : (cpu->ps &= ~(C << 8*thread));
				break;
			case SSP: /* Set Stack Protection flag. */
				cpu->s[thread] = 1;
				(cpu->ps |= (S << 8*thread));
				break;
			case BNE: /* BNE Absolute. */
			case 0xB4: /* BNE Zero Matrix. */
				if (opcode == BNE) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (!cpu->z[thread])
					cpu->pc[thread] = address;
				break;
			case ROR: /* ROR Immediate. */
			case RRB: /* Rotate Right accumulator by B. */
			case 0x83: /* ROR Absolute. */
			case 0x85: /* ROR Zero Matrix. */
				if (opcode != RRB) {
					if (opcode == ROR) {
						address = cpu->pc[thread];
						cpu->pc[thread]++;
					}
					if (opcode == 0x83) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x85) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = addr[address];
				} else {
					value = cpu->b[thread];
				}
				sum = cpu->a[thread] >> value;
				sum |= (uint64_t)cpu->c[thread] << (uint64_t)64-value;
				cpu->z[thread] = (sum == 0);
				cpu->n[thread] = (sum >> 63);
				cpu->c[thread] = cpu->a[thread] & 1;
				cpu->a[thread] = sum;
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				(cpu->c[thread]) ? (cpu->ps |= (C << 8*thread)) : (cpu->ps &= ~(C << 8*thread));
				break;
			case CSP: /* Clear Stack Protection flag. */
				cpu->s[thread] = 0;
				(cpu->ps &= ~(S << 8*thread));
				break;
			case BVS: /* BVS Absolute. */
			case 0xC4: /* BVS Zero Matrix. */
				if (opcode == BVS) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (cpu->v[thread])
					cpu->pc[thread] = address;
				break;
			case MUL: /* MUL Immediate. */
			case MAB: /* Multiply Accumulator by B. */
			case 0x93: /* MUL Absolute. */
			case 0x95: /* MUL Zero Matrix. */
				if (opcode != MAB) {
					if (opcode == MUL) {
						address = cpu->pc[thread];
						cpu->pc[thread]+=regsize;
					}
					if (opcode == 0x93) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0x95) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = addr[address];
					if (regsize >= 2) {
						value += (uint64_t)addr[address+1] << 8;
					}
					if (regsize >= 4) {
						value += (uint64_t)addr[address+2] << 16;
						value += (uint64_t)addr[address+3] << 24;
					}
					if (regsize >= 8) {
						value += (uint64_t)addr[address+4] << 32;
						value += (uint64_t)addr[address+5] << 40;
						value += (uint64_t)addr[address+6] << 48;
						value += (uint64_t)addr[address+7] << 56;
					}
				} else {
					value = cpu->b[thread];
				}
				sum = cpu->a[thread]*value+cpu->c[thread];
				cpu->a[thread] = sum;
				cpu->z[thread] = (sum == 0);
				cpu->n[thread] = (sum >> 63);
				cpu->v[thread] = !((cpu->a[thread]^value) & 0x8000000000000000) && ((cpu->a[thread]^sum) & 0x8000000000000000);
				cpu->c[thread] = (!((cpu->a[thread]^sum) && (cpu->a[thread]^value)) && (cpu->a[thread] >= ((uint64_t)1 << 32) && value >= ((uint64_t)1 << 32)));
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				(cpu->v[thread]) ? (cpu->ps |= (V << 8*thread)) : (cpu->ps &= ~(V << 8*thread));
				(cpu->c[thread]) ? (cpu->ps |= (C << 8*thread)) : (cpu->ps &= ~(C << 8*thread));
				break;
			case SEV: /* SEt oVerflow flag. */
				cpu->v[thread] = 1;
				(cpu->ps |= (V << 8*thread));
				break;
			case BVC: /* BVC Absolute. */
			case 0xD4: /* BVC Zero Matrix. */
				if (opcode == BVC) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				} else {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				if (!cpu->v[thread])
					cpu->pc[thread] = address;
				break;
			case DIV: /* DIV Immediate. */
			case DAB: /* Divide Accumulator by B. */
			case 0xA3: /* DIV Absolute. */
			case 0xA5: /* DIV Zero Matrix. */
				if (opcode != DAB) {
					if (opcode == DIV) {
						address = cpu->pc[thread];
						cpu->pc[thread]+=regsize;
					}
					if (opcode == 0xA3) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					}
					if (opcode == 0xA5) {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = addr[address];
					if (regsize >= 2) {
						value += (uint64_t)addr[address+1] << 8;
					}
					if (regsize >= 4) {
						value += (uint64_t)addr[address+2] << 16;
						value += (uint64_t)addr[address+3] << 24;
					}
					if (regsize >= 8) {
						value += (uint64_t)addr[address+4] << 32;
						value += (uint64_t)addr[address+5] << 40;
						value += (uint64_t)addr[address+6] << 48;
						value += (uint64_t)addr[address+7] << 56;
					}
					cpu->b[thread] = cpu->a[thread] % value;
				} else {
					value = cpu->b[thread];
					cpu->x[thread] = cpu->a[thread] % value;
				}
				sum = cpu->a[thread]/value;
				cpu->a[thread] = sum;
				cpu->z[thread] = (sum == 0);
				cpu->n[thread] = (sum >> 63);
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				break;
			case CLV: /* CLear oVerflow flag. */
				cpu->v[thread] = 0;
				(cpu->ps &= ~(V << 8*thread));
				break;
			case RTS: /* ReTurn from Subroutine. */
				for (uint8_t i = 0; i < 32; i+=8) {
					cpu->sp[thread]++;
					if (i)
						cpu->pc[thread] += addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i;
					else
						cpu->pc[thread] = addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]];
				}
				break;
			case CPB: /* CPB Immediate. */
			case CMP: /* CMP Immediate. */
			case CAB: /* Compare Accumulator, and B. */
			case CPY: /* CPY Immediate. */
			case CPX: /* CPX Immediate. */
			case 0x2B: /* CPY Absolute. */
			case 0x2D: /* CPX Absolute. */
			case 0xB3: /* CMP Absolute. */
			case 0xE6: /* CPB Absolute. */
			case 0x3B: /* CPY Zero Matrix. */
			case 0x3D: /* CPX Zero Matrix. */
			case 0xB5: /* CMP Zero Matrix. */
			case 0xF6: /* CPB Zero Matrix. */
			case 0xE9: /* CMP Indirect. */
			case 0xEA: /* CPY Indirect. */
			case 0xEC: /* CPX Indirect. */
			case 0xDF: /* CPB Indirect. */
			case 0xEB: /* CMP Indexed Indirect. */
			case 0xFA: /* CPY Indexed Indirect. */
			case 0xEF: /* CPB Indexed Indirect. */
			case 0xED: /* CMP Indirect Indexed. */
			case 0xFC: /* CPX Indirect Indexed. */
			case 0xFF: /* CPB Indirect Indexed. */
				if (opcode != CAB) {
					if (opcode == CMP || opcode == CPY || opcode == CPX || opcode == CPB) {
						address = cpu->pc[thread];
						cpu->pc[thread]+=regsize;
					} else if (opcode == 0xB3 || opcode == 0x2B || opcode == 0x2D) {
						address =	(uint64_t)addr[cpu->pc[thread]]
								| (uint64_t)addr[cpu->pc[thread]+1] << 8
								| (uint64_t)addr[cpu->pc[thread]+2] << 16
								| (uint64_t)addr[cpu->pc[thread]+3] << 24
								| (uint64_t)addr[cpu->pc[thread]+4] << 32
								| (uint64_t)addr[cpu->pc[thread]+5] << 40
								| (uint64_t)addr[cpu->pc[thread]+6] << 48
								| (uint64_t)addr[cpu->pc[thread]+7] << 56;
						cpu->pc[thread]+=8;
						iclk++;
					} else {
						address =	addr[cpu->pc[thread]]
								| addr[cpu->pc[thread]+1] << 8
								| addr[cpu->pc[thread]+2] << 16
								| addr[cpu->pc[thread]+3] << 24;
						if (opcode == 0xDF || opcode == 0xE9 || opcode == 0xEA || opcode == 0xEB || opcode == 0xEC ||
						    opcode == 0xED || opcode == 0xEF || opcode == 0xFA || opcode == 0xFC || opcode == 0xFF) {
							address =	(uint64_t)addr[address]
									| (uint64_t)addr[address+1] << 8
									| (uint64_t)addr[address+2] << 16
									| (uint64_t)addr[address+3] << 24
									| (uint64_t)addr[address+4] << 32
									| (uint64_t)addr[address+5] << 40
									| (uint64_t)addr[address+6] << 48
									| (uint64_t)addr[address+7] << 56;
							if (opcode == 0xEB || opcode == 0xEF || opcode == 0xFA)
								address += cpu->x[thread];
							if (opcode == 0xED || opcode == 0xFC || opcode == 0xFF)
								address += cpu->y[thread];
						}
						cpu->pc[thread]+=4;
						iclk++;
					}
					value = (uint64_t)addr[address];
					if (regsize >= 2)
						value += (uint64_t)addr[address+1] << 8;
					if (regsize >= 4) {
						value += (uint64_t)addr[address+2] << 16;
						value += (uint64_t)addr[address+3] << 24;
					}
					if (regsize >= 8) {
						value += (uint64_t)addr[address+4] << 32;
						value += (uint64_t)addr[address+5] << 40;
						value += (uint64_t)addr[address+6] << 48;
						value += (uint64_t)addr[address+7] << 56;
					}
				} else {
					value = cpu->b[thread];
				}
				if (opcode == CMP || opcode == CAB || opcode == 0xE5 || opcode == 0xF5)
					sum = cpu->a[thread]-value;
				if (opcode == CPY || opcode == 0xE2 || opcode == 0xF2)
					sum = cpu->y[thread]-value;
				if (opcode == CPX || opcode == 0xE4 || opcode == 0xF4)
					sum = cpu->x[thread]-value;
				cpu->n[thread] = (sum & 0x8000000000000000) ? 1 : 0;
				cpu->z[thread] = (sum == 0) ? 1 : 0;
				cpu->c[thread] = (sum > value) ? 1 : 0;
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				(cpu->c[thread]) ? (cpu->ps |= (C << 8*thread)) : (cpu->ps &= ~(C << 8*thread));
				break;
			case ENT: /* ENd Thread. */
				value = addr[address];
				cpu->crt &= ~value;
				for (uint8_t i = 0; i < 7; i++)
					if ((value >> i) & 1)
						cpu->pc[i+1] = cpu->pc[0]+(i+1);
				break;
			case RTI: /* ReTurn from Interrupt routine. */
				cpu->sp[thread]++;
				cpu->ps = addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << 8*thread;
				for (uint8_t i = 0; i < 64; i+=8) {
					cpu->sp[thread]++;
					if (i)
						cpu->pc[thread] += addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i;
					else
						cpu->pc[thread] = addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]];
				}
				break;
			case INC: /* INC Accumulator. */
			case IAB:
			case INY:
			case INX:
				if (opcode == INC || opcode == IAB) {
					cpu->a[thread]+=1;
					if (opcode == IAB)
						cpu->b[thread]+=1;
					cpu->z[thread] = (cpu->a[thread] == 0);
					cpu->n[thread] = (cpu->a[thread] >> 63);
				}
				if (opcode == INY) {
					cpu->y[thread]+=1;
					cpu->z[thread] = (cpu->y[thread] == 0);
					cpu->n[thread] = (cpu->y[thread] >> 63);
				}
				if (opcode == INX) {
					cpu->x[thread]+=1;
					cpu->z[thread] = (cpu->x[thread] == 0);
					cpu->n[thread] = (cpu->x[thread] >> 63);
				}
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				break;
			case 0x04: /* JMP Indirect. */
			case 0x14: /* JMP Indexed Indirect. */
			case 0x24: /* JMP Indirect Indexed. */
			case 0xD0: /* JMP Zero Matrix. */
				address =	(uint32_t)addr[cpu->pc[thread]]
						|(uint32_t)addr[cpu->pc[thread]+1] << 8
						|(uint32_t)addr[cpu->pc[thread]+2] << 16
						|(uint32_t)addr[cpu->pc[thread]+3] << 24;

				if (opcode == 0x04 || opcode == 0x14 || opcode == 0x24) {
					address =	(uint64_t)addr[address]
							| (uint64_t)addr[address+1] << 8
							| (uint64_t)addr[address+2] << 16
							| (uint64_t)addr[address+3] << 24
							| (uint64_t)addr[address+4] << 32
							| (uint64_t)addr[address+5] << 40
							| (uint64_t)addr[address+6] << 48
							| (uint64_t)addr[address+7] << 56;
					if (opcode == 0x14)
						address += cpu->x[thread];
					if (opcode == 0x24)
						address += cpu->y[thread];
				}
				cpu->pc[thread]+=4;
				iclk++;
				cpu->pc[thread] = address;
				break;

			case DEC: /* DEC Accumulator. */
			case DBA:
			case DEY:
			case DEX:
				if (opcode == DEC || opcode == DBA) {
					cpu->a[thread]-=1;
					if (opcode == DBA)
						cpu->b[thread]-=1;
					cpu->z[thread] = (cpu->a[thread] == 0);
					cpu->n[thread] = (cpu->a[thread] >> 63);
				}
				if (opcode == DEY) {
					cpu->y[thread]-=1;
					cpu->z[thread] = (cpu->y[thread] == 0);
					cpu->n[thread] = (cpu->y[thread] >> 63);
				}
				if (opcode == DEX) {
					cpu->x[thread]-=1;
					cpu->z[thread] = (cpu->x[thread] == 0);
					cpu->n[thread] = (cpu->x[thread] >> 63);
				}
				(cpu->z[thread]) ? (cpu->ps |= (Z << 8*thread)) : (cpu->ps &= ~(Z << 8*thread));
				(cpu->n[thread]) ? (cpu->ps |= (N << 8*thread)) : (cpu->ps &= ~(N << 8*thread));
				break;
			case JSL: /* Jump to Subroutine Long. */
				address =	(uint64_t)addr[cpu->pc[thread]]
						| (uint64_t)addr[cpu->pc[thread]+1] << 8
						| (uint64_t)addr[cpu->pc[thread]+2] << 16
						| (uint64_t)addr[cpu->pc[thread]+3] << 24
						| (uint64_t)addr[cpu->pc[thread]+4] << 32
						| (uint64_t)addr[cpu->pc[thread]+5] << 40
						| (uint64_t)addr[cpu->pc[thread]+6] << 48
						| (uint64_t)addr[cpu->pc[thread]+7] << 56;
				cpu->pc[thread]+=8;
				for (int8_t i = 56; i >= 0; i-=8) {
					if (i)
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->pc[thread] >> i;
					else
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->pc[thread] & 0xFF;
					cpu->sp[thread]--;
				}
				cpu->pc[thread] = address;
				break;
			case 0xC3: /* INC Absolute. */
			case 0xC5: /* INC Zero Matrix. */
				if (opcode == 0xC3) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				}
				if (opcode == 0xC5) {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				addr[address]++;
				break;
			case NOP: /* No OPeration. */
				break;
			case RTL: /* ReTurn from subroutine Long. */
				for (uint8_t i = 0; i < 64; i+=8) {
					cpu->sp[thread]++;
					if (i < 56)
						cpu->pc[thread] = addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i;
					else if (i == 56)
						cpu->pc[thread] = addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] << i + 1;
					else
						cpu->pc[thread] = addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]];
				}
				break;
			case 0xD3: /* DEC Absolute. */
			case 0xD5: /* DEC Zero Matrix. */
				if (opcode == 0xD3) {
					address =	(uint64_t)addr[cpu->pc[thread]]
							| (uint64_t)addr[cpu->pc[thread]+1] << 8
							| (uint64_t)addr[cpu->pc[thread]+2] << 16
							| (uint64_t)addr[cpu->pc[thread]+3] << 24
							| (uint64_t)addr[cpu->pc[thread]+4] << 32
							| (uint64_t)addr[cpu->pc[thread]+5] << 40
							| (uint64_t)addr[cpu->pc[thread]+6] << 48
							| (uint64_t)addr[cpu->pc[thread]+7] << 56;
					cpu->pc[thread]+=8;
					iclk++;
				}
				if (opcode == 0xD5) {
					address =	addr[cpu->pc[thread]]
							| addr[cpu->pc[thread]+1] << 8
							| addr[cpu->pc[thread]+2] << 16
							| addr[cpu->pc[thread]+3] << 24;
					cpu->pc[thread]+=4;
					iclk++;
				}
				addr[address]--;
				break;
			case BRK: /* BReaK. */
				for (int8_t i = 56; i >= 0; i-=8) {
					if (i)
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->pc[thread]-1 >> i;
					else
						addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->pc[thread]-1 & 0xFF;
					cpu->sp[thread]--;
				}
				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]] = (uint64_t)cpu->ps >> 8*thread;
				cpu->sp[thread]--;
				cpu->i[thread] = 1;
				(cpu->i[thread]) ? (cpu->ps |= (I << 8*thread)) : (cpu->ps &= ~(I << 8*thread));
				cpu->pc[thread] = (uint64_t)addr[0xFFE0]
						| (uint64_t)addr[0xFFE1] << 8
						| (uint64_t)addr[0xFFE2] << 16
						| (uint64_t)addr[0xFFE3] << 24
						| (uint64_t)addr[0xFFE4] << 32
						| (uint64_t)addr[0xFFE5] << 40
						| (uint64_t)addr[0xFFE6] << 48
						| (uint64_t)addr[0xFFE7] << 56;
				break;
			case WAI: /* WAit for Interrupt. */
				wai = 1;
				pthread_mutex_lock(&main_mutex);
				pthread_cond_signal(&main_cond);
				pthread_mutex_unlock(&main_mutex);
				pthread_mutex_lock(&mutex);
				pthread_cond_wait(&cond, &mutex);
				pthread_mutex_unlock(&mutex);
				break;
			default:
				break;
		}
		ins++;
		usleep(100000);
	#if debug && !bench
		#if keypoll
		pthread_mutex_lock(&mutex);
		#endif
		mvwprintw(scr, getmaxy(scr)-lines, 0, "Operand: $%llx"
				", $%04llx: $%02x, $%04llx: $%02x"
				", $1000: $%02x, $1001: $%02x    "
				, value
				, RX_ADDR, addr[RX_ADDR], TX_ADDR, addr[TX_ADDR]
				, addr[0x1000], addr[0x1001]);
		mvwprintw(scr, (24*thread)+1, 0, "Instructions executed: %llu, Clock cycles: %llu\r", ins, iclk);
		wrefresh(scr);
		#if keypoll
		pthread_mutex_unlock(&mutex);
		#endif
	#endif
	#if bench
		if (ins >= BENCH_INST) {
			end = 1;
			pthread_mutex_lock(&mutex);
			threads_done++;
			inst[thread] = ins;
			clk[thread] = iclk;
			pthread_cond_signal(&main_cond);
			pthread_mutex_unlock(&mutex);
			gettimeofday(&en[thread], 0);
		}
	#endif
	}
	free(s);
}

int main(int argc, char **argv) {
	struct suxthr thr[THREADS];
	char *tmp = malloc(2048);
	ibcount = 0;
	addr = malloc(0x04000000);
	inss = 0;
	int v = 0;

	if (argc != 2) {
		if (asmmon("stdin") == 2)
			return 0;
	} else {
		if (asmmon(argv[1]) == 2)
			return 0;
	}
	sprintf(tmp, "\033[2J\033[H");
	fwrite(tmp, sizeof(char), strlen(tmp), stdout);
	fflush(stdout);
	if(!scr)
		scr = initscr();
	nodelay(stdscr, 0);
	crmode();
	noecho();
	nl();
	curs_set(1);
	werase(scr);
	scrollok(scr, 1);
	wrefresh(scr);
	start_color();
	use_default_colors();
	init_pair(1, COLOR_WHITE, -1);
	attron(COLOR_PAIR(1) | A_BOLD);
	wmove(scr, 0, 0);
	for (int i = 0; i < THREADS; i++) {
		thr[i].sx.sp[i] = 0xFFFF;
		thr[i].sx.stk_st[i] = i+1;
		if (i) {
			thr[i].sx.a[i] = 0;
			thr[i].sx.x[i] = 0;
			thr[i].sx.y[i] = 0;
			thr[i].sx.pc[i] = (uint64_t)addr[0xFF50+(8*(i-1))]
					| (uint64_t)addr[0xFF51+(8*(i-1))] << 8
					| (uint64_t)addr[0xFF52+(8*(i-1))] << 16
					| (uint64_t)addr[0xFF53+(8*(i-1))] << 24
					| (uint64_t)addr[0xFF54+(8*(i-1))] << 32
					| (uint64_t)addr[0xFF55+(8*(i-1))] << 40
					| (uint64_t)addr[0xFF56+(8*(i-1))] << 48
					| (uint64_t)addr[0xFF57+(8*(i-1))] << 56;
		} else {
			thr[i].sx.a[i] = 0;
			thr[i].sx.x[i] = 0;
			thr[i].sx.y[i] = 0;
			thr[i].sx.pc[i] = (uint64_t)addr[0xFFC0]
					| (uint64_t)addr[0xFFC1] << 8
					| (uint64_t)addr[0xFFC2] << 16
					| (uint64_t)addr[0xFFC3] << 24
					| (uint64_t)addr[0xFFC4] << 32
					| (uint64_t)addr[0xFFC5] << 40
					| (uint64_t)addr[0xFFC6] << 48
					| (uint64_t)addr[0xFFC7] << 56;
		}
		thr[i].th = i;
	}
	pthread_t therads[THREADS];
	int result;
	for (int i = 0; i < THREADS; i++) {
		inst[i] = 0;
	}
	for (int i = 0; i < THREADS; i++) {
		result = pthread_create(&therads[i], NULL, run, &thr[i]);
		assert(!result);
	}
	int c = 0;
	werase(scr);
	while (threads_done < THREADS) {
		int x, y, i = 0;
		#if !bench
		if ((c != EOF && c !=-1)) {
			pthread_mutex_lock(&main_mutex);
			curs_set(0);
			pthread_cond_wait(&main_cond, &main_mutex);
			pthread_mutex_unlock(&main_mutex);
			curs_set(1);
			c = 0;
			addr[CTRL_ADDR] = 0;
		}
		#if keypoll
		pthread_mutex_lock(&mutex);
		#endif
		getyx(scr, y, x);
		c = wgetch(scr);
		switch (c) {
			case ERR:
				addr[CTRL_ADDR] = 0;
				wmove(scr, getmaxy(scr)-1, 0);
				wprintw(scr, "c: %i, x: %i, y: %i, i: %i.", c, x, y, i++);
				wmove(scr, y, x);
				wrefresh(scr);
				break;
			default:
				addr[RX_ADDR] = (uint8_t)c;
				addr[CTRL_ADDR] = 1;
				#if !keypoll
				pthread_mutex_lock(&mutex);
				pthread_cond_signal(&cond);
				pthread_mutex_unlock(&mutex);
				#endif
				break;
		}
		#if keypoll
		pthread_mutex_unlock(&mutex);
		#endif
		#else
		pthread_mutex_lock(&main_mutex);
		pthread_cond_wait(&main_cond, &main_mutex);
		pthread_mutex_unlock(&main_mutex);
		#endif
	}
#if bench
	if (threads_done == THREADS) {
		#if en_nc
		scr = NULL;
		endwin();
		#endif
		double tm_sec, tm_usec, tm[THREADS], ttm;
		double clkspd;
		double mhz;
		double ips[THREADS];
		double ipst;
		for (int i = 0; i < THREADS; i++) {
			tm_sec = (en[i].tv_sec - str[i].tv_sec);
			tm_usec = (en[i].tv_usec-str[i].tv_usec);
			tm[i] = (tm_sec*1000000)+(tm_usec);
			ips[i] = inst[i]/tm[i];
			if (i) {
				inss += inst[i];
				ttm += tm[i];
				ipst += ips[i];
				tclk += clk[i];
			} else {
				inss = inst[i];
				ttm = tm[i];
				ipst = ips[i];
				tclk = clk[i];
			}
			clkspd = (tm[i]/1000000)*1000000/clk[i];
			mhz = 1000000.0/clkspd/1000000;
			sprintf(tmp, "Instructions executed for thread %i: %llu, Instructions per Second for thread %i in MIPS: %f, tm: %f\n", i, inst[i], i, ips[i], tm[i]/1000000);
			fwrite(tmp, sizeof(char), strlen(tmp), stdout);
		}
		clkspd = (ttm/1000000)*1000000/tclk;
		mhz = 1000000.0/clkspd/1000000;
		sprintf(tmp, "Total Instructions executed: %llu, Total Instructions per Second in MIPS: %f, Clock cycles: %llu, Clock Speed in MHz: %f, tm: %f\n", inss, ipst, tclk, mhz, ttm/1000000);
		fwrite(tmp, sizeof(char), strlen(tmp), stdout);
		fflush(stdout);
		free(tmp);
	}
#endif
	free(addr);
	return 0;
}