path: root/opcode.h

#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>

#define OPNAME(opcode) [opcode] = #opcode /* Get name of Opcode, for disassembly. */
#define CPS 0x00 /* Clear Processor Status. */
#define ADC 0x01 /* ADd with Carry. */
#define AAB 0x02 /* Add Accumulator with carry by B register. */
#define PHB 0x06 /* PusH B register to stack. */
#define PHP 0x08 /* PusH Processor status to stack. */
#define PHA 0x09 /* PusH Accumulator to stack. */
#define PHY 0x0A /* PusH Y register to stack. */
#define TAY 0x0B /* Transfer Accumulator to Y. */
#define PHX 0x0C /* PusH X register to stack. */
#define TAX 0x0D /* Transfer Accumulator to X. */
#define TYX 0x0E /* Transfer Y to X. */
#define JMP 0x10 /* JuMP to memory location. */
#define SBC 0x11 /* SuBtract with Carry. */
#define SAB 0x12 /* Subtract Accumulator with carry by B register. */
#define PLB 0x16 /* PuLl B register to stack. */
#define PLP 0x18 /* PuLl Processor status from stack. */
#define PLA 0x19 /* PuLl Accumulator from stack. */
#define PLY 0x1A /* PuLl Y register from stack. */
#define TYA 0x1B /* Transfer Y to Accumulator. */
#define PLX 0x1C /* PuLl X register from stack. */
#define TXA 0x1D /* Transfer X to Accumulator. */
#define TXY 0x1E /* Transfer X to Y. */
#define JSR 0x20 /* Jump to SubRoutine. */
#define AND 0x21 /* bitwise AND with accumulator. */
#define ABA 0x22 /* bitwise And with Accumulator, and B register. */
#define TAB 0x26 /* Transfer Accumulator to B.  */
#define STT 0x28 /* STart Threads. */
#define CPY 0x2A /* ComPare Y register. */
#define CPX 0x2C /* ComPare X register. */
#define TSX 0x2E /* Transfer Stack pointer to X. */
#define BPO 0x30 /* Branch if POsitive. */
#define ORA 0x31 /* bitwise OR with Accumulator. */
#define OAB 0x32 /* bitwise Or with Accumulator, and B register. */
#define TBA 0x36 /* Transfer B to Accumulator.  */
#define SEI 0x38 /* SEt Interupt flag. */
#define INY 0x3A /* INcrement Y register. */
#define INX 0x3C /* INcrement X register. */
#define TXS 0x3E /* Transfer X to Stack pointer. */
#define BNG 0x40 /* Branch if NeGative. */
#define XOR 0x41 /* bitwise XOR with accumulator. */
#define XAB 0x42 /* bitwise Xor with Accumulator, and B register. */
#define CLI 0x48 /* CLear Interupt flag. */
#define DEY 0x4A /* DEcrement Y register. */
#define DEX 0x4C /* DEcrement X register. */
#define BCS 0x50 /* Branch if Carry Set. */
#define LSL 0x51 /* Logical Shift Left. */
#define LLB 0x52 /* Logical shift Left accumulator by B. */
#define SEC 0x58 /* SEt Carry flag. */
#define STA 0x5B /* STore Accumulator. */
#define STY 0x5D /* STore Y register. */
#define STX 0x5E /* STore X register. */
#define STB 0x5F /* STore B register. */
#define BCC 0x60 /* Branch if Carry Clear. */
#define LSR 0x61 /* Logical Shift Right. */
#define LRB 0x62 /* Logical shift Right accumulator by B. */
#define LDB 0x66 /* LoaD B register. */
#define CLC 0x68 /* CLear Carry flag. */
#define LDA 0x69 /* LoaD Accumulator. */
#define LDY 0x6A /* LoaD Y register. */
#define LDX 0x6C /* LoaD X register. */
#define BEQ 0x70 /* Branch if EQual. */
#define ROL 0x71 /* ROtate Left. */
#define RLB 0x72 /* Rotate Left accumulator by B. */
#define SSP 0x78 /* Set Stack Protection flag. */
#define BNE 0x80 /* Branch if Not Equal. */
#define ROR 0x81 /* ROtate Right. */
#define RRB 0x82 /* Rotate Right accumulator by B. */
#define CSP 0x88 /* Clear Stack Protection flag. */
#define BVS 0x90 /* Branch if oVerflow Set. */
#define MUL 0x91 /* MULtiply accumulator. */
#define MAB 0x92 /* Multiply Accumulator by B. */
#define SEV 0x98 /* SEt oVerflow flag. */
#define BVC 0xA0 /* Branch if oVerflow Clear. */
#define DIV 0xA1 /* DIVide with accumulator. */
#define DAB 0xA2 /* Divide Accumulator by B. */
#define CLV 0xA8 /* CLear oVerflow flag. */
#define RTS 0xB0 /* ReTurn from Subroutine. */
#define CMP 0xB1 /* CoMPare accumulator. */
#define CAB 0xB2 /* Compare Accumulator, and B. */
#define ENT 0xB8 /* ENd Threads. */
#define RTI 0xC0 /* ReTurn from Interrupt. */
#define INC 0xC1 /* INCrement accumulator. */
#define IAB 0xC2 /* Increment Accumulator, and B register. */
#define DEC 0xD1 /* DECrement accumulator. */
#define DBA 0xD2 /* Decrement Accumulator, and B register. */
#define CPB 0xD6 /* ComPare B register. */
#define WAI 0xD8 /* WAit for Interrupt. */
#define JSL 0xE0 /* Jump to Subroutine Long. */
#define ASR 0xE1 /* Arithmetic Shift Right. */
#define ARB 0xE2 /* Arithmetic shift Right accumulator by B. */
#define NOP 0xE8 /* No OPeration. */
#define RTL 0xF0 /* ReTurn from subroutine Long. */
#define BRK 0xF8 /* BReaK. */

#define C ((uint64_t)1 << 0)
#define Z ((uint64_t)1 << 1)
#define I ((uint64_t)1 << 2)
#define S ((uint64_t)1 << 3)
#define V ((uint64_t)1 << 6)
#define N ((uint64_t)1 << 7)

struct sux;

uint8_t *addr; /* Address Space. */
uint8_t ibcount; /* Number of bytes taken up by instruction. */

struct sux {
	uint64_t ps; /* The processor status register. */
	uint64_t a[8], b[8], y[8], x[8]; /* Registers A, B, X, and Y. */
	uint64_t pc[8]; /* Program counter. */
	uint16_t sp[8]; /* Stack pointer. */
	uint16_t stk_st[8]; /* Starting address of each threads stack. */
	uint8_t crt; /* Current running threads. */
	uint8_t c[8], z[8], i[8], s[8], v[8], n[8]; /* Processor Status Flags. */

};

typedef struct {
	char mnemonic[4];
	uint8_t imm;
	uint8_t abs;
	uint8_t zm;
	uint8_t zmy;
	uint8_t zmx;
	uint8_t ind;
	uint8_t inx;
	uint8_t iny;
	uint8_t impl;
} opent;

static const char *opname[0x100] = {
	[0x00] = "CPS",
	[0x01] = "ADC #",
	[0x02] = "AAB",
	[0x03] = "ADC a",
	[0x04] = "JMP (ind)",
	[0x05] = "ADC zm",
	[0x06] = "PHB",
	[0x08] = "PHP",
	[0x09] = "PHA",
	[0x0A] = "PHY",
	[0x0B] = "TAY",
	[0x0C] = "PHX",
	[0x0D] = "TAX",
	[0x0E] = "TYX",
	[0x10] = "JMP a",
	[0x11] = "SBC #",
	[0x12] = "SAB",
	[0x13] = "SBC a",
	[0x14] = "JMP (ind, x)",
	[0x15] = "SBC zm",
	[0x16] = "PLB",
	[0x18] = "PLP",
	[0x19] = "PLA",
	[0x1A] = "PLY",
	[0x1B] = "TYA",
	[0x1C] = "PLX",
	[0x1D] = "TXA",
	[0x1E] = "TXY",
	[0x20] = "JSR",
	[0x21] = "AND #",
	[0x22] = "ABA",
	[0x23] = "AND a",
	[0x24] = "JMP (ind), y",
	[0x25] = "AND zm",
	[0x26] = "TAB",
	[0x28] = "STT",
	[0x2A] = "CPY #",
	[0x2B] = "CPY a",
	[0x2C] = "CPX #",
	[0x2D] = "CPX a",
	[0x2E] = "TSX",
	[0x30] = "BPO a",
	[0x31] = "ORA #",
	[0x32] = "OAB",
	[0x33] = "ORA a",
	[0x34] = "JSR (ind)",
	[0x35] = "ORA zm",
	[0x36] = "TBA",
	[0x38] = "SEI",
	[0x3A] = "INY",
	[0x3B] = "CPY zm",
	[0x3C] = "INX",
	[0x3D] = "CPX zm",
	[0x3E] = "TXS",
	[0x40] = "BNG a",
	[0x41] = "XOR #",
	[0x42] = "XAB",
	[0x43] = "XOR a",
	[0x44] = "JSR (ind, x)",
	[0x45] = "XOR zm",
	[0x48] = "CLI",
	[0x4A] = "DEY",
	[0x4C] = "DEX",
	[0x50] = "BCS a",
	[0x51] = "LSL #",
	[0x52] = "LLB",
	[0x53] = "LSL a",
	[0x54] = "JSR (ind), y",
	[0x55] = "LSL zm",
	[0x56] = "LDB a",
	[0x58] = "SEC",
	[0x59] = "LDA a",
	[0x5A] = "LDY a",
	[0x5B] = "STA a",
	[0x5C] = "LDX a",
	[0x5D] = "STY a",
	[0x5E] = "STX a",
	[0x5F] = "STB a",
	[0x60] = "BCC a",
	[0x61] = "LSR #",
	[0x62] = "LRB",
	[0x63] = "LSR a",
	[0x64] = "BPO zm",
	[0x65] = "LSR zm",
	[0x66] = "LDB #",
	[0x68] = "CLC",
	[0x69] = "LDA #",
	[0x6A] = "LDY #",
	[0x6C] = "LDX #",
	[0x70] = "BEQ a",
	[0x71] = "ROL #",
	[0x72] = "RLB",
	[0x73] = "ROL a",
	[0x74] = "BNG zm",
	[0x75] = "ROL zm",
	[0x76] = "LDB zm",
	[0x78] = "SSP",
	[0x79] = "LDA zm",
	[0x7A] = "LDY zm",
	[0x7B] = "STA zm",
	[0x7C] = "LDX zm",
	[0x7D] = "STY zm",
	[0x7E] = "STX zm",
	[0x7F] = "STB zm",
	[0x80] = "BNE a",
	[0x81] = "ROR #",
	[0x82] = "RRB",
	[0x83] = "ROR a",
	[0x84] = "BCS zm",
	[0x85] = "ROR zm",
	[0x86] = "LDB zm, x",
	[0x88] = "CSP",
	[0x89] = "LDA zm, x",
	[0x8A] = "LDY zm, x",
	[0x8B] = "STA zm, x",
	[0x8D] = "STY zm, x",
	[0x8F] = "STB zm, x",
	[0x90] = "BVS a",
	[0x91] = "MUL #",
	[0x92] = "MAB",
	[0x93] = "MUL a",
	[0x94] = "BCC zm",
	[0x95] = "MUL zm",
	[0x96] = "LDB zm, y",
	[0x98] = "SEV",
	[0x99] = "LDA zm, y",
	[0x9B] = "STA zm, y",
	[0x9C] = "LDX zm, y",
	[0x9E] = "STX zm, y",
	[0x9F] = "STB zm, y",
	[0xA0] = "BVC a",
	[0xA1] = "DIV #",
	[0xA2] = "DAB",
	[0xA3] = "DIV a",
	[0xA4] = "BEQ zm",
	[0xA5] = "DIV zm",
	[0xA6] = "LDB (ind)",
	[0xA8] = "CLV",
	[0xA9] = "LDA (ind)",
	[0xAA] = "LDY (ind)",
	[0xAB] = "STA (ind)",
	[0xAC] = "LDX (ind)",
	[0xAD] = "STY (ind)",
	[0xAE] = "STX (ind)",
	[0xAF] = "STB (ind)",
	[0xB0] = "RTS",
	[0xB1] = "CMP #",
	[0xB2] = "CAB",
	[0xB3] = "CMP a",
	[0xB4] = "BNE zm",
	[0xB5] = "CMP zm",
	[0xB6] = "LDB (ind, x)",
	[0xB8] = "ENT",
	[0xB9] = "LDA (ind, x)",
	[0xBA] = "LDY (ind, x)",
	[0xBB] = "STA (ind, x)",
	[0xBD] = "STY (ind, x)",
	[0xBF] = "STB (ind, x)",
	[0xC0] = "RTI",
	[0xC1] = "INC A",
	[0xC2] = "IAB",
	[0xC3] = "INC a",
	[0xC4] = "BVS zm",
	[0xC5] = "INC zm",
	[0xC6] = "LDB (ind), y",
	[0xC9] = "LDA (ind), y",
	[0xCB] = "STA (ind), y",
	[0xCC] = "LDX (ind), y",
	[0xCE] = "STX (ind), y",
	[0xCF] = "STB (ind), y",
	[0xD0] = "JMP zm",
	[0xD1] = "DEC A",
	[0xD2] = "DBA",
	[0xD3] = "DEC a",
	[0xD4] = "BVC zm",
	[0xD5] = "DEC zm",
	[0xD6] = "CPB #",
	[0xD8] = "WAI",
	[0xDF] = "CPB (ind)",
	[0xE0] = "JSL",
	[0xE1] = "ASR #",
	[0xE2] = "ARB",
	[0xE3] = "ASR a",
	[0xE5] = "ASR zm",
	[0xE6] = "CPB a",
	[0xE8] = "NOP",
	[0xE9] = "CMP (ind)",
	[0xEA] = "CPY (ind)",
	[0xEB] = "CMP (ind, x)",
	[0xEC] = "CPX (ind)",
	[0xED] = "CMP (ind), y",
	[0xEF] = "CPB (ind, x)",
	[0xF0] = "RTL",
	[0xF6] = "CPB zm",
	[0xF8] = "BRK",
	[0xFA] = "CPY (ind, x)",
	[0xFC] = "CPX (ind), y",
	[0xFF] = "CPB (ind), y"
};

extern int asmmon();
extern void adc(struct sux *cpu, uint64_t adr, uint8_t thread, uint8_t regsize);
extern void sbc(struct sux *cpu, uint64_t adr, uint8_t thread, uint8_t regsize);
extern void mul(struct sux *cpu, uint64_t adr, uint8_t thread, uint8_t regsize);
extern void divd(struct sux *cpu, uint64_t adr, uint8_t thread, uint8_t regsize);
extern uint64_t and(struct sux *cpu, uint64_t value, uint8_t thread);
extern void and_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread, uint8_t regsize);
extern uint64_t or(struct sux *cpu, uint64_t value, uint8_t thread);
extern void or_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread, uint8_t regsize);
extern uint64_t xor(struct sux *cpu, uint64_t value, uint8_t thread);
extern void xor_addr(struct sux *cpu, uint64_t* const reg, uint64_t adr, uint8_t thread, uint8_t regsize);
extern void rol(struct sux *cpu, uint64_t adr, uint8_t thread);
extern void ror(struct sux *cpu, uint64_t adr, uint8_t thread);
extern void lsl(struct sux *cpu, uint64_t adr, uint8_t thread);
extern void lsr(struct sux *cpu, uint64_t adr, uint8_t thread);
extern void inc(struct sux *cpu, uint64_t *reg, uint8_t thread);
extern void inc_addr(struct sux *cpu, uint64_t adr, uint8_t thread);
extern void dec(struct sux *cpu, uint64_t *reg, uint8_t thread);
extern void dec_addr(struct sux *cpu, uint64_t adr, uint8_t thread);
extern void stt(struct sux *cpu, uint8_t value);
extern void ent(struct sux *cpu, uint8_t value);
extern void ld(struct sux *cpu, uint64_t *reg, uint64_t adr, uint8_t thread, uint8_t regsize);
extern void st(struct sux *cpu, uint64_t *reg, uint64_t adr, uint8_t thread, uint8_t regsize);
extern void push(struct sux *cpu, uint8_t value);
extern uint8_t pull(struct sux *cpu);
extern void cmp_addr(struct sux *cpu, uint64_t reg, uint64_t adr, uint8_t thread, uint8_t regsize);
extern void cmp(struct sux *cpu, uint64_t reg1, uint64_t reg2, uint8_t thread);
extern void bfs(struct sux *cpu, uint8_t flag, uint64_t adr, uint8_t thread);
extern void bfc(struct sux *cpu, uint8_t flag, uint64_t adr, uint8_t thread);
extern void setps(struct sux *cpu, uint8_t thread);
extern uint64_t immaddr(struct sux *cpu, uint8_t thread, uint8_t size);
extern uint64_t absaddr(struct sux *cpu, uint8_t thread);
extern uint32_t zeromtx(struct sux *cpu, uint8_t thread);
extern uint32_t zeromx(struct sux *cpu, uint8_t thread);
extern uint32_t zeromy(struct sux *cpu, uint8_t thread);