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authormrb0nk500 <b0nk@b0nk.xyz>2020-05-18 13:14:08 -0400
committermrb0nk500 <b0nk@b0nk.xyz>2020-05-18 13:14:08 -0400
commit5dd788d5a1acc7f23835882420d50e9f020728ac (patch)
tree2b9226863fc44e5bce88eb85be1f0ee97ede1922 /enums.h
parent545bb8591e8003912b6c6b494acefd74e6b3abfd (diff)
Did alot of stuff while I was up at the family trailer.
- Moved the large enums, and large tables into separate header files. - Added enums for implementing the base extension - Fixed a bug in the assembler. - Worked more on SuBAsm.
Diffstat (limited to 'enums.h')
-rw-r--r--enums.h333
1 files changed, 333 insertions, 0 deletions
diff --git a/enums.h b/enums.h
new file mode 100644
index 0000000..f5d30a8
--- /dev/null
+++ b/enums.h
@@ -0,0 +1,333 @@
+
+enum base_isa {
+ CPS = 0x00, /* Clear Processor Status. */
+ ADC = 0x01, /* ADd with Carry. */
+ AAB = 0x02, /* Add Accumulator with carry by B register. */
+ ADC_AB = 0x04, /* ADC Absolute. */
+ LDA_IN = 0x05, /* LDA Indirect. */
+ ADC_Z = 0x06, /* ADC Zero Matrix. */
+ PHP = 0x08, /* PusH Processor status to stack. */
+ CPB = 0x09, /* ComPare B register. */
+ PHB = 0x0A, /* PusH B register to stack. */
+ DEC_AB = 0x0C, /* DEC Absolute. */
+ DEC_Z = 0x0D, /* DEC Zero Matrix. */
+ JMP_Z = 0x0E, /* JuMP to memory location. */
+ JMP = 0x10, /* JMP Absolute. */
+ SBC = 0x11, /* SuBtract with Carry. */
+ SAB = 0x12, /* Subtract Accumulator with carry by B register. */
+ SBC_AB = 0x14, /* SBC Absolute. */
+ STA_IN = 0x15, /* STA Indirect. */
+ SBC_Z = 0x16, /* SBC Zero Matrix. */
+ ENT = 0x18, /* ENd Threads. */
+ CPY = 0x19, /* ComPare Y register. */
+ PLB = 0x1A, /* PuLl B register to stack. */
+ INC_AB = 0x1C, /* INC Absolute. */
+ INC_Z = 0x1D, /* INC Zero Matrix. */
+ JSR = 0x1E, /* Jump to SubRoutine. */
+ JSL = 0x20, /* Jump to Subroutine Long. */
+ AND = 0x21, /* bitwise AND with accumulator. */
+ ABA = 0x22, /* bitwise And with Accumulator, and B register. */
+ AND_AB = 0x24, /* AND Absolute. */
+ CMP_IN = 0x25, /* CMP Indirect. */
+ AND_Z = 0x26, /* AND Zero Matrix. */
+ PLP = 0x28, /* PuLl Processor status from stack. */
+ CPX = 0x29, /* ComPare X register. */
+ PHY = 0x2A, /* PusH Y register to stack. */
+ CPB_AB = 0x2C, /* CPB Absolute. */
+ CPB_Z = 0x2D, /* CPB Zero Matrix. */
+ BPO_Z = 0x2E, /* Branch if POsitive. */
+ BPO = 0x30, /* BPO Absolute. */
+ ORA = 0x31, /* bitwise OR with Accumulator. */
+ OAB = 0x32, /* bitwise Or with Accumulator, and B register. */
+ ORA_AB = 0x34, /* ORA Absolute. */
+ LDB_IN = 0x35, /* LDB Indirect. */
+ ORA_Z = 0x36, /* ORA Zero Matrix. */
+ STT = 0x38, /* STart Threads. */
+ LDA_ZY = 0x39, /* LDA Zero Matrix, indexed with Y. */
+ PLY = 0x3A, /* PuLl Y register from stack. */
+ CPX_AB = 0x3C, /* CPX Absolute. */
+ CPY_Z = 0x3D, /* CPY Zero Matrix. */
+ BNG_Z = 0x3E, /* Branch if NeGative. */
+ BNG = 0x40, /* BNG Absolute. */
+ XOR = 0x41, /* bitwise XOR with accumulator. */
+ XAB = 0x42, /* bitwise Xor with Accumulator, and B register. */
+ XOR_AB = 0x44, /* XOR Absolute. */
+ STB_IN = 0x45, /* STB Indirect. */
+ XOR_Z = 0x46, /* XOR Zero Matrix. */
+ PHA = 0x48, /* PusH Accumulator to stack. */
+ STA_ZY = 0x49, /* STA Zero Matrix, indexed with Y. */
+ PHX = 0x4A, /* PusH X register to stack. */
+ CPY_AB = 0x4C, /* CPY Absolute. */
+ CPX_Z = 0x4D, /* CPX Zero Matrix. */
+ BCS_Z = 0x4E, /* Branch if Carry Set. */
+ BCS = 0x50, /* BCS Absolute. */
+ LSL = 0x51, /* Logical Shift Left. */
+ LLB = 0x52, /* Logical shift Left accumulator by B. */
+ LSL_AB = 0x54, /* LSL Absolute. */
+ CPB_IN = 0x55, /* CPB Indirect. */
+ LSL_Z = 0x56, /* LSL Zero Matrix. */
+ CLC = 0x58, /* CLear Carry flag. */
+ LDB_ZY = 0x59, /* LDB Zero Matrix, indexed with Y. */
+ PLX = 0x5A, /* PuLl X register from stack. */
+ LDA_IY = 0x5C, /* LDA Indirect Indexed. */
+ LDA_IX = 0x5D, /* LDA Indexed Indirect. */
+ BCC_Z = 0x5E, /* Branch if Carry Clear. */
+ BCC = 0x60, /* BCC Absolute. */
+ LSR = 0x61, /* Logical Shift Right. */
+ LRB = 0x62, /* Logical shift Right accumulator by B. */
+ LSR_AB = 0x64, /* LSR Absolute. */
+ LDY_IN = 0x65, /* LDY Indirect. */
+ LSR_Z = 0x66, /* LSR Zero Matrix. */
+ PLA = 0x68, /* PuLl Accumulator from stack. */
+ STB_ZY = 0x69, /* STB Zero Matrix, indexed with Y. */
+ TAB = 0x6A, /* Transfer Accumulator to B. */
+ STA_IY = 0x6C, /* STA Indirect Indexed. */
+ STA_IX = 0x6D, /* STA Indexed Indirect. */
+ BEQ_Z = 0x6E, /* Branch if EQual. */
+ BEQ = 0x70, /* BEQ Absolute. */
+ ROL = 0x71, /* ROtate Left. */
+ RLB = 0x72, /* Rotate Left accumulator by B. */
+ ROL_AB = 0x74, /* ROL Absolute. */
+ STY_IN = 0x75, /* STY Indirect. */
+ ROL_Z = 0x76, /* ROL Zero Matrix. */
+ SEC = 0x78, /* SEt Carry flag. */
+ LDA_ZX = 0x79, /* LDA Zero Matrix, indexed with X. */
+ TBA = 0x7A, /* Transfer B to Accumulator. */
+ CMP_IY = 0x7C, /* CMP Indirect Indexed. */
+ CMP_IX = 0x7D, /* CMP Indexed Indirect. */
+ BNE_Z = 0x7E, /* Branch if Not Equal. */
+ BNE = 0x80, /* BNE Absolute. */
+ ROR = 0x81, /* ROtate Right. */
+ RRB = 0x82, /* Rotate Right accumulator by B. */
+ ROR_AB = 0x84, /* ROR Absolute. */
+ CPY_IN = 0x85, /* CPY Indirect. */
+ ROR_Z = 0x86, /* ROR Zero Matrix. */
+ DEY = 0x88, /* DEcrement Y register. */
+ STA_ZX = 0x89, /* STA Zero Matrix, indexed with X. */
+ TAY = 0x8A, /* Transfer Accumulator to Y. */
+ LDB_IY = 0x8C, /* LDB Indirect Indexed. */
+ LDB_IX = 0x8D, /* LDB Indexed Indirect. */
+ BVS_Z = 0x8E, /* Branch if oVerflow Set. */
+ BVS = 0x90, /* BVS Absolute. */
+ MUL = 0x91, /* MULtiply accumulator. */
+ MAB = 0x92, /* Multiply Accumulator by B. */
+ MUL_AB = 0x94, /* MUL Absolute. */
+ LDX_IN = 0x95, /* LDX Indirect. */
+ MUL_Z = 0x96, /* MUL Zero Matrix. */
+ CLI = 0x98, /* CLear Interupt flag. */
+ LDB_ZX = 0x99, /* LDB Zero Matrix, indexed with X. */
+ TYA = 0x9A, /* Transfer Y to Accumulator. */
+ STB_IY = 0x9C, /* STB Indirect Indexed. */
+ STB_IX = 0x9D, /* STB Indexed Indirect. */
+ BVC_Z = 0x9E, /* Branch if oVerflow Clear. */
+ BVC = 0xA0, /* BVC Absolute. */
+ DIV = 0xA1, /* DIVide with accumulator. */
+ DAB = 0xA2, /* Divide Accumulator by B. */
+ DIV_AB = 0xA4, /* DIV Absolute. */
+ STX_IN = 0xA5, /* STX Indirect. */
+ DIV_Z = 0xA6, /* DIV Zero Matrix. */
+ INY = 0xA8, /* INcrement Y register. */
+ STB_ZX = 0xA9, /* STB Zero Matrix, indexed with X. */
+ TAX = 0xAA, /* Transfer Accumulator to X. */
+ CPB_IY = 0xAC, /* CPB Indirect Indexed. */
+ CPB_IX = 0xAD, /* CPB Indexed Indirect. */
+ RTS = 0xAE, /* ReTurn from Subroutine. */
+ RTL = 0xB0, /* ReTurn from subroutine Long. */
+ CMP = 0xB1, /* CoMPare accumulator. */
+ CAB = 0xB2, /* Compare Accumulator, and B. */
+ CMP_AB = 0xB4, /* CMP Absolute. */
+ CPX_IN = 0xB5, /* CPX Indirect. */
+ CMP_Z = 0xB6, /* CMP Zero Matrix. */
+ SEI = 0xB8, /* SEt Interupt flag. */
+ LDX = 0xB9, /* LoaD X register. */
+ TXA = 0xBA, /* Transfer X to Accumulator. */
+ LDX_AB = 0xBC, /* LDX Absolute. */
+ LDX_Z = 0xBD, /* LDX Zero Matrix. */
+ JSR_IN = 0xBE, /* JSR Indirect. */
+ RTI = 0xC0, /* ReTurn from Interrupt. */
+ LDA = 0xC1, /* LoaD Accumulator. */
+ LDA_AB = 0xC4, /* LDA Absolute. */
+ DEX = 0xC5, /* DEcrement X register. */
+ LDA_Z = 0xC6, /* LDA Zero Matrix. */
+ CLV = 0xC8, /* CLear oVerflow flag. */
+ LDX_ZY = 0xC9, /* LDX Zero Matrix, indexed with Y. */
+ TYX = 0xCA, /* Transfer Y to X. */
+ STA = 0xCC, /* STA Absolute. */
+ STA_Z = 0xCD, /* STore Accumulator. */
+ JMP_IN = 0xCE, /* JMP Indirect. */
+ TSX = 0xD0, /* Transfer Stack pointer to X. */
+ LDB = 0xD1, /* LoaD B register. */
+ LDB_AB = 0xD4, /* LDB Absolute. */
+ INX = 0xD5, /* INcrement X register. */
+ LDB_Z = 0xD6, /* LDB Zero Matrix. */
+ WAI = 0xD8, /* WAit for Interrupt. */
+ STX_ZY = 0xD9, /* STX Zero Matrix, indexed with Y. */
+ TXY = 0xDA, /* Transfer X to Y. */
+ STB = 0xDC, /* STB Absolute. */
+ STB_Z = 0xDD, /* STore B register. */
+ TXS = 0xE0, /* Transfer X to Stack pointer. */
+ LDY = 0xE1, /* LoaD Y register. */
+ LDY_AB = 0xE4, /* LDY Absolute. */
+ DEC = 0xE5, /* DECrement accumulator. */
+ LDY_Z = 0xE6, /* LDY Zero Matrix. */
+ BRK = 0xE8, /* BReaK. */
+ LDY_ZX = 0xE9, /* LDY Zero Matrix, indexed with X. */
+ NOP = 0xEA, /* No OPeration. */
+ STY = 0xEC, /* STY Absolute. */
+ STY_Z = 0xED, /* STore Y register. */
+ DEB = 0xEE, /* Decrement B register. */
+ ASR = 0xF1, /* Arithmetic Shift Right. */
+ ARB = 0xF2, /* Arithmetic shift Right accumulator by B. */
+ ASR_AB = 0xF4, /* ASR Absolute. */
+ INC = 0xF5, /* INCrement accumulator. */
+ ASR_Z = 0xF6, /* ASR Zero Matrix. */
+ STY_ZX = 0xF9, /* STY Zero Matrix, indexed with X. */
+ STX = 0xFC, /* STX Absolute. */
+ STX_Z = 0xFD, /* STore X register. */
+ INB = 0xFE /* Increment B register. */
+};
+
+enum base_ext {
+ ADC_E = 0x01, /* ADC E Indirect. */
+ LEA_ZX = 0x02, /* LEA Zero Matrix, indexed with X. */
+ LEA_SX = 0x03, /* LEA Stack Pointer, offset with X. */
+ ADD = 0x04, /* ADD without carry. */
+ LLM = 0x05, /* Logical shift Left, on Memory. */
+ PHE = 0x08, /* PusH Effective address register to stack. */
+ CPB_E = 0x09, /* CPB E Indirect. */
+ DEC_E = 0x0C, /* DEC E Indirect. */
+ JMP_E = 0x10, /* JMP E Indirect. */
+ SBC_E = 0x11, /* SBC E Indirect. */
+ LEA_ZY = 0x12, /* LEA Zero Matrix, indexed with Y. */
+ LEA_SY = 0x13, /* LEA Stack Pointer, offset with Y. */
+ ADD_E = 0x14, /* ADD E Indirect. */
+ LLM_Z = 0x15, /* LLM Zero Matrix. */
+ CPY_E = 0x19, /* CPY E Indirect. */
+ INC_E = 0x1C, /* INC E Indirect. */
+ JSR_E = 0x20, /* JSR E Indirect. */
+ AND_E = 0x21, /* AND E Indirect. */
+ PEA_ZX = 0x22, /* PEA Zero Matrix, indexed with X. */
+ PEA_SX = 0x23, /* PEA Stack Pointer, offset with X. */
+ SUB = 0x24, /* SUBtract without carry. */
+ LLM_E = 0x25, /* LLM E Indirect. */
+ PLE = 0x28, /* PuLl Effective address register from stack. */
+ CPX_E = 0x29, /* CPX E Indirect. */
+ DEE = 0x2C, /* DEcrement Effective address register. */
+ BPO_E = 0x30, /* BPO E Indirect. */
+ ORA_E = 0x31, /* ORA E Indirect. */
+ PEA_ZY = 0x32, /* PEA Zero Matrix, indexed with Y. */
+ PEA_SY = 0x33, /* PEA Stack Pointer, offset with Y. */
+ SUB_E = 0x34, /* SUB E Indirect. */
+ LRM = 0x35, /* Logical shift Right, on Memory. */
+ CPE = 0x39, /* ComPare Effective address register. */
+ INE = 0x3C, /* INcrement Effective address register. */
+ BNG_E = 0x40, /* BNG E Indirect. */
+ XOR_E = 0x41, /* XOR E Indirect. */
+ LEA_AX = 0x42, /* LEA Absolute, indexed with X. */
+ LEA_SI = 0x43, /* LEA Stack Pointer, Immediate offset. */
+ ADE = 0x44, /* ADd Effective address register. */
+ LRM_Z = 0x45, /* LRM Zero Matrix. */
+ CPE_AB = 0x49, /* CPE Absolute. */
+ DES = 0x4C, /* DEcrement Stack pointer. */
+ BCS_E = 0x50, /* BCS E Indirect. */
+ LSL_E = 0x51, /* LSL E Indirect. */
+ LEA_AY = 0x52, /* LEA Absolute, indexed with Y. */
+ LEA_RE = 0x53, /* LEA Relative. */
+ ADE_A = 0x54, /* ADE with Accumulator. */
+ LRM_E = 0x55, /* LRM E Indirect. */
+ CPE_Z = 0x59, /* CPE Zero Matrix. */
+ INS = 0x5C, /* INcrement Stack pointer. */
+ BCC_E = 0x60, /* BCC E Indirect. */
+ LSR_E = 0x61, /* LSR E Indirect. */
+ PEA_AX = 0x62, /* PEA Absolute, indexed with X. */
+ PEA_SI = 0x63, /* PEA Stack Pointer, Immediate offset. */
+ SBE = 0x64, /* SuBtract Effective address register. */
+ RLM = 0x65, /* Rotate Left, on Memory. */
+ ICE = 0x69, /* Interlocked Compare, and Exchange. */
+ BEQ_E = 0x70, /* BEQ E Indirect. */
+ ROL_E = 0x71, /* ROL E Indirect. */
+ PEA_AY = 0x72, /* PEA Absolute, indexed with Y. */
+ PEA_RE = 0x73, /* PEA Relative. */
+ RLM_Z = 0x75, /* RLM Zero Matrix. */
+ ICE_Z = 0x79, /* ICE Zero Matrix. */
+ STE = 0x7C, /* STore Effective address register. */
+ BNE_E = 0x80, /* BNE E Indirect. */
+ ROR_E = 0x81, /* ROR E Indirect. */
+ LEA_IX = 0x82, /* LEA Indexed Indirect. */
+ LEA_IN = 0x83, /* LEA Indirect. */
+ ADS = 0x84, /* ADd Stack pointer. */
+ RLM_E = 0x85, /* RLM E Indirect. */
+ ICE_E = 0x89, /* ICE E Indirect. */
+ STE_Z = 0x8C, /* STE Zero Matrix. */
+ BVS_E = 0x90, /* BVS E Indirect. */
+ MUL_E = 0x91, /* MUL E Indirect. */
+ LEA_IY = 0x92, /* LEA Indirect Indexed. */
+ LEA_AI = 0x93, /* LEA Absolute Indirect. */
+ ADS_A = 0x94, /* ADS with Accumulator. */
+ RRM = 0x95, /* Rotate Right, on Memory. */
+ STZ = 0x9C, /* STore Zero. */
+ BVC_E = 0xA0, /* BVC E Indirect. */
+ DIV_E = 0xA1, /* DIV E Indirect. */
+ PEA_IX = 0xA2, /* PEA Indexed Indirect. */
+ PEA_IN = 0xA3, /* PEA Indirect. */
+ SBS = 0xA4, /* SuBtract Stack pointer. */
+ RRM_ZM = 0xA5, /* RRM Zero Matrix. */
+ STZ_ZM = 0xAC, /* STZ Zero Matrix. */
+ CMP_E = 0xB1, /* CMP E Indirect. */
+ PEA_IY = 0xB2, /* PEA Indirect Indexed. */
+ PEA_AI = 0xB3, /* PEA Absolute Indirect. */
+ SBS_A = 0xB4, /* SBS with Accumulator. */
+ RRM_E = 0xB5, /* RRM E Indirect. */
+ LDX_E = 0xB9, /* LDX E Indirect. */
+ STZ_E = 0xBC, /* STZ E Indirect. */
+ LDA_E = 0xC1, /* LDA E Indirect. */
+ LEA_AIX = 0xC2, /* LEA Absolute Indexed Indirect. */
+ LEA_Z = 0xC3, /* LEA Zero Matrix. */
+ NOT = 0xC4, /* bitwise NOT with accumulator. */
+ ARM = 0xC5, /* Arithmetic shift Right, on Memory. */
+ LDE = 0xC9, /* LoaD Effective address register. */
+ STA_E = 0xCC, /* STA E Indirect. */
+ LDB_E = 0xD1, /* LDB E Indirect. */
+ LEA_AIY = 0xD2, /* LEA Absolute Indirect Indexed. */
+ LEA = 0xD3, /* Load Effective Address. */
+ NOT_AB = 0xD4, /* NOT Absolute. */
+ ARM_Z = 0xD5, /* ARM Zero Matrix. */
+ LDE_AB = 0xD9, /* LDE Absolute. */
+ STB_E = 0xDC, /* STB E Indirect. */
+ LDY_E = 0xE1, /* LDY E Indirect. */
+ PEA_AIX = 0xE2, /* PEA Absolute Indexed Indirect. */
+ PEA_Z = 0xE3, /* PEA Zero Matrix. */
+ NOT_Z = 0xE4, /* NOT Zero Matrix. */
+ ARM_E = 0xE5, /* ARM E Indirect. */
+ LDE_Z = 0xE9, /* LDE Zero Matrix. */
+ STY_E = 0xEC, /* STY E Indirect. */
+ ASR_E = 0xF1, /* ASR E Indirect. */
+ PEA_AIY = 0xF2, /* PEA Absolute Indirect Indexed. */
+ PEA = 0xF3, /* Push Effective Address. */
+ NOT_E = 0xF4, /* NOT E Indirect. */
+ STX_E = 0xFC, /* STX E Indirect. */
+};
+
+enum am {
+ /* Part of Base ISA. */
+ IMM, /* Immediate Data. */
+ ZM, /* Zero Matrix. */
+ ZMX, /* Zero Matrix, indexed with X. */
+ ZMY, /* Zero Matrix, indexed with Y. */
+ IND, /* Indirect. */
+ INDX, /* Indexed Indirect. */
+ INDY, /* Indirect Indexed. */
+ ABS, /* Absolute. */
+ IMPL, /* Implied. */
+ /* Part of Base Extension. */
+ ABSX, /* Absolute, Indexed with X. */
+ ABSY, /* Absolute, Indexed with Y. */
+ SPI, /* Stack Pointer, Immediate Offset. */
+ SPX, /* Stack Pointer, Offset with X. */
+ SPY, /* Stack Pointer, Offset with Y. */
+ REL, /* Relative to Program Counter. */
+ INA, /* Absolute Indirect. */
+ INAX, /* Absolute Indexed Indirect. */
+ INAY, /* Absolute Indirect Indexed. */
+ EIND, /* Effective Address Register, Indirect. */
+};