- Refactored the opcode table, in order to make the

  instruction formatting simpler.

- Refactored the instruction table of the emulator's
  assembler, it now has two parts, the addressing mode
  bits, and the base value.

  The base value is what's used to generate the actual
  opcode, with the addressing mode bits telling the
  assembler what addressing modes this instruction
  supports.

  The reason for doing this was to use less space. For
  comparison, the previous version used 870 bytes for
  the instruction table, while the new version uses
  only 222 bytes. The new version is nearly 4 times
  smaller than the pervious version.

- The B register based ALU instructions now use their
  own addressing mode, and are specified by using 'b'
  as the operand for those instructions.
  For example, to add the Accumulator with the B
  register, you now use "ADC B" instead of "AAB".

1 files changed, 238 insertions, 250 deletions

diff --git a/enums.h b/enums.h
index 83cc7f0..2670397 100644
--- a/enums.h
+++ b/enums.h
@@ -9,6 +9,7 @@ enum am {
 	INDY, /* Indirect Indexed. */
 	ABS,  /* Absolute. */
 	REL,  /* Relative to Program Counter. */
+	BREG, /* B Register. */
 	IMPL, /* Implied. */
 	/* Part of Base Extension. */
 	ABSX, /* Absolute, Indexed with X. */
@@ -23,265 +24,252 @@ enum am {
 };
 
 enum mne {
-	AAB =  0,
-	ABA =  1,
-	ADC =  2,
-	AND =  3,
-	ARB =  4,
-	ASR =  5,
-	BCC =  6,
-	BCS =  7,
-	BEQ =  8,
-	BNE =  9,
-	BNG = 10,
-	BPO = 11,
-	BRA = 12,
-	BRK = 13,
-	BVC = 14,
-	BVS = 15,
-	CAB = 16,
-	CLC = 17,
-	CLI = 18,
-	CLV = 19,
-	CMP = 20,
-	CPB = 21,
-	CPS = 22,
-	CPX = 23,
-	CPY = 24,
-	DAB = 25,
-	DEB = 26,
-	DEC = 27,
-	DEX = 28,
-	DEY = 29,
-	DIV = 30,
-	INB = 31,
-	INC = 32,
-	INX = 33,
-	INY = 34,
-	JMP = 35,
-	JSR = 36,
-	LDA = 37,
-	LDB = 38,
-	LDX = 39,
-	LDY = 40,
-	LLB = 41,
-	LRB = 42,
-	LSL = 43,
-	LSR = 44,
-	MAB = 45,
-	MUL = 46,
-	NOP = 47,
-	OAB = 48,
-	ORA = 49,
-	PHA = 50,
-	PHB = 51,
-	PHP = 52,
-	PHX = 53,
-	PHY = 54,
-	PLA = 55,
-	PLB = 56,
-	PLP = 57,
-	PLX = 58,
-	PLY = 59,
-	RLB = 60,
-	ROL = 61,
-	ROR = 62,
-	RRB = 63,
-	RTI = 64,
-	RTS = 65,
-	SAB = 66,
-	SBC = 67,
-	SEC = 68,
-	SEI = 69,
-	STA = 70,
-	STB = 71,
-	STX = 72,
-	STY = 73,
-	TAB = 74,
-	TAX = 75,
-	TAY = 76,
-	TBA = 77,
-	TSX = 78,
-	TXA = 79,
-	TXS = 80,
-	TXY = 81,
-	TYA = 82,
-	TYX = 83,
-	WAI = 84,
-	XAB = 85,
-	XOR = 86
+	ADC,
+	AND,
+	ASR,
+	BCC,
+	BCS,
+	BEQ,
+	BNE,
+	BNG,
+	BPO,
+	BRA,
+	BRK,
+	BVC,
+	BVS,
+	CLC,
+	CLI,
+	CLV,
+	CMP,
+	CPB,
+	CPS,
+	CPX,
+	CPY,
+	DEB,
+	DEC,
+	DEX,
+	DEY,
+	DIV,
+	INB,
+	INC,
+	INX,
+	INY,
+	JMP,
+	JSR,
+	LDA,
+	LDB,
+	LDX,
+	LDY,
+	LSL,
+	LSR,
+	MUL,
+	NOP,
+	ORA,
+	PHA,
+	PHB,
+	PHP,
+	PHX,
+	PHY,
+	PLA,
+	PLB,
+	PLP,
+	PLX,
+	PLY,
+	ROL,
+	ROR,
+	RTI,
+	RTS,
+	SBC,
+	SEC,
+	SEI,
+	STA,
+	STB,
+	STX,
+	STY,
+	TAB,
+	TAX,
+	TAY,
+	TBA,
+	TSX,
+	TXA,
+	TXS,
+	TXY,
+	TYA,
+	TYX,
+	WAI,
+	XOR
 };
 
 enum base_isa {
 	CPS_IMP = 0x00, /* Clear Processor Status. */
 	ADC_IMM = 0x01, /* ADd with Carry. */
-	AAB_IMP = 0x02, /* Add Accumulator with carry by B register. */
-	ADC_AB  = 0x04, /* ADC Absolute. */
-	LDA_IN  = 0x05, /* LDA Indirect */
-	ADC_Z   = 0x06, /* ADC Zero Matrix. */
-	CLC_IMP = 0x08, /* CLear Carry flag. */
-	DEX_IMP = 0x09, /* DEcrement X register. */
-	DEC_IMP = 0x0A, /* DECrement accumulator. */
-	DEC_AB  = 0x0C, /* DEC Absolute. */
-	DEC_Z   = 0x0D, /* DEC Zero Matrix. */
+	ROR_IMM = 0x02, /* ROtate Right. */
+	CPB_IMM = 0x04, /* ComPare B register. */
+	ADC_Z   = 0x05, /* ADC Zero Matrix. */
+	ROR_Z   = 0x06, /* ROR Zero Matrix. */
+	CPB_Z   = 0x08, /* CPB Zero Matrix. */
+	CLC_IMP = 0x09, /* CLear Carry flag. */
+	TAB_IMP = 0x0A, /* Transfer Accumulator to B.  */
+	STY_Z   = 0x0C, /* STore Y register. */
 	JMP_AB  = 0x10, /* JMP Absolute. */
-	SBC_IMM = 0x11, /* SuBtract with Carry. */
-	SAB_IMP = 0x12, /* Subtract Accumulator with carry by B register. */
-	SBC_AB  = 0x14, /* SBC Absolute. */
-	STA_IN  = 0x15, /* STA Indirect */
-	SBC_Z   = 0x16, /* SBC Zero Matrix. */
-	SEC_IMP = 0x18, /* SEt Carry flag. */
-	INX_IMP = 0x19, /* INcrement X register. */
-	INC_IMP = 0x1A, /* INCrement accumulator. */
-	INC_AB  = 0x1C, /* INC Absolute. */
-	INC_Z   = 0x1D, /* INC Zero Matrix. */
-	JSR_AB  = 0x20, /* JSR Absolute. */
-	AND_IMM = 0x21, /* bitwise AND with accumulator. */
-	ABA_IMP = 0x22, /* bitwise And with Accumulator, and B register. */
-	AND_AB  = 0x24, /* AND Absolute. */
-	CMP_IN  = 0x25, /* CMP Indirect */
-	AND_Z   = 0x26, /* AND Zero Matrix. */
-	CLI_IMP = 0x28, /* CLear Interupt flag. */
-	DEY_IMP = 0x29, /* DEcrement Y register. */
-	CPB_IMM = 0x2A, /* ComPare B register. */
-	CPB_AB  = 0x2C, /* CPB Absolute. */
-	CPB_Z   = 0x2D, /* CPB Zero Matrix. */
-	JMP_Z   = 0x30, /* JuMP to memory location. */
-	ORA_IMM = 0x31, /* bitwise OR with Accumulator. */
-	OAB_IMP = 0x32, /* bitwise Or with Accumulator, and B register. */
-	ORA_AB  = 0x34, /* ORA Absolute. */
-	LDB_IN  = 0x35, /* LDB Indirect */
-	ORA_Z   = 0x36, /* ORA Zero Matrix. */
-	SEI_IMP = 0x38, /* SEt Interupt flag. */
-	INY_IMP = 0x39, /* INcrement Y register. */
-	CPX_IMM = 0x3A, /* ComPare X register. */
-	CPX_AB  = 0x3C, /* CPX Absolute. */
-	CPX_Z   = 0x3D, /* CPX Zero Matrix. */
+	ADC_AB  = 0x11, /* ADC Absolute. */
+	ROR_AB  = 0x12, /* ROR Absolute. */
+	CPB_AB  = 0x14, /* CPB Absolute. */
+	ADC_B   = 0x15, /* ADC B Register. */
+	ROR_B   = 0x16, /* ROR B Register. */
+	STY_AB  = 0x18, /* STY Absolute. */
+	SEC_IMP = 0x19, /* SEt Carry flag. */
+	TBA_IMP = 0x1A, /* Transfer B to Accumulator.  */
+	JMP_Z   = 0x20, /* JuMP to memory location. */
+	SBC_IMM = 0x21, /* SuBtract with Carry. */
+	MUL_IMM = 0x22, /* MULtiply accumulator. */
+	CPX_IMM = 0x24, /* ComPare X register. */
+	SBC_Z   = 0x25, /* SBC Zero Matrix. */
+	MUL_Z   = 0x26, /* MUL Zero Matrix. */
+	CPX_Z   = 0x28, /* CPX Zero Matrix. */
+	CLI_IMP = 0x29, /* CLear Interupt flag. */
+	TAY_IMP = 0x2A, /* Transfer Accumulator to Y. */
+	STA_Z   = 0x2C, /* STore Accumulator. */
+	STA_ZX  = 0x2E, /* STA Zero Marrix, Indexed with X. */
+	JSR_AB  = 0x30, /* JSR Absolute. */
+	SBC_AB  = 0x31, /* SBC Absolute. */
+	MUL_AB  = 0x32, /* MUL Absolute. */
+	CPX_AB  = 0x34, /* CPX Absolute. */
+	SBC_B   = 0x35, /* SBC B Register. */
+	MUL_B   = 0x36, /* MUL B Register. */
+	STA_AB  = 0x38, /* STA Absolute. */
+	SEI_IMP = 0x39, /* SEt Interupt flag. */
+	TYA_IMP = 0x3A, /* Transfer Y to Accumulator. */
+	STA_ZY  = 0x3C, /* STA Zero Marrix, Indexed with Y. */
+	STA_IX  = 0x3E, /* STA Indexed Indirect. */
 	JSR_Z   = 0x40, /* Jump to SubRoutine. */
-	XOR_IMM = 0x41, /* bitwise XOR with accumulator. */
-	XAB_IMP = 0x42, /* bitwise Xor with Accumulator, and B register. */
-	XOR_AB  = 0x44, /* XOR Absolute. */
-	STB_IN  = 0x45, /* STB Indirect */
-	XOR_Z   = 0x46, /* XOR Zero Matrix. */
-	CLV_IMP = 0x48, /* CLear oVerflow flag. */
-	CPY_IMM = 0x4A, /* ComPare Y register. */
-	CPY_AB  = 0x4C, /* CPY Absolute. */
-	CPY_Z   = 0x4D, /* CPY Zero Matrix. */
-	BPO_REL = 0x50, /* Branch if POsitive. */
-	LSL_IMM = 0x51, /* Logical Shift Left. */
-	LLB_IMP = 0x52, /* Logical shift Left accumulator by B. */
-	LSL_AB  = 0x54, /* LSL Absolute. */
-	CPB_IN  = 0x55, /* CPB Indirect */
-	LSL_Z   = 0x56, /* LSL Zero Matrix. */
-	WAI_IMP = 0x58, /* WAit for Interrupt. */
-	PHP_IMP = 0x59, /* PusH Processor status to stack. */
-	TAB_IMP = 0x5A, /* Transfer Accumulator to B.  */
-	LDA_IY  = 0x5C, /* LDA Indirect Indexed. */
-	LDA_IX  = 0x5D, /* LDA Indexed Indirect. */
-	BNG_REL = 0x60, /* Branch if NeGative. */
-	LSR_IMM = 0x61, /* Logical Shift Right. */
-	LRB_IMP = 0x62, /* Logical shift Right accumulator by B. */
-	LSR_AB  = 0x64, /* LSR Absolute. */
-	LDY_IN  = 0x65, /* LDY Indirect */
-	LSR_Z   = 0x66, /* LSR Zero Matrix. */
-	BRK_IMP = 0x68, /* BReaK. */
-	PLP_IMP = 0x69, /* PuLl Processor status from stack. */
-	TBA_IMP = 0x6A, /* Transfer B to Accumulator.  */
-	STA_IY  = 0x6C, /* STA Indirect Indexed. */
-	STA_IX  = 0x6D, /* STA Indexed Indirect. */
-	BCS_REL = 0x70, /* Branch if Carry Set. */
-	ROL_IMM = 0x71, /* ROtate Left. */
-	RLB_IMP = 0x72, /* Rotate Left accumulator by B. */
-	ROL_AB  = 0x74, /* ROL Absolute. */
-	STY_IN  = 0x75, /* STY Indirect */
-	ROL_Z   = 0x76, /* ROL Zero Matrix. */
-	LDA_ZY  = 0x78, /* LDA Zero Marrix, Indexed with Y. */
-	PHA_IMP = 0x79, /* PusH Accumulator to stack. */
-	TAY_IMP = 0x7A, /* Transfer Accumulator to Y. */
-	CMP_IY  = 0x7C, /* CMP Indirect Indexed. */
-	CMP_IX  = 0x7D, /* CMP Indexed Indirect. */
-	BCC_REL = 0x80, /* Branch if Carry Clear. */
-	ROR_IMM = 0x81, /* ROtate Right. */
-	RRB_IMP = 0x82, /* Rotate Right accumulator by B. */
-	ROR_AB  = 0x84, /* ROR Absolute. */
-	LDX_IN  = 0x85, /* LDX Indirect */
-	ROR_Z   = 0x86, /* ROR Zero Matrix. */
-	STA_ZY  = 0x88, /* STA Zero Marrix, Indexed with Y. */
-	PLA_IMP = 0x89, /* PuLl Accumulator from stack. */
-	TYA_IMP = 0x8A, /* Transfer Y to Accumulator. */
-	LDB_IY  = 0x8C, /* LDB Indirect Indexed. */
-	LDB_IX  = 0x8D, /* LDB Indexed Indirect. */
-	BEQ_REL = 0x90, /* Branch if EQual. */
-	MUL_IMM = 0x91, /* MULtiply accumulator. */
-	MAB_IMP = 0x92, /* Multiply Accumulator by B. */
-	MUL_AB  = 0x94, /* MUL Absolute. */
-	STX_IN  = 0x95, /* STX Indirect */
-	MUL_Z   = 0x96, /* MUL Zero Matrix. */
-	LDB_ZY  = 0x98, /* LDB Zero Marrix, Indexed with Y. */
-	PHB_IMP = 0x99, /* PusH B register to stack. */
-	TAX_IMP = 0x9A, /* Transfer Accumulator to X. */
-	STB_IY  = 0x9C, /* STB Indirect Indexed. */
-	STB_IX  = 0x9D, /* STB Indexed Indirect. */
-	BNE_REL = 0xA0, /* Branch if Not Equal. */
-	DIV_IMM = 0xA1, /* DIVide with accumulator. */
-	DAB_IMP = 0xA2, /* Divide Accumulator by B. */
-	DIV_AB  = 0xA4, /* DIV Absolute. */
-	JSR_IN  = 0xA5, /* JSR Indirect */
-	DIV_Z   = 0xA6, /* DIV Zero Matrix. */
-	STB_ZY  = 0xA8, /* STB Zero Marrix, Indexed with Y. */
-	PLB_IMP = 0xA9, /* PuLl B register to stack. */
-	TXA_IMP = 0xAA, /* Transfer X to Accumulator. */
-	CPB_IY  = 0xAC, /* CPB Indirect Indexed. */
-	CPB_IX  = 0xAD, /* CPB Indexed Indirect. */
-	BVS_REL = 0xB0, /* Branch if oVerflow Set. */
-	CMP_IMM = 0xB1, /* CoMPare accumulator. */
-	CAB_IMP = 0xB2, /* Compare Accumulator, and B. */
-	CMP_AB  = 0xB4, /* CMP Absolute. */
-	JMP_IN  = 0xB5, /* JMP Indirect */
-	CMP_Z   = 0xB6, /* CMP Zero Matrix. */
-	LDA_ZX  = 0xB8, /* LDA Zero Marrix, Indexed with X. */
-	LDX_IMM = 0xB9, /* LoaD X register. */
-	TYX_IMP = 0xBA, /* Transfer Y to X. */
-	LDX_AB  = 0xBC, /* LDX Absolute. */
-	LDX_Z   = 0xBD, /* LDX Zero Matrix. */
-	BVC_REL = 0xC0, /* Branch if oVerflow Clear. */
-	LDA_IMM = 0xC1, /* LoaD Accumulator. */
-	DEB_IMP = 0xC2, /* Decrement B register. */
-	LDA_AB  = 0xC4, /* LDA Absolute. */
+	AND_IMM = 0x41, /* bitwise AND with accumulator. */
+	DIV_IMM = 0x42, /* DIVide with accumulator. */
+	CPY_IMM = 0x44, /* ComPare Y register. */
+	AND_Z   = 0x45, /* AND Zero Matrix. */
+	DIV_Z   = 0x46, /* DIV Zero Matrix. */
+	CPY_Z   = 0x48, /* CPY Zero Matrix. */
+	CLV_IMP = 0x49, /* CLear oVerflow flag. */
+	TAX_IMP = 0x4A, /* Transfer Accumulator to X. */
+	STB_Z   = 0x4C, /* STore B register. */
+	STB_ZX  = 0x4E, /* STB Zero Marrix, Indexed with X. */
+	RTS_IMP = 0x50, /* ReTurn from Subroutine. */
+	AND_AB  = 0x51, /* AND Absolute. */
+	DIV_AB  = 0x52, /* DIV Absolute. */
+	CPY_AB  = 0x54, /* CPY Absolute. */
+	AND_B   = 0x55, /* AND B Register. */
+	DIV_B   = 0x56, /* DIV B Register. */
+	STB_AB  = 0x58, /* STB Absolute. */
+	WAI_IMP = 0x59, /* WAit for Interrupt. */
+	TXA_IMP = 0x5A, /* Transfer X to Accumulator. */
+	STB_ZY  = 0x5C, /* STB Zero Marrix, Indexed with Y. */
+	STB_IX  = 0x5E, /* STB Indexed Indirect. */
+	RTI_IMP = 0x60, /* ReTurn from Interrupt. */
+	ORA_IMM = 0x61, /* bitwise OR with Accumulator. */
+	ASR_IMM = 0x62, /* Arithmetic Shift Right. */
+	LDX_IMM = 0x64, /* LoaD X register. */
+	ORA_Z   = 0x65, /* ORA Zero Matrix. */
+	ASR_Z   = 0x66, /* ASR Zero Matrix. */
+	LDX_Z   = 0x68, /* LDX Zero Matrix. */
+	BRK_IMP = 0x69, /* BReaK. */
+	TYX_IMP = 0x6A, /* Transfer Y to X. */
+	STX_Z   = 0x6C, /* STore X register. */
+	PHP_IMP = 0x6E, /* PusH Processor status to stack. */
+	BPO_REL = 0x70, /* Branch if POsitive. */
+	ORA_AB  = 0x71, /* ORA Absolute. */
+	ASR_AB  = 0x72, /* ASR Absolute. */
+	LDX_AB  = 0x74, /* LDX Absolute. */
+	ORA_B   = 0x75, /* ORA B Register. */
+	ASR_B   = 0x76, /* ASR B Register. */
+	STX_AB  = 0x78, /* STX Absolute. */
+	DEY_IMP = 0x79, /* DEcrement Y register. */
+	TXY_IMP = 0x7A, /* Transfer X to Y. */
+	CPB_IN  = 0x7C, /* CPB Indirect */
+	PLP_IMP = 0x7E, /* PuLl Processor status from stack. */
+	BNG_REL = 0x80, /* Branch if NeGative. */
+	XOR_IMM = 0x81, /* bitwise XOR with accumulator. */
+	CMP_IMM = 0x82, /* CoMPare accumulator. */
+	DEC_IMP = 0x84, /* DECrement accumulator. */
+	XOR_Z   = 0x85, /* XOR Zero Matrix. */
+	CMP_Z   = 0x86, /* CMP Zero Matrix. */
+	DEC_Z   = 0x88, /* DEC Zero Matrix. */
+	INY_IMP = 0x89, /* INcrement Y register. */
+	TSX_IMP = 0x8A, /* Transfer Stack pointer to X. */
+	CMP_IN  = 0x8C, /* CMP Indirect */
+	PHA_IMP = 0x8E, /* PusH Accumulator to stack. */
+	BCS_REL = 0x90, /* Branch if Carry Set. */
+	XOR_AB  = 0x91, /* XOR Absolute. */
+	CMP_AB  = 0x92, /* CMP Absolute. */
+	DEC_AB  = 0x94, /* DEC Absolute. */
+	XOR_B   = 0x95, /* XOR B Register. */
+	CMP_B   = 0x96, /* CMP B Register. */
+	DEB_IMP = 0x99, /* Decrement B register. */
+	TXS_IMM = 0x9A, /* Transfer X to Stack pointer. */
+	STY_IN  = 0x9C, /* STY Indirect */
+	PLA_IMP = 0x9E, /* PuLl Accumulator from stack. */
+	BCC_REL = 0xA0, /* Branch if Carry Clear. */
+	LSL_IMM = 0xA1, /* Logical Shift Left. */
+	LDY_IMM = 0xA2, /* LoaD Y register. */
+	INC_IMP = 0xA4, /* INCrement accumulator. */
+	LSL_Z   = 0xA5, /* LSL Zero Matrix. */
+	LDY_Z   = 0xA6, /* LDY Zero Matrix. */
+	INC_Z   = 0xA8, /* INC Zero Matrix. */
+	INB_IMP = 0xA9, /* Increment B register. */
+	CMP_IX  = 0xAA, /* CMP Indexed Indirect. */
+	LDY_IN  = 0xAC, /* LDY Indirect */
+	PHB_IMP = 0xAE, /* PusH B register to stack. */
+	BEQ_REL = 0xB0, /* Branch if EQual. */
+	LSL_AB  = 0xB1, /* LSL Absolute. */
+	LDY_AB  = 0xB2, /* LDY Absolute. */
+	INC_AB  = 0xB4, /* INC Absolute. */
+	LSL_B   = 0xB5, /* LSL B Register. */
+	DEX_IMP = 0xB9, /* DEcrement X register. */
+	CPB_IX  = 0xBA, /* CPB Indexed Indirect. */
+	LDX_IN  = 0xBC, /* LDX Indirect */
+	PLB_IMP = 0xBE, /* PuLl B register to stack. */
+	BNE_REL = 0xC0, /* Branch if Not Equal. */
+	LSR_IMM = 0xC1, /* Logical Shift Right. */
+	LDA_IMM = 0xC2, /* LoaD Accumulator. */
+	LDA_IN  = 0xC4, /* LDA Indirect */
+	LSR_Z   = 0xC5, /* LSR Zero Matrix. */
 	LDA_Z   = 0xC6, /* LDA Zero Matrix. */
-	STA_ZX  = 0xC8, /* STA Zero Marrix, Indexed with X. */
-	PHY_IMP = 0xC9, /* PusH Y register to stack. */
-	TXY_IMP = 0xCA, /* Transfer X to Y. */
-	STA_AB  = 0xCC, /* STA Absolute. */
-	STA_Z   = 0xCD, /* STore Accumulator. */
-	BRA_REL = 0xD0, /* BRanch Always. */
-	LDB_IMM = 0xD1, /* LoaD B register. */
-	INB_IMP = 0xD2, /* Increment B register. */
-	LDB_AB  = 0xD4, /* LDB Absolute. */
-	LDB_Z   = 0xD6, /* LDB Zero Matrix. */
-	LDB_ZX  = 0xD8, /* LDB Zero Marrix, Indexed with X. */
-	PLY_IMP = 0xD9, /* PuLl Y register from stack. */
-	TSX_IMP = 0xDA, /* Transfer Stack pointer to X. */
-	STB_AB  = 0xDC, /* STB Absolute. */
-	STB_Z   = 0xDD, /* STore B register. */
-	RTS_IMP = 0xE0, /* ReTurn from Subroutine. */
-	LDY_IMM = 0xE1, /* LoaD Y register. */
-	LDY_AB  = 0xE4, /* LDY Absolute. */
-	LDY_Z   = 0xE6, /* LDY Zero Matrix. */
-	STB_ZX  = 0xE8, /* STB Zero Marrix, Indexed with X. */
-	PHX_IMP = 0xE9, /* PusH X register to stack. */
+	LDA_ZX  = 0xC8, /* LDA Zero Marrix, Indexed with X. */
+	INX_IMP = 0xC9, /* INcrement X register. */
+	STA_IY  = 0xCA, /* STA Indirect Indexed. */
+	STX_IN  = 0xCC, /* STX Indirect */
+	PHY_IMP = 0xCE, /* PusH Y register to stack. */
+	BVS_REL = 0xD0, /* Branch if oVerflow Set. */
+	LSR_AB  = 0xD1, /* LSR Absolute. */
+	LDA_AB  = 0xD2, /* LDA Absolute. */
+	STA_IN  = 0xD4, /* STA Indirect */
+	LSR_B   = 0xD5, /* LSR B Register. */
+	LDA_ZY  = 0xD6, /* LDA Zero Marrix, Indexed with Y. */
+	LDA_IX  = 0xD8, /* LDA Indexed Indirect. */
+	LDA_IY  = 0xD9, /* LDA Indirect Indexed. */
+	STB_IY  = 0xDA, /* STB Indirect Indexed. */
+	JSR_IN  = 0xDC, /* JSR Indirect */
+	PLY_IMP = 0xDE, /* PuLl Y register from stack. */
+	BVC_REL = 0xE0, /* Branch if oVerflow Clear. */
+	ROL_IMM = 0xE1, /* ROtate Left. */
+	LDB_IMM = 0xE2, /* LoaD B register. */
+	LDB_IN  = 0xE4, /* LDB Indirect */
+	ROL_Z   = 0xE5, /* ROL Zero Matrix. */
+	LDB_Z   = 0xE6, /* LDB Zero Matrix. */
+	LDB_ZX  = 0xE8, /* LDB Zero Marrix, Indexed with X. */
+	LDB_IY  = 0xE9, /* LDB Indirect Indexed. */
 	NOP_IMP = 0xEA, /* No OPeration. */
-	STY_AB  = 0xEC, /* STY Absolute. */
-	STY_Z   = 0xED, /* STore Y register. */
-	RTI_IMP = 0xF0, /* ReTurn from Interrupt. */
-	ASR_IMM = 0xF1, /* Arithmetic Shift Right. */
-	ARB_IMP = 0xF2, /* Arithmetic shift Right accumulator by B. */
-	ASR_AB  = 0xF4, /* ASR Absolute. */
-	ASR_Z   = 0xF6, /* ASR Zero Matrix. */
-	PLX_IMP = 0xF9, /* PuLl X register from stack. */
-	TXS_IMM = 0xFA, /* Transfer X to Stack pointer. */
-	STX_AB  = 0xFC, /* STX Absolute. */
-	STX_Z   = 0xFD  /* STore X register. */
+	JMP_IN  = 0xEC, /* JMP Indirect */
+	PHX_IMP = 0xEE, /* PusH X register to stack. */
+	BRA_REL = 0xF0, /* BRanch Always. */
+	ROL_AB  = 0xF1, /* ROL Absolute. */
+	LDB_AB  = 0xF2, /* LDB Absolute. */
+	STB_IN  = 0xF4, /* STB Indirect */
+	ROL_B   = 0xF5, /* ROL B Register. */
+	LDB_ZY  = 0xF6, /* LDB Zero Marrix, Indexed with Y. */
+	LDB_IX  = 0xF8, /* LDB Indexed Indirect. */
+	CMP_IY  = 0xF9, /* CMP Indirect Indexed. */
+	CPB_IY  = 0xFA, /* CPB Indirect Indexed. */
+	PLX_IMP = 0xFE  /* PuLl X register from stack. */
 };
 
 enum base_ext {