Revamped the opcode table, made the emulator more

efficient, and ported SuBEditor to C.

I revamped the opcode table to add another prefix bit
for the addressing mode, finally giving access to all
addresses, without wasting any bytes.

I made the stack based operations more efficient, by
sort of applying Duff's device to it.

And I ported SuBEditor to C, to make it easier for me
to figure out how to implement SuBAsm.

1 files changed, 658 insertions, 587 deletions

diff --git a/opcode.h b/opcode.h
index a65720a..1a7ae53 100644
--- a/opcode.h
+++ b/opcode.h
@@ -4,101 +4,193 @@
 #include <unistd.h>
 
 #define OPNAME(opcode) [opcode] = #opcode /* Get name of Opcode, for disassembly. */
-#define CPS 0x00 /* Clear Processor Status. */
-#define ADC 0x01 /* ADd with Carry. */
-#define AAB 0x02 /* Add Accumulator with carry by B register. */
-#define PHB 0x06 /* PusH B register to stack. */
-#define PHP 0x08 /* PusH Processor status to stack. */
-#define LDA 0x09 /* LoaD Accumulator. */
-#define LDY 0x0A /* LoaD Y register. */
-#define LDX 0x0B /* LoaD X register. */
-#define TAB 0x0C /* Transfer Accumulator to B.  */
-#define LDB 0x0E /* LoaD B register. */
-#define JMP 0x10 /* JuMP to memory location. */
-#define SBC 0x11 /* SuBtract with Carry. */
-#define SAB 0x12 /* Subtract Accumulator with carry by B register. */
-#define PLB 0x16 /* PuLl B register to stack. */
-#define PLP 0x18 /* PuLl Processor status from stack. */
-#define TBA 0x1C /* Transfer B to Accumulator.  */
-#define JSR 0x20 /* Jump to SubRoutine. */
-#define AND 0x21 /* bitwise AND with accumulator. */
-#define ABA 0x22 /* bitwise And with Accumulator, and B register. */
-#define CPB 0x26 /* ComPare B register. */
-#define STT 0x28 /* STart Threads. */
-#define STA 0x29 /* STore Accumulator. */
-#define STY 0x2A /* STore Y register. */
-#define STX 0x2B /* STore X register. */
-#define TAY 0x2C /* Transfer Accumulator to Y. */
-#define STB 0x2E /* STore B register. */
-#define BPO 0x30 /* Branch if POsitive. */
-#define ORA 0x31 /* bitwise OR with Accumulator. */
-#define OAB 0x32 /* bitwise Or with Accumulator, and B register. */
-#define SEI 0x38 /* SEt Interupt flag. */
-#define TYA 0x3C /* Transfer Y to Accumulator. */
-#define BNG 0x40 /* Branch if NeGative. */
-#define XOR 0x41 /* bitwise XOR with accumulator. */
-#define XAB 0x42 /* bitwise Xor with Accumulator, and B register. */
-#define CLI 0x48 /* CLear Interupt flag. */
-#define TAX 0x4C /* Transfer Accumulator to X. */
-#define BCS 0x50 /* Branch if Carry Set. */
-#define LSL 0x51 /* Logical Shift Left. */
-#define LLB 0x52 /* Logical shift Left accumulator by B. */
-#define SEC 0x58 /* SEt Carry flag. */
-#define TXA 0x5C /* Transfer X to Accumulator. */
-#define BCC 0x60 /* Branch if Carry Clear. */
-#define LSR 0x61 /* Logical Shift Right. */
-#define LRB 0x62 /* Logical shift Right accumulator by B. */
-#define CLC 0x68 /* CLear Carry flag. */
-#define TYX 0x6C /* Transfer Y to X. */
-#define BEQ 0x70 /* Branch if EQual. */
-#define ROL 0x71 /* ROtate Left. */
-#define RLB 0x72 /* Rotate Left accumulator by B. */
-#define SSP 0x78 /* Set Stack Protection flag. */
-#define TXY 0x7C /* Transfer X to Y. */
-#define BNE 0x80 /* Branch if Not Equal. */
-#define ROR 0x81 /* ROtate Right. */
-#define RRB 0x82 /* Rotate Right accumulator by B. */
-#define INY 0x86 /* INcrement Y register. */
-#define CSP 0x88 /* Clear Stack Protection flag. */
-#define TSX 0x8C /* Transfer Stack pointer to X. */
-#define BVS 0x90 /* Branch if oVerflow Set. */
-#define MUL 0x91 /* MULtiply accumulator. */
-#define MAB 0x92 /* Multiply Accumulator by B. */
-#define DEY 0x96 /* DEcrement Y register. */
-#define SEV 0x98 /* SEt oVerflow flag. */
-#define TXS 0x9C /* Transfer X to Stack pointer. */
-#define BVC 0xA0 /* Branch if oVerflow Clear. */
-#define DIV 0xA1 /* DIVide with accumulator. */
-#define DAB 0xA2 /* Divide Accumulator by B. */
-#define INX 0xA6 /* INcrement X register. */
-#define CLV 0xA8 /* CLear oVerflow flag. */
-#define PHY 0xAC /* PusH Y register to stack. */
-#define RTS 0xB0 /* ReTurn from Subroutine. */
-#define CMP 0xB1 /* CoMPare accumulator. */
-#define CAB 0xB2 /* Compare Accumulator, and B. */
-#define DEX 0xB6 /* DEcrement X register. */
-#define ENT 0xB8 /* ENd Threads. */
-#define CPY 0xBA /* ComPare Y register. */
-#define CPX 0xBB /* ComPare X register. */
-#define PLY 0xBC /* PuLl Y register from stack. */
-#define RTI 0xC0 /* ReTurn from Interrupt. */
-#define INC 0xC1 /* INCrement accumulator. */
-#define IAB 0xC2 /* Increment Accumulator, and B register. */
-#define WAI 0xC8 /* WAit for Interrupt. */
-#define PHX 0xCC /* PusH X register to stack. */
-#define DEC 0xD1 /* DECrement accumulator. */
-#define DBA 0xD2 /* Decrement Accumulator, and B register. */
-#define PLX 0xDC /* PuLl X register from stack. */
-#define JSL 0xE0 /* Jump to Subroutine Long. */
-#define ASR 0xE1 /* Arithmetic Shift Right. */
-#define ARB 0xE2 /* Arithmetic shift Right accumulator by B. */
-#define NOP 0xE8 /* No OPeration. */
-#define PHA 0xEC /* PusH Accumulator to stack. */
-#define RTL 0xF0 /* ReTurn from subroutine Long. */
-#define BRK 0xF8 /* BReaK. */
-#define PLA 0xFC /* PuLl Accumulator from stack. */
+#define CPS	0x00 /* Clear Processor Status. */
+#define ADC	0x01 /* ADd with Carry. */
+#define AAB	0x02 /* Add Accumulator with carry by B register. */
+#define ADC_AB	0x04 /* ADC Absolute. */
+#define LDA_IN	0x05 /* LDA Indirect. */
+#define ADC_Z	0x06 /* ADC Zero Matrix. */
+#define PHP	0x08 /* PusH Processor status to stack. */
+#define CPB	0x09 /* ComPare B register. */
+#define PHB	0x0A /* PusH B register to stack. */
+#define DEC_AB	0x0C /* DEC Absolute. */
+#define DEC_Z	0x0D /* DEC Zero Matrix. */
+#define JMP_Z	0x0E /* JuMP to memory location. */
+#define JMP	0x10 /* JMP Absolute. */
+#define SBC	0x11 /* SuBtract with Carry. */
+#define SAB	0x12 /* Subtract Accumulator with carry by B register. */
+#define SBC_AB	0x14 /* SBC Absolute. */
+#define STA_IN	0x15 /* STA Indirect. */
+#define SBC_Z	0x16 /* SBC Zero Matrix. */
+#define ENT	0x18 /* ENd Threads. */
+#define CPY	0x19 /* ComPare Y register. */
+#define PLB	0x1A /* PuLl B register to stack. */
+#define INC_AB	0x1C /* INC Absolute. */
+#define INC_Z	0x1D /* INC Zero Matrix. */
+#define JSR	0x1E /* Jump to SubRoutine. */
+#define JSL	0x20 /* Jump to Subroutine Long. */
+#define AND	0x21 /* bitwise AND with accumulator. */
+#define ABA	0x22 /* bitwise And with Accumulator, and B register. */
+#define AND_AB	0x24 /* AND Absolute. */
+#define CMP_IN	0x25 /* CMP Indirect. */
+#define AND_Z	0x26 /* AND Zero Matrix. */
+#define PLP	0x28 /* PuLl Processor status from stack. */
+#define CPX	0x29 /* ComPare X register. */
+#define PHY	0x2A /* PusH Y register to stack. */
+#define CPB_AB	0x2C /* CPB Absolute. */
+#define CPB_Z	0x2D /* CPB Zero Matrix. */
+#define BPO_Z	0x2E /* Branch if POsitive. */
+#define BPO	0x30 /* BPO Absolute. */
+#define ORA	0x31 /* bitwise OR with Accumulator. */
+#define OAB	0x32 /* bitwise Or with Accumulator, and B register. */
+#define ORA_AB	0x34 /* ORA Absolute. */
+#define LDB_IN	0x35 /* LDB Indirect. */
+#define ORA_Z	0x36 /* ORA Zero Matrix. */
+#define STT	0x38 /* STart Threads. */
+#define LDA_ZY	0x39 /* LDA Zero Matrix, indexed with Y. */
+#define PLY	0x3A /* PuLl Y register from stack. */
+#define CPX_AB	0x3C /* CPX Absolute. */
+#define CPY_Z	0x3D /* CPY Zero Matrix. */
+#define BNG_Z	0x3E /* Branch if NeGative. */
+#define BNG	0x40 /* BNG Absolute. */
+#define XOR	0x41 /* bitwise XOR with accumulator. */
+#define XAB	0x42 /* bitwise Xor with Accumulator, and B register. */
+#define XOR_AB	0x44 /* XOR Absolute. */
+#define STB_IN	0x45 /* STB Indirect. */
+#define XOR_Z	0x46 /* XOR Zero Matrix. */
+#define PHA	0x48 /* PusH Accumulator to stack. */
+#define STA_ZY	0x49 /* STA Zero Matrix, indexed with Y. */
+#define PHX	0x4A /* PusH X register to stack. */
+#define CPY_AB	0x4C /* CPY Absolute. */
+#define CPX_Z	0x4D /* CPX Zero Matrix. */
+#define BCS_Z	0x4E /* Branch if Carry Set. */
+#define BCS	0x50 /* BCS Absolute. */
+#define LSL	0x51 /* Logical Shift Left. */
+#define LLB	0x52 /* Logical shift Left accumulator by B. */
+#define LSL_AB	0x54 /* LSL Absolute. */
+#define CPB_IN	0x55 /* CPB Indirect. */
+#define LSL_Z	0x56 /* LSL Zero Matrix. */
+#define CLC	0x58 /* CLear Carry flag. */
+#define LDB_ZY	0x59 /* LDB Zero Matrix, indexed with Y. */
+#define PLX	0x5A /* PuLl X register from stack. */
+#define LDA_IY	0x5C /* LDA Indirect Indexed. */
+#define LDA_IX	0x5D /* LDA Indexed Indirect. */
+#define BCC_Z	0x5E /* Branch if Carry Clear. */
+#define BCC	0x60 /* BCC Absolute. */
+#define LSR	0x61 /* Logical Shift Right. */
+#define LRB	0x62 /* Logical shift Right accumulator by B. */
+#define LSR_AB	0x64 /* LSR Absolute. */
+#define LDY_IN	0x65 /* LDY Indirect. */
+#define LSR_Z	0x66 /* LSR Zero Matrix. */
+#define PLA	0x68 /* PuLl Accumulator from stack. */
+#define STB_ZY	0x69 /* STB Zero Matrix, indexed with Y. */
+#define TAB	0x6A /* Transfer Accumulator to B.  */
+#define STA_IY	0x6C /* STA Indirect Indexed. */
+#define STA_IX	0x6D /* STA Indexed Indirect. */
+#define BEQ_Z	0x6E /* Branch if EQual. */
+#define BEQ	0x70 /* BEQ Absolute. */
+#define ROL	0x71 /* ROtate Left. */
+#define RLB	0x72 /* Rotate Left accumulator by B. */
+#define ROL_AB	0x74 /* ROL Absolute. */
+#define STY_IN	0x75 /* STY Indirect. */
+#define ROL_Z	0x76 /* ROL Zero Matrix. */
+#define SEC	0x78 /* SEt Carry flag. */
+#define LDA_ZX	0x79 /* LDA Zero Matrix, indexed with X. */
+#define TBA	0x7A /* Transfer B to Accumulator.  */
+#define CMP_IY	0x7C /* CMP Indirect Indexed. */
+#define CMP_IX	0x7D /* CMP Indexed Indirect. */
+#define BNE_Z	0x7E /* Branch if Not Equal. */
+#define BNE	0x80 /* BNE Absolute. */
+#define ROR	0x81 /* ROtate Right. */
+#define RRB	0x82 /* Rotate Right accumulator by B. */
+#define ROR_AB	0x84 /* ROR Absolute. */
+#define CPY_IN	0x85 /* CPY Indirect. */
+#define ROR_Z	0x86 /* ROR Zero Matrix. */
+#define DEY	0x88 /* DEcrement Y register. */
+#define STA_ZX	0x89 /* STA Zero Matrix, indexed with X. */
+#define TAY	0x8A /* Transfer Accumulator to Y. */
+#define LDB_IY	0x8C /* LDB Indirect Indexed. */
+#define LDB_IX	0x8D /* LDB Indexed Indirect. */
+#define BVS_Z	0x8E /* Branch if oVerflow Set. */
+#define BVS	0x90 /* BVS Absolute. */
+#define MUL	0x91 /* MULtiply accumulator. */
+#define MAB	0x92 /* Multiply Accumulator by B. */
+#define MUL_AB	0x94 /* MUL Absolute. */
+#define LDX_IN	0x95 /* LDX Indirect. */
+#define MUL_Z	0x96 /* MUL Zero Matrix. */
+#define CLI	0x98 /* CLear Interupt flag. */
+#define LDB_ZX	0x99 /* LDB Zero Matrix, indexed with X. */
+#define TYA	0x9A /* Transfer Y to Accumulator. */
+#define STB_IY	0x9C /* STB Indirect Indexed. */
+#define STB_IX	0x9D /* STB Indexed Indirect. */
+#define BVC_Z	0x9E /* Branch if oVerflow Clear. */
+#define BVC	0xA0 /* BVC Absolute. */
+#define DIV	0xA1 /* DIVide with accumulator. */
+#define DAB	0xA2 /* Divide Accumulator by B. */
+#define DIV_AB	0xA4 /* DIV Absolute. */
+#define STX_IN	0xA5 /* STX Indirect. */
+#define DIV_Z	0xA6 /* DIV Zero Matrix. */
+#define INY	0xA8 /* INcrement Y register. */
+#define STB_ZX	0xA9 /* STB Zero Matrix, indexed with X. */
+#define TAX	0xAA /* Transfer Accumulator to X. */
+#define CPB_IY	0xAC /* CPB Indirect Indexed. */
+#define CPB_IX	0xAD /* CPB Indexed Indirect. */
+#define RTS	0xAE /* ReTurn from Subroutine. */
+#define RTL	0xB0 /* ReTurn from subroutine Long. */
+#define CMP	0xB1 /* CoMPare accumulator. */
+#define CAB	0xB2 /* Compare Accumulator, and B. */
+#define CMP_AB	0xB4 /* CMP Absolute. */
+#define CPX_IN	0xB5 /* CPX Indirect. */
+#define CMP_Z	0xB6 /* CMP Zero Matrix. */
+#define SEI	0xB8 /* SEt Interupt flag. */
+#define LDX	0xB9 /* LoaD X register. */
+#define TXA	0xBA /* Transfer X to Accumulator. */
+#define LDX_AB	0xBC /* LDX Absolute. */
+#define LDX_Z	0xBD /* LDX Zero Matrix. */
+#define JSR_IN	0xBE /* JSR Indirect. */
+#define RTI	0xC0 /* ReTurn from Interrupt. */
+#define LDA	0xC1 /* LoaD Accumulator. */
+#define LDA_AB	0xC4 /* LDA Absolute. */
+#define DEX	0xC5 /* DEcrement X register. */
+#define LDA_Z	0xC6 /* LDA Zero Matrix. */
+#define CLV	0xC8 /* CLear oVerflow flag. */
+#define LDX_ZY	0xC9 /* LDX Zero Matrix, indexed with Y. */
+#define TYX	0xCA /* Transfer Y to X. */
+#define STA	0xCC /* STA Absolute. */
+#define STA_Z	0xCD /* STore Accumulator. */
+#define JMP_IN	0xCE /* JMP Indirect. */
+#define TSX	0xD0 /* Transfer Stack pointer to X. */
+#define LDB	0xD1 /* LoaD B register. */
+#define LDB_AB	0xD4 /* LDB Absolute. */
+#define INX	0xD5 /* INcrement X register. */
+#define LDB_Z	0xD6 /* LDB Zero Matrix. */
+#define WAI	0xD8 /* WAit for Interrupt. */
+#define STX_ZY	0xD9 /* STX Zero Matrix, indexed with Y. */
+#define TXY	0xDA /* Transfer X to Y. */
+#define STB	0xDC /* STB Absolute. */
+#define STB_Z	0xDD /* STore B register. */
+#define TXS	0xE0 /* Transfer X to Stack pointer. */
+#define LDY	0xE1 /* LoaD Y register. */
+#define LDY_AB	0xE4 /* LDY Absolute. */
+#define DEC	0xE5 /* DECrement accumulator. */
+#define LDY_Z	0xE6 /* LDY Zero Matrix. */
+#define BRK	0xE8 /* BReaK. */
+#define LDY_ZX	0xE9 /* LDY Zero Matrix, indexed with X. */
+#define NOP	0xEA /* No OPeration. */
+#define STY	0xEC /* STY Absolute. */
+#define STY_Z	0xED /* STore Y register. */
+#define DEB	0xEE /* Decrement B register. */
+#define ASR	0xF1 /* Arithmetic Shift Right. */
+#define ARB	0xF2 /* Arithmetic shift Right accumulator by B. */
+#define ASR_AB	0xF4 /* ASR Absolute. */
+#define INC	0xF5 /* INCrement accumulator. */
+#define ASR_Z	0xF6 /* ASR Zero Matrix. */
+#define STY_ZX	0xF9 /* STY Zero Matrix, indexed with X. */
+#define STX	0xFC /* STX Absolute. */
+#define STX_Z	0xFD /* STore X register. */
+#define INB	0xFE /* Increment B register. */
 
-#define OPNUM 93
+#define OPNUM 90
 
 #define C ((uint64_t)1 << 0)
 #define Z ((uint64_t)1 << 1)
@@ -139,599 +231,578 @@ typedef struct {
 opent opcodes[OPNUM];
 
 enum {IMPL, IMM, ZM, ZMX, ZMY, ABS, IND, INDX, INDY};
+static const char *adrmode[9] = {
+	[0] = "IMPL",
+	[1] = "IMM",
+	[2] = "ZM",
+	[3] = "ZMX",
+	[4] = "ZMY",
+	[5] = "ABS",
+	[6] = "IND",
+	[7] = "INDX",
+	[8] = "INDY"
+};
 
 static const uint8_t optype[0x100] = {
 	[0x00] = IMPL,
 	[0x01] = IMM,
 	[0x02] = IMPL,
-	[0x03] = ABS,
-	[0x04] = IND,
-	[0x05] = ZM,
-	[0x06] = IMM,
+	[0x04] = ABS,
+	[0x05] = IND,
+	[0x06] = ZM,
 	[0x08] = IMM,
 	[0x09] = IMM,
 	[0x0A] = IMM,
-	[0x0B] = IMM,
-	[0x0C] = IMPL,
-	[0x0E] = IMM,
+	[0x0C] = ABS,
+	[0x0D] = ZM,
+	[0x0E] = ZM,
 	[0x10] = ABS,
 	[0x11] = IMM,
 	[0x12] = IMPL,
-	[0x13] = ABS,
-	[0x14] = INDX,
-	[0x15] = ZM,
-	[0x16] = IMM,
+	[0x14] = ABS,
+	[0x15] = IND,
+	[0x16] = ZM,
 	[0x18] = IMM,
-	[0x19] = ABS,
-	[0x1A] = ABS,
-	[0x1B] = ABS,
-	[0x1C] = IMPL,
-	[0x1E] = ABS,
-	[0x20] = ZM,
+	[0x19] = IMM,
+	[0x1A] = IMM,
+	[0x1C] = ABS,
+	[0x1D] = ZM,
+	[0x1E] = ZM,
+	[0x20] = ABS,
 	[0x21] = IMM,
 	[0x22] = IMPL,
-	[0x23] = ABS,
-	[0x24] = INDY,
-	[0x25] = ZM,
-	[0x26] = IMM,
-	[0x28] = IMPL,
-	[0x29] = ABS,
-	[0x2A] = ABS,
-	[0x2B] = ABS,
-	[0x2C] = IMPL,
-	[0x2E] = ABS,
+	[0x24] = ABS,
+	[0x25] = IND,
+	[0x26] = ZM,
+	[0x28] = IMM,
+	[0x29] = IMM,
+	[0x2A] = IMM,
+	[0x2C] = ABS,
+	[0x2D] = ZM,
+	[0x2E] = ZM,
 	[0x30] = ABS,
 	[0x31] = IMM,
 	[0x32] = IMPL,
-	[0x33] = ABS,
-	[0x34] = IND,
-	[0x35] = ZM,
-	[0x36] = ABS,
-	[0x38] = IMPL,
-	[0x39] = ZM,
-	[0x3A] = ZM,
-	[0x3B] = ZM,
-	[0x3C] = IMPL,
+	[0x34] = ABS,
+	[0x35] = IND,
+	[0x36] = ZM,
+	[0x38] = IMM,
+	[0x39] = ZMY,
+	[0x3A] = IMM,
+	[0x3C] = ABS,
+	[0x3D] = ZM,
 	[0x3E] = ZM,
 	[0x40] = ABS,
 	[0x41] = IMM,
 	[0x42] = IMPL,
-	[0x43] = ABS,
-	[0x44] = INDX,
-	[0x45] = ZM,
+	[0x44] = ABS,
+	[0x45] = IND,
 	[0x46] = ZM,
-	[0x48] = IMPL,
-	[0x49] = ZM,
-	[0x4A] = ZM,
-	[0x4B] = ZM,
-	[0x4C] = IMPL,
+	[0x48] = IMM,
+	[0x49] = ZMY,
+	[0x4A] = IMM,
+	[0x4C] = ABS,
+	[0x4D] = ZM,
 	[0x4E] = ZM,
 	[0x50] = ABS,
 	[0x51] = IMM,
 	[0x52] = IMPL,
-	[0x53] = ABS,
-	[0x54] = INDY,
-	[0x55] = ZM,
-	[0x56] = IND,
+	[0x54] = ABS,
+	[0x55] = IND,
+	[0x56] = ZM,
 	[0x58] = IMPL,
-	[0x59] = ZMX,
-	[0x5A] = ZMX,
-	[0x5B] = ZMY,
-	[0x5C] = IMPL,
-	[0x5E] = ZMX,
+	[0x59] = ZMY,
+	[0x5A] = IMM,
+	[0x5C] = INDY,
+	[0x5D] = INDX,
+	[0x5E] = ZM,
 	[0x60] = ABS,
 	[0x61] = IMM,
 	[0x62] = IMPL,
-	[0x63] = ABS,
-	[0x64] = ZM,
-	[0x65] = ZM,
-	[0x66] = INDX,
-	[0x68] = IMPL,
-	[0x69] = ZMX,
-	[0x6A] = ZMX,
-	[0x6B] = ZMY,
-	[0x6C] = IMPL,
-	[0x6E] = ZMX,
+	[0x64] = ABS,
+	[0x65] = IND,
+	[0x66] = ZM,
+	[0x68] = IMM,
+	[0x69] = ZMY,
+	[0x6A] = IMPL,
+	[0x6C] = INDY,
+	[0x6D] = INDX,
+	[0x6E] = ZM,
 	[0x70] = ABS,
 	[0x71] = IMM,
 	[0x72] = IMPL,
-	[0x73] = ABS,
-	[0x74] = ZM,
-	[0x75] = ZM,
-	[0x76] = INDY,
+	[0x74] = ABS,
+	[0x75] = IND,
+	[0x76] = ZM,
 	[0x78] = IMPL,
-	[0x79] = ZMY,
-	[0x7A] = IND,
-	[0x7B] = IND,
-	[0x7C] = IMPL,
-	[0x7E] = ZMY,
+	[0x79] = ZMX,
+	[0x7A] = IMPL,
+	[0x7C] = INDY,
+	[0x7D] = INDX,
+	[0x7E] = ZM,
 	[0x80] = ABS,
 	[0x81] = IMM,
 	[0x82] = IMPL,
-	[0x83] = ABS,
-	[0x84] = ZM,
-	[0x85] = ZM,
-	[0x86] = IMPL,
+	[0x84] = ABS,
+	[0x85] = IND,
+	[0x86] = ZM,
 	[0x88] = IMPL,
-	[0x89] = ZMY,
-	[0x8A] = IND,
-	[0x8B] = IND,
-	[0x8C] = IMPL,
-	[0x8E] = ZMY,
+	[0x89] = ZMX,
+	[0x8A] = IMPL,
+	[0x8C] = INDY,
+	[0x8D] = INDX,
+	[0x8E] = ZM,
 	[0x90] = ABS,
 	[0x91] = IMM,
 	[0x92] = IMPL,
-	[0x93] = ABS,
-	[0x94] = ZM,
-	[0x95] = ZM,
-	[0x96] = IMPL,
+	[0x94] = ABS,
+	[0x95] = IND,
+	[0x96] = ZM,
 	[0x98] = IMPL,
-	[0x99] = IND,
-	[0x9A] = INDX,
-	[0x9B] = INDY,
-	[0x9C] = IMM,
-	[0x9E] = IND,
+	[0x99] = ZMX,
+	[0x9A] = IMPL,
+	[0x9C] = INDY,
+	[0x9D] = INDX,
+	[0x9E] = ZM,
 	[0xA0] = ABS,
 	[0xA1] = IMM,
 	[0xA2] = IMPL,
-	[0xA3] = ABS,
-	[0xA4] = ZM,
-	[0xA5] = ZM,
-	[0xA6] = IMPL,
+	[0xA4] = ABS,
+	[0xA5] = IND,
+	[0xA6] = ZM,
 	[0xA8] = IMPL,
-	[0xA9] = IND,
-	[0xAA] = INDX,
-	[0xAB] = INDY,
-	[0xAC] = IMM,
-	[0xAE] = IND,
+	[0xA9] = ZMX,
+	[0xAA] = IMPL,
+	[0xAC] = INDY,
+	[0xAD] = INDX,
+	[0xAE] = IMPL,
 	[0xB0] = IMPL,
 	[0xB1] = IMM,
 	[0xB2] = IMPL,
-	[0xB3] = ABS,
-	[0xB4] = ZM,
-	[0xB5] = ZM,
-	[0xB6] = IMPL,
+	[0xB4] = ABS,
+	[0xB5] = IND,
+	[0xB6] = ZM,
 	[0xB8] = IMPL,
-	[0xB9] = INDX,
-	[0xBA] = IMM,
-	[0xBB] = IMM,
-	[0xBC] = IMM,
-	[0xBE] = INDX,
+	[0xB9] = IMM,
+	[0xBA] = IMPL,
+	[0xBC] = ABS,
+	[0xBD] = ZM,
+	[0xBE] = IND,
 	[0xC0] = IMPL,
-	[0xC1] = IMPL,
-	[0xC2] = IMPL,
-	[0xC3] = ABS,
-	[0xC4] = ZM,
-	[0xC5] = ZM,
+	[0xC1] = IMM,
+	[0xC4] = ABS,
+	[0xC5] = IMPL,
+	[0xC6] = ZM,
 	[0xC8] = IMPL,
-	[0xC9] = INDX,
-	[0xCA] = ABS,
-	[0xCB] = ABS,
-	[0xCC] = IMM,
-	[0xCE] = INDX,
-	[0xD0] = ZM,
-	[0xD1] = IMPL,
-	[0xD2] = IMPL,
-	[0xD3] = ABS,
-	[0xD4] = ZM,
-	[0xD5] = ZM,
-	[0xD9] = INDY,
-	[0xDA] = ZM,
-	[0xDB] = ZM,
-	[0xDC] = IMM,
-	[0xDE] = INDY,
-	[0xE0] = ABS,
+	[0xC9] = ZMY,
+	[0xCA] = IMPL,
+	[0xCC] = ABS,
+	[0xCD] = ZM,
+	[0xCE] = IND,
+	[0xD0] = IMPL,
+	[0xD1] = IMM,
+	[0xD4] = ABS,
+	[0xD5] = IMPL,
+	[0xD6] = ZM,
+	[0xD8] = IMPL,
+	[0xD9] = ZMY,
+	[0xDA] = IMPL,
+	[0xDC] = ABS,
+	[0xDD] = ZM,
+	[0xE0] = IMM,
 	[0xE1] = IMM,
-	[0xE2] = IMPL,
-	[0xE3] = ABS,
-	[0xE5] = ZM,
+	[0xE4] = ABS,
+	[0xE5] = IMPL,
+	[0xE6] = ZM,
 	[0xE8] = IMPL,
-	[0xE9] = INDY,
-	[0xEA] = IND,
-	[0xEB] = IND,
-	[0xEC] = IMM,
-	[0xEE] = INDY,
-	[0xF0] = IMPL,
-	[0xF1] = IND,
-	[0xF3] = INDX,
-	[0xF5] = INDY,
-	[0xF8] = IMPL,
-	[0xFA] = INDX,
-	[0xFB] = INDY,
-	[0xFC] = IMM
+	[0xE9] = ZMX,
+	[0xEA] = IMPL,
+	[0xEC] = ABS,
+	[0xED] = ZM,
+	[0xEE] = IMPL,
+	[0xF1] = IMM,
+	[0xF2] = IMPL,
+	[0xF4] = ABS,
+	[0xF5] = IMPL,
+	[0xF6] = ZM,
+	[0xF9] = ZMX,
+	[0xFC] = ABS,
+	[0xFD] = ZM,
+	[0xFE] = IMPL
 };
 
 static const char *mne[OPNUM] = {
 	[ 0] = "CPS",
 	[ 1] = "ADC",
 	[ 2] = "AAB",
-	[ 3] = "JMP",
-	[ 4] = "PHB",
-	[ 5] = "PHP",
-	[ 6] = "LDA",
-	[ 7] = "LDY",
-	[ 8] = "LDX",
-	[ 9] = "TAB",
-	[10] = "LDB",
-	[11] = "SBC",
-	[12] = "SAB",
-	[13] = "PLB",
-	[14] = "PLP",
-	[15] = "TBA",
-	[16] = "JSR",
-	[17] = "AND",
-	[18] = "ABA",
-	[19] = "CPB",
-	[20] = "STT",
-	[21] = "STA",
-	[22] = "STY",
-	[23] = "STX",
-	[24] = "TAY",
-	[25] = "STB",
-	[26] = "BPO",
-	[27] = "ORA",
-	[28] = "OAB",
-	[29] = "SEI",
-	[30] = "TYA",
-	[31] = "BNG",
-	[32] = "XOR",
-	[33] = "XAB",
-	[34] = "CLI",
-	[35] = "TAX",
-	[36] = "BCS",
-	[37] = "LSL",
-	[38] = "LLB",
-	[39] = "SEC",
-	[40] = "TXA",
-	[41] = "BCC",
-	[42] = "LSR",
-	[43] = "LRB",
-	[44] = "CLC",
-	[45] = "TYX",
-	[46] = "BEQ",
-	[47] = "ROL",
-	[48] = "RLB",
-	[49] = "SSP",
-	[50] = "TXY",
-	[51] = "BNE",
-	[52] = "ROR",
-	[53] = "RRB",
-	[54] = "INY",
-	[55] = "CSP",
-	[56] = "TSX",
-	[57] = "BVS",
-	[58] = "MUL",
-	[59] = "MAB",
-	[60] = "DEY",
-	[61] = "SEV",
-	[62] = "TXS",
-	[63] = "BVC",
-	[64] = "DIV",
-	[65] = "DAB",
-	[66] = "INX",
-	[67] = "CLV",
-	[68] = "PHY",
-	[69] = "RTS",
-	[70] = "CMP",
-	[71] = "CAB",
-	[72] = "DEX",
-	[73] = "ENT",
-	[74] = "CPY",
-	[75] = "CPX",
-	[76] = "PLY",
-	[77] = "RTI",
-	[78] = "INC",
-	[79] = "IAB",
-	[80] = "WAI",
-	[81] = "PHX",
-	[82] = "DEC",
-	[83] = "DBA",
-	[84] = "PLX",
-	[85] = "JSL",
+	[ 3] = "PHP",
+	[ 4] = "CPB",
+	[ 5] = "PHB",
+	[ 6] = "DEC",
+	[ 7] = "JMP",
+	[ 8] = "SBC",
+	[ 9] = "SAB",
+	[10] = "ENT",
+	[11] = "CPY",
+	[12] = "PLB",
+	[13] = "INC",
+	[14] = "JSR",
+	[15] = "JSL",
+	[16] = "AND",
+	[17] = "ABA",
+	[18] = "PLP",
+	[19] = "CPX",
+	[20] = "PHY",
+	[21] = "BPO",
+	[22] = "ORA",
+	[23] = "OAB",
+	[24] = "STT",
+	[25] = "PLY",
+	[26] = "BNG",
+	[27] = "XOR",
+	[28] = "XAB",
+	[29] = "PHA",
+	[30] = "PHX",
+	[31] = "BCS",
+	[32] = "LSL",
+	[33] = "LLB",
+	[34] = "CLC",
+	[35] = "PLX",
+	[36] = "BCC",
+	[37] = "LSR",
+	[38] = "LRB",
+	[39] = "PLA",
+	[40] = "TAB",
+	[41] = "BEQ",
+	[42] = "ROL",
+	[43] = "RLB",
+	[44] = "SEC",
+	[45] = "TBA",
+	[46] = "BNE",
+	[47] = "ROR",
+	[48] = "RRB",
+	[49] = "DEY",
+	[50] = "TAY",
+	[51] = "BVS",
+	[52] = "MUL",
+	[53] = "MAB",
+	[54] = "CLI",
+	[55] = "TYA",
+	[56] = "BVC",
+	[57] = "DIV",
+	[58] = "DAB",
+	[59] = "INY",
+	[60] = "TAX",
+	[61] = "RTS",
+	[62] = "RTL",
+	[63] = "CMP",
+	[64] = "CAB",
+	[65] = "SEI",
+	[66] = "LDX",
+	[67] = "TXA",
+	[68] = "RTI",
+	[69] = "LDA",
+	[70] = "DEX",
+	[71] = "CLV",
+	[72] = "TYX",
+	[73] = "STA",
+	[74] = "TSX",
+	[75] = "LDB",
+	[76] = "INX",
+	[77] = "WAI",
+	[78] = "TXY",
+	[79] = "STB",
+	[80] = "TXS",
+	[81] = "LDY",
+	[82] = "BRK",
+	[83] = "NOP",
+	[84] = "STY",
+	[85] = "DEB",
 	[86] = "ASR",
 	[87] = "ARB",
-	[88] = "NOP",
-	[89] = "PHA",
-	[90] = "RTL",
-	[91] = "BRK",
-	[92] = "PLA"
+	[88] = "STX",
+	[89] = "INB"
 };
 
 static const char *instdesc[OPNUM] = {
 	[ 0] = "Clears the Processor Status register.",
 	[ 1] = "ADd accumulator, with operand, Carry if needed.",
 	[ 2] = "Add Accumulator, with B, carry if needed.",
-	[ 3] = "JuMP to the address specified.",
-	[ 4] = "PusH the number of bytes specified, from the B register to the stack.",
-	[ 5] = "PusH the number of bytes specified, from the Processor status register to the stack.",
-	[ 6] = "LoaD the value from the operand, to the Accumulator.",
-	[ 7] = "LoaD the value from the operand, to the Y register.",
-	[ 8] = "LoaD the value from the operand, to the X register.",
-	[ 9] = "Transfer the value from the Accumulator, to the B register.",
-	[10] = "LoaD the value from the operand, to the B register.",
-	[11] = "SuBtract accumulator, with operand, Carry if needed",
-	[12] = "Subtract Accumulator, with B, carry if needed.",
-	[13] = "PuLl the number of bytes specified, from the stack, to the B register.",
-	[14] = "PuLl the number of bytes specified, from the stack, to the Processor status register.",
-	[15] = "Transfer the value from the Y register, to the Accumulator.",
-	[16] = "Jump to a SubRoutine.",
-	[17] = "Bitwise AND accumulator, with operand.",
-	[18] = "Bitwise AND Accumulator, with B.",
-	[19] = "ComPare the B register, with operand.",
-	[20] = "STart a Thread.",
-	[21] = "STore the value from the Accumulator, in memory.",
-	[22] = "STore the value from the Y register, in memory.",
-	[23] = "STore the value from the X register, in memory.",
-	[24] = "Transfer the value from the Accumulator, to the Y register.",
-	[25] = "STore the value from the B register, in memory.",
-	[26] = "Branch if POsitive.",
-	[27] = "Bitwise OR Accumulator, with operand.",
-	[28] = "Bitwise OR Accumulator, with B.",
-	[29] = "SEt the Interrupt flag.",
-	[30] = "Transfer the value from the Y register, to the Accumulator.",
-	[31] = "Branch if NeGative.",
-	[32] = "Bitwise XOR Accumulator, with operand.",
-	[33] = "Bitwise XOR Accumulator, with B.",
-	[34] = "CLear the Interrupt flag.",
-	[35] = "Transfer the value from the Accumulator, to the X register.",
-	[36] = "Branch if the Carry flag is Set.",
-	[37] = "Logical Shift Left accumulator, with operand.",
-	[38] = "Logical Shift Left accumulator, with B.",
-	[39] = "SEt the Carry flag.",
-	[40] = "Transfer the value from the X register, to the Accumulator.",
-	[41] = "Branch if the Carry flag has been Cleared.",
-	[42] = "Logical Shift Right accumulator, with operand.",
-	[43] = "Logical Shift Right accumulator, with B.",
-	[44] = "CLear the Carry flag.",
-	[45] = "Transfer the value from the Y register, to the X register.",
-	[46] = "Branch if EQual (the zero flag has been set).",
-	[47] = "ROtate Left accumulator, with operand.",
-	[48] = "Rotate Left accumulator, with B.",
-	[49] = "Set the Stack Protection flag.",
-	[50] = "Transfer the value from the X register, to the Y register.",
-	[51] = "Branch if Not Equal (the zero flag has been cleared).",
-	[52] = "ROtate Right accumulator, with operand.",
-	[53] = "Rotate Right accumulator, with B.",
-	[54] = "INcrement the Y register.",
-	[55] = "Clear the Stack Protection flag.",
-	[56] = "Transfer the value from the Stack pointer, to the X register.",
-	[57] = "Branch if the oVerflow flag is Set.",
-	[58] = "MULtiply accumulator, with operand.",
-	[59] = "Multiply Accumulator, with B.",
-	[60] = "DEcrement the Y register.",
-	[61] = "SEt the oVerflow flag.",
-	[62] = "Transfer the value from the X register, to the Stack pointer.",
-	[63] = "Branch if the oVerflow flag has been Cleared.",
-	[64] = "DIVide accumulator, with operand, and put the remainder into the B register.",
-	[65] = "Divide Accumulator, with B, and put the remainder into the X register.",
-	[66] = "INcrement the X register.",
-	[67] = "CLear the oVerflow flag.",
-	[68] = "PusH the number of bytes specified, from the Y register to the stack.",
-	[69] = "ReTurn from a Subroutine.",
-	[70] = "CoMPare acumulator, with operand.",
-	[71] = "Compare Accumulator, with B.",
-	[72] = "DEcrement the X register.",
-	[73] = "ENd a Thread.",
-	[74] = "ComPare the Y register, with operand.",
-	[75] = "ComPare the X register, with operand.",
-	[76] = "PuLl the number of bytes specified, from the stack, to the Y register.",
-	[77] = "ReTurn from an Interrupt.",
-	[78] = "INCrement accumulator, or memory.",
-	[79] = "Increment Accumulator, and B.",
-	[80] = "WAIt for an interrupt.",
-	[81] = "PusH the number of bytes specified, from the X register to the stack.",
-	[82] = "DECrement accumulator, or memory.",
-	[83] = "Decrement Accumulator, and B.",
-	[84] = "PuLl the number of bytes specified, from the stack, to the X register.",
-	[85] = "Jump to a Subroutine, Long address.",
+	[ 3] = "PusH the number of bytes specified, from the Processor status register to the stack.",
+	[ 4] = "ComPare the B register, with operand.",
+	[ 5] = "PusH the number of bytes specified, from the B register to the stack.",
+	[ 6] = "DECrement accumulator, or memory.",
+	[ 7] = "JuMP to the address specified.",
+	[ 8] = "SuBtract accumulator, with operand, Carry if needed",
+	[ 9] = "Subtract Accumulator, with B, carry if needed.",
+	[10] = "ENd a Thread.",
+	[11] = "ComPare the Y register, with operand.",
+	[12] = "PuLl the number of bytes specified, from the stack, to the B register.",
+	[13] = "INCrement accumulator, or memory.",
+	[14] = "Jump to a SubRoutine.",
+	[15] = "Jump to a Subroutine, Long address.",
+	[16] = "Bitwise AND accumulator, with operand.",
+	[17] = "Bitwise AND Accumulator, with B.",
+	[18] = "PuLl the number of bytes specified, from the stack, to the Processor status register.",
+	[19] = "ComPare the X register, with operand.",
+	[20] = "PusH the number of bytes specified, from the Y register to the stack.",
+	[21] = "Branch if POsitive.",
+	[22] = "Bitwise OR Accumulator, with operand.",
+	[23] = "Bitwise OR Accumulator, with B.",
+	[24] = "STart a Thread.",
+	[25] = "PuLl the number of bytes specified, from the stack, to the Y register.",
+	[26] = "Branch if NeGative.",
+	[27] = "Bitwise XOR Accumulator, with operand.",
+	[28] = "Bitwise XOR Accumulator, with B.",
+	[29] = "PusH the number of bytes specified, from the Accumulator to the stack.",
+	[30] = "PusH the number of bytes specified, from the X register to the stack.",
+	[31] = "Branch if the Carry flag is Set.",
+	[32] = "Logical Shift Left accumulator, with operand.",
+	[33] = "Logical Shift Left accumulator, with B.",
+	[34] = "CLear the Carry flag.",
+	[35] = "PuLl the number of bytes specified, from the stack, to the X register.",
+	[36] = "Branch if the Carry flag has been Cleared.",
+	[37] = "Logical Shift Right accumulator, with operand.",
+	[38] = "Logical Shift Right accumulator, with B.",
+	[39] = "PuLl the number of bytes specified, from the stack, to the Accumulator.",
+	[40] = "Transfer the value from the Accumulator, to the B register.",
+	[41] = "Branch if EQual (the zero flag has been set).",
+	[42] = "ROtate Left accumulator, with operand.",
+	[43] = "Rotate Left accumulator, with B.",
+	[44] = "SEt the Carry flag.",
+	[45] = "Transfer the value from the Y register, to the Accumulator.",
+	[46] = "Branch if Not Equal (the zero flag has been cleared)",
+	[47] = "ROtate Right accumulator, with operand.",
+	[48] = "Rotate Right accumulator, with B.",
+	[49] = "DEcrement the Y register.",
+	[50] = "Transfer the value from the Accumulator, to the Y register.",
+	[51] = "Branch if the oVerflow flag is Set.",
+	[52] = "MULtiply accumulator, with operand.",
+	[53] = "Multiply Accumulator, with B.",
+	[54] = "CLear the Interrupt flag.",
+	[55] = "Transfer the value from the Y register, to the Accumulator.",
+	[56] = "Branch if the oVerflow flag has been Cleared.",
+	[57] = "DIVide accumulator, with operand, and put the remainder into the B register.",
+	[58] = "Divide Accumulator, with B, and put the remainder into the X register.",
+	[59] = "INcrement the Y register.",
+	[60] = "Transfer the value from the Accumulator, to the X register.",
+	[61] = "ReTurn from a Subroutine.",
+	[62] = "ReTurn from subroutine, Long address.",
+	[63] = "CoMPare acumulator, with operand.",
+	[64] = "Compare Accumulator, with B.",
+	[65] = "SEt the Interrupt flag.",
+	[66] = "LoaD the value from the operand, to the X register.",
+	[67] = "Transfer the value from the X register, to the Accumulator.",
+	[68] = "ReTurn from an Interrupt.",
+	[69] = "LoaD the value from the operand, to the Accumulator.",
+	[70] = "DEcrement the X register.",
+	[71] = "CLear the oVerflow flag.",
+	[72] = "Transfer the value from the Y register, to the X register.",
+	[73] = "STore the value from the Accumulator, in memory.",
+	[74] = "Transfer the value from the Stack pointer, to the X register.",
+	[75] = "LoaD the value from the operand, to the B register.",
+	[76] = "INcrement the X register.",
+	[77] = "WAIt for an interrupt",
+	[78] = "Transfer the value from the X register, to the Y register.",
+	[79] = "STore the value from the B register, in memory.",
+	[80] = "Transfer the value from the X register, to the Stack pointer.",
+	[81] = "LoaD the value from the operand, to the Y register.",
+	[82] = "BReaKpoint",
+	[83] = "NO oPeration",
+	[84] = "STore the value from the Y register, in memory.",
+	[85] = "DEcrement the B register.",
 	[86] = "Arithmetic Shift Right accumulator, with operand.",
 	[87] = "Arithmetic shift Right accumulator, with B.",
-	[88] = "NO oPeration.",
-	[89] = "PusH the number of bytes specified, from the Accumulator to the stack.",
-	[90] = "ReTurn from subroutine, Long address.",
-	[91] = "BReaKpoint.",
-	[92] = "PuLl the number of bytes specified, from the stack, to the Accumulator."
+	[88] = "STore the value from the X register, in memory.",
+	[89] = "INcrement the B register."
 };
 
 static const char *opname[0x100] = {
 	[0x00] = "CPS",
 	[0x01] = "ADC #",
 	[0x02] = "AAB",
-	[0x03] = "ADC a",
-	[0x04] = "JMP (ind)",
-	[0x05] = "ADC zm",
-	[0x06] = "PHB",
-	[0x08] = "PHP",
-	[0x09] = "LDA #",
-	[0x0A] = "LDY #",
-	[0x0B] = "LDX #",
-	[0x0C] = "TAB",
-	[0x0E] = "LDB #",
+	[0x04] = "ADC a",
+	[0x05] = "LDA ind",
+	[0x06] = "ADC zm",
+	[0x08] = "PHP #",
+	[0x09] = "CPB #",
+	[0x0A] = "PHB #",
+	[0x0C] = "DEC a",
+	[0x0D] = "DEC zm",
+	[0x0E] = "JMP zm",
 	[0x10] = "JMP a",
 	[0x11] = "SBC #",
 	[0x12] = "SAB",
-	[0x13] = "SBC a",
-	[0x14] = "JMP (ind, x)",
-	[0x15] = "SBC zm",
-	[0x16] = "PLB",
-	[0x18] = "PLP",
-	[0x19] = "LDA a",
-	[0x1A] = "LDY a",
-	[0x1B] = "LDX a",
-	[0x1C] = "TBA",
-	[0x1E] = "LDB a",
-	[0x20] = "JSR",
+	[0x14] = "SBC a",
+	[0x15] = "STA ind",
+	[0x16] = "SBC zm",
+	[0x18] = "ENT #",
+	[0x19] = "CPY #",
+	[0x1A] = "PLB #",
+	[0x1C] = "INC a",
+	[0x1D] = "INC zm",
+	[0x1E] = "JSR zm",
+	[0x20] = "JSL a",
 	[0x21] = "AND #",
 	[0x22] = "ABA",
-	[0x23] = "AND a",
-	[0x24] = "JMP (ind), y",
-	[0x25] = "AND zm",
-	[0x26] = "CPB #",
-	[0x28] = "STT",
-	[0x29] = "STA a",
-	[0x2A] = "STY a",
-	[0x2B] = "STX a",
-	[0x2C] = "TAY",
-	[0x2E] = "STB a",
-	[0x30] = "BPO",
+	[0x24] = "AND a",
+	[0x25] = "CMP ind",
+	[0x26] = "AND zm",
+	[0x28] = "PLP #",
+	[0x29] = "CPX #",
+	[0x2A] = "PHY #",
+	[0x2C] = "CPB a",
+	[0x2D] = "CPB zm",
+	[0x2E] = "BPO zm",
+	[0x30] = "BPO a",
 	[0x31] = "ORA #",
 	[0x32] = "OAB",
-	[0x33] = "ORA a",
-	[0x34] = "JSR (ind)",
-	[0x35] = "ORA zm",
-	[0x36] = "CPB a",
-	[0x38] = "SEI",
-	[0x39] = "LDA zm",
-	[0x3A] = "LDY zm",
-	[0x3B] = "LDX zm",
-	[0x3C] = "TYA",
-	[0x3E] = "LDB zm",
-	[0x40] = "BNG",
+	[0x34] = "ORA a",
+	[0x35] = "LDB ind",
+	[0x36] = "ORA zm",
+	[0x38] = "STT #",
+	[0x39] = "LDA zmy",
+	[0x3A] = "PLY #",
+	[0x3C] = "CPX a",
+	[0x3D] = "CPY zm",
+	[0x3E] = "BNG zm",
+	[0x40] = "BNG a",
 	[0x41] = "XOR #",
 	[0x42] = "XAB",
-	[0x43] = "XOR a",
-	[0x44] = "JSR (ind, x)",
-	[0x45] = "XOR zm",
-	[0x46] = "CPB zm",
-	[0x48] = "CLI",
-	[0x49] = "STA zm",
-	[0x4A] = "STY zm",
-	[0x4B] = "STX zm",
-	[0x4C] = "TAX",
-	[0x4E] = "STB zm",
-	[0x50] = "BCS",
+	[0x44] = "XOR a",
+	[0x45] = "STB ind",
+	[0x46] = "XOR zm",
+	[0x48] = "PHA #",
+	[0x49] = "STA zmy",
+	[0x4A] = "PHX #",
+	[0x4C] = "CPY a",
+	[0x4D] = "CPX zm",
+	[0x4E] = "BCS zm",
+	[0x50] = "BCS a",
 	[0x51] = "LSL #",
 	[0x52] = "LLB",
-	[0x53] = "LSL a",
-	[0x54] = "JSR (ind), y",
-	[0x55] = "LSL zm",
-	[0x56] = "CPB (ind)",
-	[0x58] = "SEC",
-	[0x59] = "LDA zm, x",
-	[0x5A] = "LDY zm, x",
-	[0x5B] = "LDX zm, y",
-	[0x5C] = "TXA",
-	[0x5E] = "LDB zm, x",
-	[0x60] = "BCC",
+	[0x54] = "LSL a",
+	[0x55] = "CPB ind",
+	[0x56] = "LSL zm",
+	[0x58] = "CLC",
+	[0x59] = "LDB zmy",
+	[0x5A] = "PLX #",
+	[0x5C] = "LDA iny",
+	[0x5D] = "LDA inx",
+	[0x5E] = "BCC zm",
+	[0x60] = "BCC a",
 	[0x61] = "LSR #",
 	[0x62] = "LRB",
-	[0x63] = "LSR a",
-	[0x64] = "BPO zm",
-	[0x65] = "LSR zm",
-	[0x66] = "CPB (ind, x)",
-	[0x68] = "CLC",
-	[0x69] = "STA zm, x",
-	[0x6A] = "STY zm, x",
-	[0x6B] = "STX zm, y",
-	[0x6C] = "TYX",
-	[0x6E] = "STB zm, x",
-	[0x70] = "BEQ",
+	[0x64] = "LSR a",
+	[0x65] = "LDY ind",
+	[0x66] = "LSR zm",
+	[0x68] = "PLA #",
+	[0x69] = "STB zmy",
+	[0x6A] = "TAB",
+	[0x6C] = "STA iny",
+	[0x6D] = "STA inx",
+	[0x6E] = "BEQ zm",
+	[0x70] = "BEQ a",
 	[0x71] = "ROL #",
 	[0x72] = "RLB",
-	[0x73] = "ROL a",
-	[0x74] = "BNG zm",
-	[0x75] = "ROL zm",
-	[0x76] = "CPB (ind), y",
-	[0x78] = "SSP",
-	[0x79] = "LDA zm, y",
-	[0x7A] = "LDY (ind)",
-	[0x7B] = "LDX (ind)",
-	[0x7C] = "TXY",
-	[0x7E] = "LDB zm, y",
-	[0x80] = "BNE",
+	[0x74] = "ROL a",
+	[0x75] = "STY ind",
+	[0x76] = "ROL zm",
+	[0x78] = "SEC",
+	[0x79] = "LDA zmx",
+	[0x7A] = "TBA",
+	[0x7C] = "CMP iny",
+	[0x7D] = "CMP inx",
+	[0x7E] = "BNE zm",
+	[0x80] = "BNE a",
 	[0x81] = "ROR #",
 	[0x82] = "RRB",
-	[0x83] = "ROR a",
-	[0x84] = "BCS zm",
-	[0x85] = "ROR zm",
-	[0x86] = "INY",
-	[0x88] = "CSP",
-	[0x89] = "STA zm, y",
-	[0x8A] = "STY (ind)",
-	[0x8B] = "STX (ind)",
-	[0x8C] = "TSX",
-	[0x8E] = "STB zm, y",
-	[0x90] = "BVS",
+	[0x84] = "ROR a",
+	[0x85] = "CPY ind",
+	[0x86] = "ROR zm",
+	[0x88] = "DEY",
+	[0x89] = "STA zmx",
+	[0x8A] = "TAY",
+	[0x8C] = "LDB iny",
+	[0x8D] = "LDB inx",
+	[0x8E] = "BVS zm",
+	[0x90] = "BVS a",
 	[0x91] = "MUL #",
 	[0x92] = "MAB",
-	[0x93] = "MUL a",
-	[0x94] = "BCC zm",
-	[0x95] = "MUL zm",
-	[0x96] = "DEY",
-	[0x98] = "SEV",
-	[0x99] = "LDA (ind)",
-	[0x9A] = "LDY (ind, x)",
-	[0x9B] = "LDX (ind), y",
-	[0x9C] = "TXS",
-	[0x9E] = "LDB (ind)",
-	[0xA0] = "BVC",
+	[0x94] = "MUL a",
+	[0x95] = "LDX ind",
+	[0x96] = "MUL zm",
+	[0x98] = "CLI",
+	[0x99] = "LDB zmx",
+	[0x9A] = "TYA",
+	[0x9C] = "STB iny",
+	[0x9D] = "STB inx",
+	[0x9E] = "BVC zm",
+	[0xA0] = "BVC a",
 	[0xA1] = "DIV #",
 	[0xA2] = "DAB",
-	[0xA3] = "DIV a",
-	[0xA4] = "BEQ zm",
-	[0xA5] = "DIV zm",
-	[0xA6] = "INX",
-	[0xA8] = "CLV",
-	[0xA9] = "STA (ind)",
-	[0xAA] = "STY (ind, x)",
-	[0xAB] = "STX (ind), y",
-	[0xAC] = "PHY",
-	[0xAE] = "STB (ind)",
-	[0xB0] = "RTS",
+	[0xA4] = "DIV a",
+	[0xA5] = "STX ind",
+	[0xA6] = "DIV zm",
+	[0xA8] = "INY",
+	[0xA9] = "STB zmx",
+	[0xAA] = "TAX",
+	[0xAC] = "CPB iny",
+	[0xAD] = "CPB inx",
+	[0xAE] = "RTS",
+	[0xB0] = "RTL",
 	[0xB1] = "CMP #",
 	[0xB2] = "CAB",
-	[0xB3] = "CMP a",
-	[0xB4] = "BNE zm",
-	[0xB5] = "CMP zm",
-	[0xB6] = "DEX",
-	[0xB8] = "ENT",
-	[0xB9] = "LDA (ind, x)",
-	[0xBA] = "CPY #",
-	[0xBB] = "CPX #",
-	[0xBC] = "PLY",
-	[0xBE] = "LDB (ind, x)",
+	[0xB4] = "CMP a",
+	[0xB5] = "CPX ind",
+	[0xB6] = "CMP zm",
+	[0xB8] = "SEI",
+	[0xB9] = "LDX #",
+	[0xBA] = "TXA",
+	[0xBC] = "LDX a",
+	[0xBD] = "LDX zm",
+	[0xBE] = "JSR ind",
 	[0xC0] = "RTI",
-	[0xC1] = "INC A",
-	[0xC2] = "IAB",
-	[0xC3] = "INC a",
-	[0xC4] = "BVS zm",
-	[0xC5] = "INC zm",
-	[0xC8] = "WAI",
-	[0xC9] = "STA (ind, x)",
-	[0xCA] = "CPY a",
-	[0xCB] = "CPX a",
-	[0xCC] = "PHX",
-	[0xCE] = "STB (ind, x)",
-	[0xD0] = "JMP zm",
-	[0xD1] = "DEC A",
-	[0xD2] = "DBA",
-	[0xD3] = "DEC a",
-	[0xD4] = "BVC zm",
-	[0xD5] = "DEC zm",
-	[0xD9] = "LDA (ind), y",
-	[0xDA] = "CPY zm",
-	[0xDB] = "CPX zm",
-	[0xDC] = "PLX",
-	[0xDE] = "LDB (ind), y",
-	[0xE0] = "JSL",
-	[0xE1] = "ASR #",
-	[0xE2] = "ARB",
-	[0xE3] = "ASR a",
-	[0xE5] = "ASR zm",
-	[0xE8] = "NOP",
-	[0xE9] = "STA (ind), y",
-	[0xEA] = "CPY (ind)",
-	[0xEB] = "CPX (ind)",
-	[0xEC] = "PHA",
-	[0xEE] = "STB (ind), y",
-	[0xF0] = "RTL",
-	[0xF1] = "CMP (ind)",
-	[0xF3] = "CMP (ind, x)",
-	[0xF5] = "CMP (ind), y",
-	[0xF8] = "BRK",
-	[0xFA] = "CPY (ind, x)",
-	[0xFB] = "CPX (ind), y",
-	[0xFC] = "PLA"
+	[0xC1] = "LDA #",
+	[0xC4] = "LDA a",
+	[0xC5] = "DEX",
+	[0xC6] = "LDA zm",
+	[0xC8] = "CLV",
+	[0xC9] = "LDX zmy",
+	[0xCA] = "TYX",
+	[0xCC] = "STA a",
+	[0xCD] = "STA zm",
+	[0xCE] = "JMP ind",
+	[0xD0] = "TSX",
+	[0xD1] = "LDB #",
+	[0xD4] = "LDB a",
+	[0xD5] = "INX",
+	[0xD6] = "LDB zm",
+	[0xD8] = "WAI",
+	[0xD9] = "STX zmy",
+	[0xDA] = "TXY",
+	[0xDC] = "STB a",
+	[0xDD] = "STB zm",
+	[0xE0] = "TXS #",
+	[0xE1] = "LDY #",
+	[0xE4] = "LDY a",
+	[0xE5] = "DEC A",
+	[0xE6] = "LDY zm",
+	[0xE8] = "BRK",
+	[0xE9] = "LDY zmx",
+	[0xEA] = "NOP",
+	[0xEC] = "STY a",
+	[0xED] = "STY zm",
+	[0xEE] = "DEB",
+	[0xF1] = "ASR #",
+	[0xF2] = "ARB",
+	[0xF4] = "ASR a",
+	[0xF5] = "INC A",
+	[0xF6] = "ASR zm",
+	[0xF9] = "STY zmx",
+	[0xFC] = "STX a",
+	[0xFD] = "STX zm",
+	[0xFE] = "INB"
 };
 
 extern int asmmon();