Added support for Indirect addressing modes, and allow

for use of the B register as an operand, for ALU based
instructions.

This allows for both low code size, and high
performance.
This means we can save upto 9 bytes, by just using
the B register for ALU operations, rather than using a
memory address.
The indirect addressing modes, give Sux the abillity
to now use pointers.

Hope you guys have a Merry Christmas!
From mr b0nk 500 <b0nk@b0nk.xyz>

1 files changed, 198 insertions, 150 deletions

diff --git a/opcode.h b/opcode.h
index a3775db..3e754c2 100644
--- a/opcode.h
+++ b/opcode.h
@@ -3,9 +3,11 @@
 #include <stdlib.h>
 #include <unistd.h>
 
-#define OPNAME(opcode) [opcode] = #opcode /* Get name of Opcode, for dissambly. */
+#define OPNAME(opcode) [opcode] = #opcode /* Get name of Opcode, for disassembly. */
 #define CPS 0x00 /* Clear Processor Status. */
 #define ADC 0x01 /* ADd with Carry. */
+#define AAB 0x02 /* Add Accumulator with carry by B register. */
+#define PHB 0x06 /* PusH B register to stack. */
 #define PHP 0x08 /* PusH Processor status to stack. */
 #define PHA 0x09 /* PusH Accumulator to stack. */
 #define PHY 0x0A /* PusH Y register to stack. */
@@ -15,6 +17,8 @@
 #define TYX 0x0E /* Transfer Y to X. */
 #define JMP 0x10 /* JuMP to memory location. */
 #define SBC 0x11 /* SuBtract with Carry. */
+#define SAB 0x12 /* Subtract Accumulator with carry by B register. */
+#define PLB 0x16 /* PuLl B register to stack. */
 #define PLP 0x18 /* PuLl Processor status from stack. */
 #define PLA 0x19 /* PuLl Accumulator from stack. */
 #define PLY 0x1A /* PuLl Y register from stack. */
@@ -24,74 +28,72 @@
 #define TXY 0x1E /* Transfer X to Y. */
 #define JSR 0x20 /* Jump to SubRoutine. */
 #define AND 0x21 /* bitwise AND with accumulator. */
-#define ANY 0x22 /* bitwise ANd with Y register.*/
-#define AAY 0x23 /* bitwise And with Accumulator, and Y register. */
-#define ANX 0x24 /* bitwise ANd with X register. */
-#define AAX 0x25 /* bitwise And with Accumulator, and X register. */
+#define ABA 0x22 /* bitwise And with Accumulator, and B register. */
+#define TAB 0x26 /* Transfer Accumulator to B.  */
 #define STT 0x28 /* STart Threads. */
-#define TAB 0x2C /* Transfer Accumulator to B.  */
+#define CPY 0x2A /* ComPare Y register. */
+#define CPX 0x2C /* ComPare X register. */
 #define TSX 0x2E /* Transfer Stack pointer to X. */
 #define BPO 0x30 /* Branch if POsitive. */
 #define ORA 0x31 /* bitwise OR with Accumulator. */
-#define ORY 0x32 /* bitwise OR with Y register. */
-#define OAY 0x33 /* bitwise Or with Accumulator, and Y register. */
-#define ORX 0x34 /* bitwise OR with X register. */
-#define OAX 0x35 /* bitwise Or with Accumulator, and X register. */
+#define OAB 0x32 /* bitwise Or with Accumulator, and B register. */
+#define TBA 0x36 /* Transfer B to Accumulator.  */
 #define SEI 0x38 /* SEt Interupt flag. */
-#define TBA 0x3C /* Transfer B to Accumulator.  */
+#define INY 0x3A /* INcrement Y register. */
+#define INX 0x3C /* INcrement X register. */
 #define TXS 0x3E /* Transfer X to Stack pointer. */
 #define BNG 0x40 /* Branch if NeGative. */
 #define XOR 0x41 /* bitwise XOR with accumulator. */
-#define XRY 0x42 /* bitwise XoR with Y register. */
-#define XAY 0x43 /* bitwise Xor with Accumulator, and Y register. */
-#define XRX 0x44 /* bitwise XoR with X register. */
-#define XAX 0x45 /* bitwise Xor with Accumulator, and X register. */
+#define XAB 0x42 /* bitwise Xor with Accumulator, and B register. */
 #define CLI 0x48 /* CLear Interupt flag. */
+#define DEY 0x4A /* DEcrement Y register. */
+#define DEX 0x4C /* DEcrement X register. */
 #define BCS 0x50 /* Branch if Carry Set. */
 #define LSL 0x51 /* Logical Shift Left. */
+#define LLB 0x52 /* Logical shift Left accumulator by B. */
 #define SEC 0x58 /* SEt Carry flag. */
 #define STA 0x5B /* STore Accumulator. */
 #define STY 0x5D /* STore Y register. */
 #define STX 0x5E /* STore X register. */
+#define STB 0x5F /* STore B register. */
 #define BCC 0x60 /* Branch if Carry Clear. */
 #define LSR 0x61 /* Logical Shift Right. */
+#define LRB 0x62 /* Logical shift Right accumulator by B. */
+#define LDB 0x66 /* LoaD B register. */
 #define CLC 0x68 /* CLear Carry flag. */
 #define LDA 0x69 /* LoaD Accumulator. */
 #define LDY 0x6A /* LoaD Y register. */
 #define LDX 0x6C /* LoaD X register. */
 #define BEQ 0x70 /* Branch if EQual. */
 #define ROL 0x71 /* ROtate Left. */
+#define RLB 0x72 /* Rotate Left accumulator by B. */
 #define SSP 0x78 /* Set Stack Protection flag. */
 #define BNE 0x80 /* Branch if Not Equal. */
 #define ROR 0x81 /* ROtate Right. */
+#define RRB 0x82 /* Rotate Right accumulator by B. */
 #define CSP 0x88 /* Clear Stack Protection flag. */
 #define BVS 0x90 /* Branch if oVerflow Set. */
-#define MUL 0x91 /* MULtiply with accumulator. */
+#define MUL 0x91 /* MULtiply accumulator. */
+#define MAB 0x92 /* Multiply Accumulator by B. */
 #define SEV 0x98 /* SEt oVerflow flag. */
 #define BVC 0xA0 /* Branch if oVerflow Clear. */
 #define DIV 0xA1 /* DIVide with accumulator. */
+#define DAB 0xA2 /* Divide Accumulator by B. */
 #define CLV 0xA8 /* CLear oVerflow flag. */
-#define ASR 0xA9 /* Arithmetic Shift Right. */
 #define RTS 0xB0 /* ReTurn from Subroutine. */
 #define CMP 0xB1 /* CoMPare accumulator. */
-#define CPY 0xB2 /* ComPare Y register. */
-#define CAY 0xB3 /* Compare Accumulator, and Y register. */
-#define CPX 0xB4 /* ComPare X register. */
-#define CAX 0xB5 /* Compare Accumulator, and X register. */
+#define CAB 0xB2 /* Compare Accumulator, and B. */
 #define ENT 0xB8 /* ENd Threads. */
 #define RTI 0xC0 /* ReTurn from Interrupt. */
 #define INC 0xC1 /* INCrement accumulator. */
-#define INY 0xC2 /* INcrement Y register. */
-#define IAY 0xC3 /* Increment Accumulator, and Y register. */
-#define INX 0xC4 /* INcrement X register. */
-#define IAX 0xC5 /* Increment Accumulator, and X register. */
+#define IAB 0xC2 /* Increment Accumulator, and B register. */
 #define DEC 0xD1 /* DECrement accumulator. */
-#define DEY 0xD2 /* DEcrement Y register. */
-#define DAY 0xD3 /* Decrement Accumulator, and Y register. */
-#define DEX 0xD4 /* DEcrement X register. */
-#define DAX 0xD5 /* Decrement Accumulator, and X register. */
+#define DBA 0xD2 /* Decrement Accumulator, and B register. */
+#define CPB 0xD6 /* ComPare B register. */
 #define WAI 0xD8 /* WAit for Interrupt. */
 #define JSL 0xE0 /* Jump to Subroutine Long. */
+#define ASR 0xE1 /* Arithmetic Shift Right. */
+#define ARB 0xE2 /* Arithmetic shift Right accumulator by B. */
 #define NOP 0xE8 /* No OPeration. */
 #define RTL 0xF0 /* ReTurn from subroutine Long. */
 #define BRK 0xF8 /* BReaK. */
@@ -126,165 +128,211 @@ typedef struct {
 	uint8_t zm;
 	uint8_t zmy;
 	uint8_t zmx;
+	uint8_t ind;
+	uint8_t inx;
+	uint8_t iny;
 	uint8_t impl;
 } opent;
 
 static const char *opname[0x100] = {
-	OPNAME(CPS),
-	[ADC] = "ADC #",
+	[0x00] = "CPS",
+	[0x01] = "ADC #",
+	[0x02] = "AAB",
 	[0x03] = "ADC a",
+	[0x04] = "JMP (ind)",
 	[0x05] = "ADC zm",
-	OPNAME(PHP),
-	OPNAME(PHA),
-	OPNAME(PHY),
-	OPNAME(TAY),
-	OPNAME(PHX),
-	OPNAME(TAX),
-	OPNAME(TYX),
-	OPNAME(JMP),
-	[SBC] = "SBC #",
+	[0x06] = "PHB",
+	[0x08] = "PHP",
+	[0x09] = "PHA",
+	[0x0A] = "PHY",
+	[0x0B] = "TAY",
+	[0x0C] = "PHX",
+	[0x0D] = "TAX",
+	[0x0E] = "TYX",
+	[0x10] = "JMP a",
+	[0x11] = "SBC #",
+	[0x12] = "SAB",
 	[0x13] = "SBC a",
+	[0x14] = "JMP (ind, x)",
 	[0x15] = "SBC zm",
-	OPNAME(PLP),
-	OPNAME(PLA),
-	OPNAME(PLY),
-	OPNAME(TYA),
-	OPNAME(PLX),
-	OPNAME(TXA),
-	OPNAME(TXY),
-	OPNAME(JSR),
-	[AND] = "AND #",
-	[ANY] = "ANY #",
-	OPNAME(AAY),
-	[ANX] = "ANX #",
-	OPNAME(AAX),
-	OPNAME(STT),
-	OPNAME(TSX),
-	[0x29] = "AND a",
-	[0x2B] = "AND zm",
-	OPNAME(TAB),
-	OPNAME(BPO),
-	[ORA] = "ORA #",
-	[ORY] = "ORY #",
-	OPNAME(OAY),
-	[ORX] = "ORX #",
-	OPNAME(OAX),
-	OPNAME(SEI),
-	OPNAME(TXS),
-	[0x39] = "ORA a",
-	[0x3B] = "ORA zm",
-	OPNAME(TBA),
-	OPNAME(BNG),
-	[XOR] = "XOR #",
-	[XRY] = "XRY #",
-	OPNAME(XAY),
-	[XRX] = "XRX #",
-	OPNAME(XAX),
-	OPNAME(CLI),
-	[0x49] = "XOR a",
-	[0x4B] = "XOR zm",
-	OPNAME(BCS),
-	[LSL] = "LSL #",
-	[0x52] = "ANY a",
+	[0x16] = "PLB",
+	[0x18] = "PLP",
+	[0x19] = "PLA",
+	[0x1A] = "PLY",
+	[0x1B] = "TYA",
+	[0x1C] = "PLX",
+	[0x1D] = "TXA",
+	[0x1E] = "TXY",
+	[0x20] = "JSR",
+	[0x21] = "AND #",
+	[0x22] = "ABA",
+	[0x23] = "AND a",
+	[0x24] = "JMP (ind), y",
+	[0x25] = "AND zm",
+	[0x26] = "TAB",
+	[0x28] = "STT",
+	[0x2A] = "CPY #",
+	[0x2B] = "CPY a",
+	[0x2C] = "CPX #",
+	[0x2D] = "CPX a",
+	[0x2E] = "TSX",
+	[0x30] = "BPO a",
+	[0x31] = "ORA #",
+	[0x32] = "OAB",
+	[0x33] = "ORA a",
+	[0x34] = "JSR (ind)",
+	[0x35] = "ORA zm",
+	[0x36] = "TBA",
+	[0x38] = "SEI",
+	[0x3A] = "INY",
+	[0x3B] = "CPY zm",
+	[0x3C] = "INX",
+	[0x3D] = "CPX zm",
+	[0x3E] = "TXS",
+	[0x40] = "BNG a",
+	[0x41] = "XOR #",
+	[0x42] = "XAB",
+	[0x43] = "XOR a",
+	[0x44] = "JSR (ind, x)",
+	[0x45] = "XOR zm",
+	[0x48] = "CLI",
+	[0x4A] = "DEY",
+	[0x4C] = "DEX",
+	[0x50] = "BCS a",
+	[0x51] = "LSL #",
+	[0x52] = "LLB",
 	[0x53] = "LSL a",
-	[0x54] = "ANX a",
+	[0x54] = "JSR (ind), y",
 	[0x55] = "LSL zm",
-	OPNAME(SEC),
+	[0x56] = "LDB a",
+	[0x58] = "SEC",
 	[0x59] = "LDA a",
 	[0x5A] = "LDY a",
-	[STA] = "STA a",
+	[0x5B] = "STA a",
 	[0x5C] = "LDX a",
-	[STY] = "STY a",
-	[STX] = "STX a",
-	OPNAME(BCC),
-	[LSR] = "LSR #",
-	[0x62] = "ORY a",
+	[0x5D] = "STY a",
+	[0x5E] = "STX a",
+	[0x5F] = "STB a",
+	[0x60] = "BCC a",
+	[0x61] = "LSR #",
+	[0x62] = "LRB",
 	[0x63] = "LSR a",
-	[0x64] = "ORX a",
+	[0x64] = "BPO zm",
 	[0x65] = "LSR zm",
-	OPNAME(CLC),
-	[LDA]= "LDA #",
-	[LDY]= "LDY #",
-	[LDX]= "LDX #",
-	OPNAME(BEQ),
-	[ROL] = "ROL #",
-	[0x72] = "XRY a",
+	[0x66] = "LDB #",
+	[0x68] = "CLC",
+	[0x69] = "LDA #",
+	[0x6A] = "LDY #",
+	[0x6C] = "LDX #",
+	[0x70] = "BEQ a",
+	[0x71] = "ROL #",
+	[0x72] = "RLB",
 	[0x73] = "ROL a",
-	[0x74] = "XRX a",
+	[0x74] = "BNG zm",
 	[0x75] = "ROL zm",
-	OPNAME(SSP),
+	[0x76] = "LDB zm",
+	[0x78] = "SSP",
 	[0x79] = "LDA zm",
 	[0x7A] = "LDY zm",
 	[0x7B] = "STA zm",
 	[0x7C] = "LDX zm",
 	[0x7D] = "STY zm",
 	[0x7E] = "STX zm",
-	OPNAME(BNE),
-	[ROR] = "ROR #",
-	[0x82] = "ANY zm",
+	[0x7F] = "STB zm",
+	[0x80] = "BNE a",
+	[0x81] = "ROR #",
+	[0x82] = "RRB",
 	[0x83] = "ROR a",
-	[0x84] = "ANX zm",
+	[0x84] = "BCS zm",
 	[0x85] = "ROR zm",
-	OPNAME(CSP),
+	[0x86] = "LDB zm, x",
+	[0x88] = "CSP",
 	[0x89] = "LDA zm, x",
 	[0x8A] = "LDY zm, x",
 	[0x8B] = "STA zm, x",
 	[0x8D] = "STY zm, x",
-	OPNAME(BVS),
-	[MUL] = "MUL #",
-	[0x92] = "ORY zm",
+	[0x8F] = "STB zm, x",
+	[0x90] = "BVS a",
+	[0x91] = "MUL #",
+	[0x92] = "MAB",
 	[0x93] = "MUL a",
-	[0x94] = "ORX zm",
+	[0x94] = "BCC zm",
 	[0x95] = "MUL zm",
-	OPNAME(SEV),
+	[0x96] = "LDB zm, y",
+	[0x98] = "SEV",
 	[0x99] = "LDA zm, y",
 	[0x9B] = "STA zm, y",
 	[0x9C] = "LDX zm, y",
 	[0x9E] = "STX zm, y",
-	OPNAME(BVC),
-	[DIV] = "DIV #",
-	[0xA2] = "XRY zm",
+	[0x9F] = "STB zm, y",
+	[0xA0] = "BVC a",
+	[0xA1] = "DIV #",
+	[0xA2] = "DAB",
 	[0xA3] = "DIV a",
-	[0xA4] = "XRX zm",
+	[0xA4] = "BEQ zm",
 	[0xA5] = "DIV zm",
-	OPNAME(CLV),
-	[ASR] = "ASR #",
-	[0xAB] = "ASR a",
-	[0xAD] = "ASR zm",
-	OPNAME(RTS),
-	[CMP] = "CMP #",
-	[CPY] = "CPY #",
-	OPNAME(CAY),
-	[CPX] = "CPX #",
-	OPNAME(CAX),
-	OPNAME(ENT),
-	OPNAME(RTI),
-	[INC] = "INC A",
-	OPNAME(INY),
-	OPNAME(IAY),
-	OPNAME(INX),
-	OPNAME(IAX),
+	[0xA6] = "LDB (ind)",
+	[0xA8] = "CLV",
+	[0xA9] = "LDA (ind)",
+	[0xAA] = "LDY (ind)",
+	[0xAB] = "STA (ind)",
+	[0xAC] = "LDX (ind)",
+	[0xAD] = "STY (ind)",
+	[0xAE] = "STX (ind)",
+	[0xAF] = "STB (ind)",
+	[0xB0] = "RTS",
+	[0xB1] = "CMP #",
+	[0xB2] = "CAB",
+	[0xB3] = "CMP a",
+	[0xB4] = "BNE zm",
+	[0xB5] = "CMP zm",
+	[0xB6] = "LDB (ind, x)",
+	[0xB8] = "ENT",
+	[0xB9] = "LDA (ind, x)",
+	[0xBA] = "LDY (ind, x)",
+	[0xBB] = "STA (ind, x)",
+	[0xBD] = "STY (ind, x)",
+	[0xBF] = "STB (ind, x)",
+	[0xC0] = "RTI",
+	[0xC1] = "INC A",
+	[0xC2] = "IAB",
+	[0xC3] = "INC a",
+	[0xC4] = "BVS zm",
+	[0xC5] = "INC zm",
+	[0xC6] = "LDB (ind), y",
+	[0xC9] = "LDA (ind), y",
+	[0xCB] = "STA (ind), y",
+	[0xCC] = "LDX (ind), y",
+	[0xCE] = "STX (ind), y",
+	[0xCF] = "STB (ind), y",
 	[0xD0] = "JMP zm",
-	[DEC] = "DEC A",
-	OPNAME(DEY),
-	OPNAME(DAY),
-	OPNAME(DEX),
-	OPNAME(DAX),
-	OPNAME(WAI),
-	OPNAME(JSL),
-	[0xE1] = "INC a",
-	[0xE2] = "CPY a",
-	[0xE3] = "INC zm",
-	[0xE4] = "CPX a",
-	[0xE5] = "CMP a",
-	OPNAME(NOP),
-	OPNAME(RTL),
-	[0xF1] = "DEC a",
-	[0xF2] = "CPY zm",
-	[0xF3] = "DEC zm",
-	[0xF4] = "CPX zm",
-	[0xF4] = "CMP zm",
-	OPNAME(BRK),
+	[0xD1] = "DEC A",
+	[0xD2] = "DBA",
+	[0xD3] = "DEC a",
+	[0xD4] = "BVC zm",
+	[0xD5] = "DEC zm",
+	[0xD6] = "CPB #",
+	[0xD8] = "WAI",
+	[0xDF] = "CPB (ind)",
+	[0xE0] = "JSL",
+	[0xE1] = "ASR #",
+	[0xE2] = "ARB",
+	[0xE3] = "ASR a",
+	[0xE5] = "ASR zm",
+	[0xE6] = "CPB a",
+	[0xE8] = "NOP",
+	[0xE9] = "CMP (ind)",
+	[0xEA] = "CPY (ind)",
+	[0xEB] = "CMP (ind, x)",
+	[0xEC] = "CPX (ind)",
+	[0xED] = "CMP (ind), y",
+	[0xEF] = "CPB (ind, x)",
+	[0xF0] = "RTL",
+	[0xF6] = "CPB zm",
+	[0xF8] = "BRK",
+	[0xFA] = "CPY (ind, x)",
+	[0xFC] = "CPX (ind), y",
+	[0xFF] = "CPB (ind), y"
 };
 
 extern int asmmon();