Make the registers single 64 bit uints, and convert

all the value getting, and setting into macros.

This is to make the codebase cleaner.

1 files changed, 89 insertions, 139 deletions

diff --git a/sux.c b/sux.c
index 84bab1c..9ae05f5 100644
--- a/sux.c
+++ b/sux.c
@@ -84,12 +84,6 @@ void *run(void *args) {
 	for (;;) {
 		address.u64 = 0;
 		value.u64 = 0;
-		prefix = addr[cpu->pc[thread]];
-		if ((prefix & 0x03) != 0x03) {
-			prefix = 0;
-		}
-		cpu->pc[thread] += ((prefix & 0x03) == 0x03);
-		opcode = addr[cpu->pc[thread]];
 		#if debug && !bench
 		if (lines > 24*(thread+1)) {
 			lines = (24*thread)+2;
@@ -103,39 +97,32 @@ void *run(void *args) {
 		}
 		wmove(scr, lines, 1);
 		wclrtoeol(scr);
-		wprintw(scr, "pc: $%04"PRIX64  , cpu->pc[thread]);
-		wprintw(scr, ", a: $%016"PRIX64, cpu->a[thread]);
-		wprintw(scr, ", b: $%016"PRIX64, cpu->b[thread]);
-		wprintw(scr, ", x: $%016"PRIX64, cpu->x[thread]);
-		wprintw(scr, ", y: $%016"PRIX64, cpu->y[thread]);
-		wprintw(scr, ", sp: $%04X", cpu->sp[thread]);
+		wprintw(scr, "pc: $%04"PRIX64  , cpu->pc);
+		wprintw(scr, ", a: $%016"PRIX64, cpu->a);
+		wprintw(scr, ", b: $%016"PRIX64, cpu->b);
+		wprintw(scr, ", x: $%016"PRIX64, cpu->x);
+		wprintw(scr, ", y: $%016"PRIX64, cpu->y);
+		wprintw(scr, ", sp: $%04X", cpu->sp);
 		wprintw(scr, ", ps: $%02X", cpu->ps.u8[thread]);
 		wprintw(scr, ", inst: ");
 		#if keypoll
 		pthread_mutex_unlock(&mutex);
 		#endif
 		#endif
-		address.u64 = cpu->pc[thread];
-		++cpu->pc[thread];
+		prefix = addr[cpu->pc];
+		if ((prefix & 0x03) != 0x03) {
+			prefix = 0;
+		}
+		cpu->pc += ((prefix & 0x03) == 0x03);
+		opcode = addr[cpu->pc];
+		address.u64 = cpu->pc;
+		++cpu->pc;
 		#if getclk
 		++iclk;
 		#endif
 		if (optype[opcode] != IMPL) {
 			address.u64 = get_addr(cpu, &tmpaddr, opcode, prefix, thread);
-			/* Unroll Loop by implementing Duff's Device. */
-			value.u8[0] = addr[address.u64];
-			switch (1 << (prefix >> 4)) {
-				case 8:
-					value.u8[7] = addr[address.u64+7];
-					value.u8[6] = addr[address.u64+6];
-					value.u8[5] = addr[address.u64+5];
-					value.u8[4] = addr[address.u64+4];
-				case 4:
-					value.u8[3] = addr[address.u64+3];
-					value.u8[2] = addr[address.u64+2];
-				case 2:
-					value.u8[1] = addr[address.u64+1];
-			}
+			setreg_sw(value.u8, 0, addr, address.u64, prefix, 0, RS);
 			#if getclk
 			++iclk;
 			#endif
@@ -159,17 +146,17 @@ void *run(void *args) {
 				cpu->ps.u64 = 0;
 				break;
 			case AAB: /* Add Accumulator with carry by B register. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case ADC:  /* ADC Immediate. */
 			case ADC_AB: /* ADC Absolute. */
 			case ADC_Z: /* ADC Zero Matrix. */
 				adc(cpu, value.u64, thread);
 				break;
-			case PHP: push(cpu, value.u64, cpu->ps.u8[thread], thread); break; /* PusH Processor status to stack. */
-			case PHA: push(cpu, value.u64, cpu->a[thread    ], thread); break; /* PusH Accumulator to stack. */
-			case PHB: push(cpu, value.u64, cpu->b[thread    ], thread); break; /* PusH B register to stack. */
-			case PHY: push(cpu, value.u64, cpu->y[thread    ], thread); break; /* PusH Y register to stack. */
-			case PHX: push(cpu, value.u64, cpu->x[thread    ], thread); break; /* PusH X register to stack. */
+			case PHP: push(cpu, value.u64, cpu->ps.u64, thread); break; /* PusH Processor status to stack. */
+			case PHA: push(cpu, value.u64, cpu->a     , thread); break; /* PusH Accumulator to stack. */
+			case PHB: push(cpu, value.u64, cpu->b     , thread); break; /* PusH B register to stack. */
+			case PHY: push(cpu, value.u64, cpu->y     , thread); break; /* PusH Y register to stack. */
+			case PHX: push(cpu, value.u64, cpu->x     , thread); break; /* PusH X register to stack. */
 			case TAY: /* Transfer Accumulator to Y. */
 			case TAX: /* Transfer Accumulator to Y. */
 			case TYX: /* Transfer Y to X. */
@@ -185,23 +172,23 @@ void *run(void *args) {
 			case JMP: /* JMP Absolute. */
 			case JMP_Z: /* JMP Zero Matrix. */
 			case JMP_IN: /* JMP Indirect. */
-				cpu->pc[thread] = address.u64;
+				cpu->pc = address.u64;
 				break;
 			case SAB: /* Subtract Accumulator with carry by B register. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case SBC: /* SBC Immediate. */
 			case SBC_AB: /* SBC Absolute. */
 			case SBC_Z: /* SBC Zero Matrix. */
 				sbc(cpu, value.u64, thread);
 				break;
-			case PLP: cpu->ps.u8[thread] = pull(cpu, value.u64, thread); break; /* PuLl Processor status from stack. */
-			case PLA: cpu->a[thread    ] = pull(cpu, value.u64, thread); break; /* PuLl Accumulator from stack. */
-			case PLB: cpu->b[thread    ] = pull(cpu, value.u64, thread); break; /* PuLl B register from stack. */
-			case PLY: cpu->y[thread    ] = pull(cpu, value.u64, thread); break; /* PuLl Y register from stack. */
-			case PLX: cpu->x[thread    ] = pull(cpu, value.u64, thread); break; /* PuLl X register from stack. */
+			case PLP: cpu->ps.u64 = pull(cpu, value.u64, thread); break; /* PuLl Processor status from stack. */
+			case PLA: cpu->a      = pull(cpu, value.u64, thread); break; /* PuLl Accumulator from stack. */
+			case PLB: cpu->b      = pull(cpu, value.u64, thread); break; /* PuLl B register from stack. */
+			case PLY: cpu->y      = pull(cpu, value.u64, thread); break; /* PuLl Y register from stack. */
+			case PLX: cpu->x      = pull(cpu, value.u64, thread); break; /* PuLl X register from stack. */
 				break;
 			case ABA: /* bitwise And with Accumulator, and B register. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case AND: /* AND Immediate. */
 			case AND_AB: /* AND Absolute. */
 			case AND_Z: /* AND Zero Matrix. */
@@ -226,11 +213,11 @@ void *run(void *args) {
 			case BPO: /* BPO Absolute. */
 			case BPO_Z: /* BPO Zero Matrix. */
 				if (!getflag(N)) {
-					cpu->pc[thread] = address.u64;
+					cpu->pc = address.u64;
 				}
 				break;
 			case OAB: /* bitwise Or with Accumulator, and B register. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case ORA: /* ORA Immediate. */
 			case ORA_AB: /* ORA Absolute. */
 			case ORA_Z: /* ORA Zero Matrix. */
@@ -242,11 +229,11 @@ void *run(void *args) {
 			case BNG: /* BNG Absolute. */
 			case BNG_Z: /* BNG Zero Matrix. */
 				if (getflag(N)) {
-					cpu->pc[thread] = address.u64;
+					cpu->pc = address.u64;
 				}
 				break;
 			case XAB: /* bitwise Xor with Accumulator, and B register. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case XOR: /* XOR Immediate. */
 			case XOR_AB: /* XOR Absolute. */
 			case XOR_Z: /* XOR Zero Matrix. */
@@ -258,11 +245,11 @@ void *run(void *args) {
 			case BCS: /* BCS Absolute. */
 			case BCS_Z: /* BCS Zero Matrix. */
 				if (getflag(C)) {
-					cpu->pc[thread] = address.u64;
+					cpu->pc = address.u64;
 				}
 				break;
 			case LLB: /* Logical shift Left accumulator by B. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case LSL: /* LSL Immediate. */
 			case LSL_AB: /* LSL Absolute. */
 			case LSL_Z: /* LSL Zero Matrix. */
@@ -278,19 +265,19 @@ void *run(void *args) {
 			case STA_IN: /* STA Indirect. */
 			case STA_IX: /* STA Indexed Indirect. */
 			case STA_IY: /* STA Indirect Indexed. */
-				store(cpu, address.u64, cpu->a[thread], prefix, thread);
+				store(cpu, address.u64, cpu->a, prefix, thread);
 				break;
 			case STY: /* STY Absolute. */
 			case STY_Z: /* STY Zero Matrix. */
 			case STY_ZX: /* STY Zero Matrix, Indexed with X. */
 			case STY_IN: /* STY Indirect. */
-				store(cpu, address.u64, cpu->y[thread], prefix, thread);
+				store(cpu, address.u64, cpu->y, prefix, thread);
 				break;
 			case STX: /* STX Absolute. */
 			case STX_Z: /* STX Zero Matrix. */
 			case STX_ZY: /* STX Zero Matrix, Indexed with Y. */
 			case STX_IN: /* STX Indirect. */
-				store(cpu, address.u64, cpu->x[thread], prefix, thread);
+				store(cpu, address.u64, cpu->x, prefix, thread);
 				break;
 			case STB: /* STB Absolute. */
 			case STB_Z: /* STB Zero Matrix. */
@@ -299,23 +286,23 @@ void *run(void *args) {
 			case STB_IN: /* STB Indirect. */
 			case STB_IX: /* STB Indexed Indirect. */
 			case STB_IY: /* STB Indirect Indexed. */
-				store(cpu, address.u64, cpu->b[thread], prefix, thread);
+				store(cpu, address.u64, cpu->b, prefix, thread);
 				break;
 			case BCC: /* BCC Absolute. */
 			case BCC_Z: /* BCC Zero Matrix. */
 				if (!getflag(C)) {
-					cpu->pc[thread] = address.u64;
+					cpu->pc = address.u64;
 				}
 				break;
 			case LRB: /* Logical shift Right accumulator by B. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case LSR: /* LSR Immediate. */
 			case LSR_AB: /* LSR Absolute. */
 			case LSR_Z: /* LSR Zero Matrix. */
 				lsr(cpu, value.u64, thread);
 				break;
 			case ARB: /* Arithmetic shift Right accumulator by B. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case ASR: /* ASR Immediate. */
 			case ASR_AB: /* ASR Absolute. */
 			case ASR_Z: /* ASR Zero Matrix. */
@@ -332,7 +319,7 @@ void *run(void *args) {
 			case LDB_IN: /* LDB Indirect. */
 			case LDB_IX: /* LDB Indexed Indirect. */
 			case LDB_IY: /* LDB Indirect Indexed. */
-				cpu->b[thread] = load(cpu, address.u64, cpu->b[thread], prefix, thread);
+				cpu->b = load(cpu, address.u64, cpu->b, prefix, thread);
 				break;
 			case LDA: /* LDA Immediate. */
 			case LDA_AB: /* LDA Absolute. */
@@ -342,30 +329,30 @@ void *run(void *args) {
 			case LDA_IN: /* LDA Indirect. */
 			case LDA_IX: /* LDA Indexed Indirect. */
 			case LDA_IY: /* LDA Indirect Indexed. */
-				cpu->a[thread] = load(cpu, address.u64, cpu->a[thread], prefix, thread);
+				cpu->a = load(cpu, address.u64, cpu->a, prefix, thread);
 				break;
 			case LDY: /* LDY Immediate. */
 			case LDY_AB: /* LDY Absolute. */
 			case LDY_Z: /* LDY Zero Matrix. */
 			case LDY_ZX: /* LDY Zero Matrix, Indexed with X. */
 			case LDY_IN: /* LDY Indirect. */
-				cpu->y[thread] = load(cpu, address.u64, cpu->y[thread], prefix, thread);
+				cpu->y = load(cpu, address.u64, cpu->y, prefix, thread);
 				break;
 			case LDX: /* LDX Immediate. */
 			case LDX_AB: /* LDX Absolute. */
 			case LDX_Z: /* LDX Zero Matrix. */
 			case LDX_ZY: /* LDX Zero Matrix, Indexed with Y. */
 			case LDX_IN: /* LDX Indirect. */
-				cpu->x[thread] = load(cpu, address.u64, cpu->x[thread], prefix, thread);
+				cpu->x = load(cpu, address.u64, cpu->x, prefix, thread);
 				break;
 			case BEQ: /* BEQ Absolute. */
 			case BEQ_Z: /* BEQ Zero Matrix. */
 				if (getflag(Z)) {
-					cpu->pc[thread] = address.u64;
+					cpu->pc = address.u64;
 				}
 				break;
 			case RLB: /* Rotate Left accumulator by B. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case ROL: /* ROL Immediate. */
 			case ROL_AB: /* ROL Absolute. */
 			case ROL_Z: /* ROL Zero Matrix. */
@@ -374,11 +361,11 @@ void *run(void *args) {
 			case BNE: /* BNE Absolute. */
 			case BNE_Z: /* BNE Zero Matrix. */
 				if (!getflag(Z)) {
-					cpu->pc[thread] = address.u64;
+					cpu->pc = address.u64;
 				}
 				break;
 			case RRB: /* Rotate Right accumulator by B. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case ROR: /* ROR Immediate. */
 			case ROR_AB: /* ROR Absolute. */
 			case ROR_Z: /* ROR Zero Matrix. */
@@ -387,11 +374,11 @@ void *run(void *args) {
 			case BVS: /* BVS Absolute. */
 			case BVS_Z: /* BVS Zero Matrix. */
 				if (getflag(V)) {
-					cpu->pc[thread] = address.u64;
+					cpu->pc = address.u64;
 				}
 				break;
 			case MAB: /* Multiply Accumulator by B. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case MUL: /* MUL Immediate. */
 			case MUL_AB: /* MUL Absolute. */
 			case MUL_Z: /* MUL Zero Matrix. */
@@ -400,7 +387,7 @@ void *run(void *args) {
 			case BVC: /* BVC Absolute. */
 			case BVC_Z: /* BVC Zero Matrix. */
 				if (!getflag(V)) {
-					cpu->pc[thread] = address.u64;
+					cpu->pc = address.u64;
 				}
 				break;
 			case DIV: /* DIV Immediate. */
@@ -418,29 +405,29 @@ void *run(void *args) {
 			case CPB_IN: /* CPB Indirect. */
 			case CPB_IX: /* CPB Indexed Indirect. */
 			case CPB_IY: /* CPB Indirect Indexed. */
-				cmp(cpu, value.u64, cpu->b[thread], thread);
+				cmp(cpu, value.u64, cpu->b, thread);
 				break;
 			case CAB: /* Compare Accumulator, and B. */
-				value.u64 = cpu->b[thread]; /* Falls Through. */
+				value.u64 = cpu->b; /* Falls Through. */
 			case CMP: /* CMP Immediate. */
 			case CMP_AB: /* CMP Absolute. */
 			case CMP_Z: /* CMP Zero Matrix. */
 			case CMP_IN: /* CMP Indirect. */
 			case CMP_IX: /* CMP Indexed Indirect. */
 			case CMP_IY: /* CMP Indirect Indexed. */
-				cmp(cpu, value.u64, cpu->a[thread], thread);
+				cmp(cpu, value.u64, cpu->a, thread);
 				break;
 			case CPY: /* CPY Immediate. */
 			case CPY_AB: /* CPY Absolute. */
 			case CPY_Z: /* CPY Zero Matrix. */
 			case CPY_IN: /* CPY Indirect. */
-				cmp(cpu, value.u64, cpu->y[thread], thread);
+				cmp(cpu, value.u64, cpu->y, thread);
 				break;
 			case CPX: /* CPX Immediate. */
 			case CPX_AB: /* CPX Absolute. */
 			case CPX_Z: /* CPX Zero Matrix. */
 			case CPX_IN: /* CPX Indirect. */
-				cmp(cpu, value.u64, cpu->x[thread], thread);
+				cmp(cpu, value.u64, cpu->x, thread);
 				break;
 			case ENT: /* ENd Thread. */
 			/*	cpu->crt &= ~value;
@@ -448,28 +435,21 @@ void *run(void *args) {
 					if ((value >> i) & 1)
 						cpu->pc[i+1] = cpu->pc[0]+(i+1);*/
 				break;
-			case INC: cpu->a[thread] = idr(cpu, cpu->a[thread], 1, thread); break;
-			case INB: cpu->b[thread] = idr(cpu, cpu->b[thread], 1, thread); break;
-			case INY: cpu->y[thread] = idr(cpu, cpu->y[thread], 1, thread); break;
-			case INX: cpu->x[thread] = idr(cpu, cpu->x[thread], 1, thread); break;
-			case DEC: cpu->a[thread] = idr(cpu, cpu->a[thread], 0, thread); break;
-			case DEB: cpu->b[thread] = idr(cpu, cpu->b[thread], 0, thread); break;
-			case DEY: cpu->y[thread] = idr(cpu, cpu->y[thread], 0, thread); break;
-			case DEX: cpu->x[thread] = idr(cpu, cpu->x[thread], 0, thread); break;
+			case INC: cpu->a = idr(cpu, cpu->a, 1, thread); break;
+			case INB: cpu->b = idr(cpu, cpu->b, 1, thread); break;
+			case INY: cpu->y = idr(cpu, cpu->y, 1, thread); break;
+			case INX: cpu->x = idr(cpu, cpu->x, 1, thread); break;
+			case DEC: cpu->a = idr(cpu, cpu->a, 0, thread); break;
+			case DEB: cpu->b = idr(cpu, cpu->b, 0, thread); break;
+			case DEY: cpu->y = idr(cpu, cpu->y, 0, thread); break;
+			case DEX: cpu->x = idr(cpu, cpu->x, 0, thread); break;
 			case JSR_IN: /* JSR Indirect. */
 			case JSR: /* Jump to SubRoutine. */
 			case JSR_Z: /* JSR Zero Matrix. */
-				value.u64 = cpu->pc[thread];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-0] = value.u8[7];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-1] = value.u8[6];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-2] = value.u8[5];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-3] = value.u8[4];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-4] = value.u8[3];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-5] = value.u8[2];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-6] = value.u8[1];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-7] = value.u8[0];
-				cpu->sp[thread] -= 8;
-				cpu->pc[thread] = address.u64;
+				value.u64 = cpu->pc;
+				setreg(addr, -, (cpu->stk_st << 16)+cpu->sp, value.u8, +, 0, 7);
+				cpu->sp -= 8;
+				cpu->pc = address.u64;
 				break;
 			case INC_AB: /* INC Absolute. */
 			case INC_Z: /* INC Zero Matrix. */
@@ -478,19 +458,12 @@ void *run(void *args) {
 			case NOP: /* No OPeration. */
 				break;
 			case RTI: /* ReTurn from Interrupt routine. */
-				cpu->sp[thread]   += 1;
-				cpu->ps.u8[thread] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread])]; /* Falls through. */
+				cpu->sp   += 1;
+				cpu->ps.u8[thread] = addr[(cpu->stk_st << 16)+(cpu->sp)]; /* Falls through. */
 			case RTS: /* ReTurn from Subroutine. */
-				cpu->sp[thread] += 8;
-				value.u8[0] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread]-7)];
-				value.u8[1] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread]-6)];
-				value.u8[2] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread]-5)];
-				value.u8[3] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread]-4)];
-				value.u8[4] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread]-3)];
-				value.u8[5] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread]-2)];
-				value.u8[6] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread]-1)];
-				value.u8[7] = addr[(cpu->stk_st[thread] << 16)+(cpu->sp[thread]  )];
-				cpu->pc[thread] = value.u64;
+				cpu->sp += 8;
+				setreg(value.u8, +, 0, addr, -, (cpu->stk_st << 16)+cpu->sp, 7);
+				cpu->pc = value.u64;
 				break;
 			case DEC_AB: /* DEC Absolute. */
 			case DEC_Z: /* DEC Zero Matrix. */
@@ -506,39 +479,16 @@ void *run(void *args) {
 					pthread_cond_wait(&cond, &mutex);
 					pthread_mutex_unlock(&mutex);
 				}
-				value.u64 = cpu->pc[thread];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-0] = value.u8[7];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-1] = value.u8[6];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-2] = value.u8[5];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-3] = value.u8[4];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-4] = value.u8[3];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-5] = value.u8[2];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-6] = value.u8[1];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-7] = value.u8[0];
-				addr[(cpu->stk_st[thread] << 16)+cpu->sp[thread]-8] = cpu->ps.u8[thread];
-				cpu->sp[thread] -= 9;
+				value.u64 = cpu->pc;
+				setreg(addr, -, (cpu->stk_st << 16)+cpu->sp, value.u8, +, 0, 7);
+				addr[(cpu->stk_st << 16)+cpu->sp-8] = cpu->ps.u8[thread];
+				cpu->sp -= 9;
 				setflag(1, I);
-				if (opcode == BRK) {
-					value.u8[0] = addr[0xFFE0];
-					value.u8[1] = addr[0xFFE1];
-					value.u8[2] = addr[0xFFE2];
-					value.u8[3] = addr[0xFFE3];
-					value.u8[4] = addr[0xFFE4];
-					value.u8[5] = addr[0xFFE5];
-					value.u8[6] = addr[0xFFE6];
-					value.u8[7] = addr[0xFFE7];
-				} else {
-					value.u8[0] = addr[0xFFA0];
-					value.u8[1] = addr[0xFFA1];
-					value.u8[2] = addr[0xFFA2];
-					value.u8[3] = addr[0xFFA3];
-					value.u8[4] = addr[0xFFA4];
-					value.u8[5] = addr[0xFFA5];
-					value.u8[6] = addr[0xFFA6];
-					value.u8[7] = addr[0xFFA7];
+				setreg(value.u8, +, 0, addr, +, (opcode == BRK) ? 0xFFE0 : 0xFFA0, 7);
+				if (opcode == WAI) {
 					kbd_rdy &= (uint8_t)~(1 << thread);
 				}
-				cpu->pc[thread] = value.u64;
+				cpu->pc = value.u64;
 			default:
 				break;
 		}
@@ -636,15 +586,15 @@ int main(int argc, char **argv) {
 	uint16_t vec = 0xFFC0;
 	uint8_t offset;
 	for (int i = 0; i < THREADS; i++) {
-		thr[i].sx.sp[i] = 0xFFFF;
-		thr[i].sx.stk_st[i] = i+1;
+		thr[i].sx.sp = 0xFFFF;
+		thr[i].sx.stk_st = i+1;
 		offset = (i) ? ((i-1) << 3) : 0;
 		vec = (i) ? 0xFF50 : 0xFFC0;
-		thr[i].sx.a[i] = 0;
-		thr[i].sx.b[i] = 0;
-		thr[i].sx.x[i] = 0;
-		thr[i].sx.y[i] = 0;
-		thr[i].sx.pc[i] = (uint64_t)addr[vec+0+offset]
+		thr[i].sx.a = 0;
+		thr[i].sx.b = 0;
+		thr[i].sx.x = 0;
+		thr[i].sx.y = 0;
+		thr[i].sx.pc = (uint64_t)addr[vec+0+offset]
 				| (uint64_t)addr[vec+1+offset] << 8
 				| (uint64_t)addr[vec+2+offset] << 16
 				| (uint64_t)addr[vec+3+offset] << 24