- Refactored the opcode table, in order to make the

  instruction formatting simpler.

- Refactored the instruction table of the emulator's
  assembler, it now has two parts, the addressing mode
  bits, and the base value.

  The base value is what's used to generate the actual
  opcode, with the addressing mode bits telling the
  assembler what addressing modes this instruction
  supports.

  The reason for doing this was to use less space. For
  comparison, the previous version used 870 bytes for
  the instruction table, while the new version uses
  only 222 bytes. The new version is nearly 4 times
  smaller than the pervious version.

- The B register based ALU instructions now use their
  own addressing mode, and are specified by using 'b'
  as the operand for those instructions.
  For example, to add the Accumulator with the B
  register, you now use "ADC B" instead of "AAB".

1 files changed, 13 insertions, 13 deletions

diff --git a/sux.c b/sux.c
index f6d01e7..4a08d59 100644
--- a/sux.c
+++ b/sux.c
@@ -182,7 +182,7 @@ void *run(void *args) {
 			case CPS_IMP: /* Clear Processor Status. */
 				cpu->ps.u64 = 0;
 				break;
-			case AAB_IMP: /* Add Accumulator with carry by B register. */
+			case ADC_B: /* ADC B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case ADC_IMM:  /* ADC Immediate. */
 			case ADC_AB: /* ADC Absolute. */
@@ -212,7 +212,7 @@ void *run(void *args) {
 			case JMP_IN: /* JMP Indirect. */
 				cpu->pc = address.u64;
 				break;
-			case SAB_IMP: /* Subtract Accumulator with carry by B register. */
+			case SBC_B: /* SBC B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case SBC_IMM: /* SBC Immediate. */
 			case SBC_AB: /* SBC Absolute. */
@@ -225,7 +225,7 @@ void *run(void *args) {
 			case PLY_IMP: cpu->y             = pull(cpu, size, thread); break; /* PuLl Y register from stack. */
 			case PLX_IMP: cpu->x             = pull(cpu, size, thread); break; /* PuLl X register from stack. */
 				break;
-			case ABA_IMP: /* bitwise And with Accumulator, and B register. */
+			case AND_B: /* AND B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case AND_IMM: /* AND Immediate. */
 			case AND_AB: /* AND Absolute. */
@@ -237,7 +237,7 @@ void *run(void *args) {
 					cpu->pc = address.u64;
 				}
 				break;
-			case OAB_IMP: /* bitwise Or with Accumulator, and B register. */
+			case ORA_B: /* ORA B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case ORA_IMM: /* ORA Immediate. */
 			case ORA_AB: /* ORA Absolute. */
@@ -252,7 +252,7 @@ void *run(void *args) {
 					cpu->pc = address.u64;
 				}
 				break;
-			case XAB_IMP: /* bitwise Xor with Accumulator, and B register. */
+			case XOR_B: /* XOR B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case XOR_IMM: /* XOR Immediate. */
 			case XOR_AB: /* XOR Absolute. */
@@ -267,7 +267,7 @@ void *run(void *args) {
 					cpu->pc = address.u64;
 				}
 				break;
-			case LLB_IMP: /* Logical shift Left accumulator by B. */
+			case LSL_B: /* LSL B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case LSL_IMM: /* LSL Immediate. */
 			case LSL_AB: /* LSL Absolute. */
@@ -310,14 +310,14 @@ void *run(void *args) {
 					cpu->pc = address.u64;
 				}
 				break;
-			case LRB_IMP: /* Logical shift Right accumulator by B. */
+			case LSR_B: /* LSR B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case LSR_IMM: /* LSR Immediate. */
 			case LSR_AB: /* LSR Absolute. */
 			case LSR_Z: /* LSR Zero Matrix. */
 				lsr(cpu, value.u64, thread);
 				break;
-			case ARB_IMP: /* Arithmetic shift Right accumulator by B. */
+			case ASR_B: /* ASR B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case ASR_IMM: /* ASR Immediate. */
 			case ASR_AB: /* ASR Absolute. */
@@ -364,7 +364,7 @@ void *run(void *args) {
 					cpu->pc = address.u64;
 				}
 				break;
-			case RLB_IMP: /* Rotate Left accumulator by B. */
+			case ROL_B: /* ROL B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case ROL_IMM: /* ROL Immediate. */
 			case ROL_AB: /* ROL Absolute. */
@@ -376,7 +376,7 @@ void *run(void *args) {
 					cpu->pc = address.u64;
 				}
 				break;
-			case RRB_IMP: /* Rotate Right accumulator by B. */
+			case ROR_B: /* ROR B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case ROR_IMM: /* ROR Immediate. */
 			case ROR_AB: /* ROR Absolute. */
@@ -388,7 +388,7 @@ void *run(void *args) {
 					cpu->pc = address.u64;
 				}
 				break;
-			case MAB_IMP: /* Multiply Accumulator by B. */
+			case MUL_B: /* MUL B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case MUL_IMM: /* MUL Immediate. */
 			case MUL_AB: /* MUL Absolute. */
@@ -401,7 +401,7 @@ void *run(void *args) {
 				}
 				break;
 			case DIV_IMM: /* DIV Immediate. */
-			case DAB_IMP: /* Divide Accumulator by B. */
+			case DIV_B: /* DIV B register. */
 			case DIV_AB: /* DIV Absolute. */
 			case DIV_Z: /* DIV Zero Matrix. */
 				divd(cpu, value.u64, opcode, thread);
@@ -417,7 +417,7 @@ void *run(void *args) {
 			case CPB_IY: /* CPB Indirect Indexed. */
 				cmp(cpu, value.u64, cpu->b, thread);
 				break;
-			case CAB_IMP: /* Compare Accumulator, and B. */
+			case CMP_B: /* CMP B register. */
 				value.u64 = cpu->b; /* Falls Through. */
 			case CMP_IMM: /* CMP Immediate. */
 			case CMP_AB: /* CMP Absolute. */