- Refactored the opcode table, in order to make the

  instruction formatting simpler.

- Refactored the instruction table of the emulator's
  assembler, it now has two parts, the addressing mode
  bits, and the base value.

  The base value is what's used to generate the actual
  opcode, with the addressing mode bits telling the
  assembler what addressing modes this instruction
  supports.

  The reason for doing this was to use less space. For
  comparison, the previous version used 870 bytes for
  the instruction table, while the new version uses
  only 222 bytes. The new version is nearly 4 times
  smaller than the pervious version.

- The B register based ALU instructions now use their
  own addressing mode, and are specified by using 'b'
  as the operand for those instructions.
  For example, to add the Accumulator with the B
  register, you now use "ADC B" instead of "AAB".

1 files changed, 141 insertions, 141 deletions

diff --git a/tables.h b/tables.h
index 0c955dd..16d5563 100644
--- a/tables.h
+++ b/tables.h
@@ -3,171 +3,171 @@
 static const uint8_t optype[0x100] = {
 	[CPS_IMP ] = IMPL,
 	[ADC_IMM ] = IMM,
-	[AAB_IMP ] = IMPL,
-	[ADC_AB  ] = ABS,
-	[LDA_IN  ] = IND,
+	[ROR_IMM ] = IMM,
+	[CPB_IMM ] = IMM,
 	[ADC_Z   ] = ZM,
+	[ROR_Z   ] = ZM,
+	[CPB_Z   ] = ZM,
 	[CLC_IMP ] = IMPL,
-	[DEX_IMP ] = IMPL,
-	[DEC_IMP ] = IMPL,
-	[DEC_AB  ] = ABS,
-	[DEC_Z   ] = ZM,
+	[TAB_IMP ] = IMPL,
+	[STY_Z   ] = ZM,
 	[JMP_AB  ] = ABS,
+	[ADC_AB  ] = ABS,
+	[ROR_AB  ] = ABS,
+	[CPB_AB  ] = ABS,
+	[ADC_B   ] = BREG,
+	[ROR_B   ] = BREG,
+	[STY_AB  ] = ABS,
+	[SEC_IMP ] = IMPL,
+	[TBA_IMP ] = IMPL,
+	[JMP_Z   ] = ZM,
 	[SBC_IMM ] = IMM,
-	[SAB_IMP ] = IMPL,
-	[SBC_AB  ] = ABS,
-	[STA_IN  ] = IND,
+	[MUL_IMM ] = IMM,
+	[CPX_IMM ] = IMM,
 	[SBC_Z   ] = ZM,
-	[SEC_IMP ] = IMPL,
-	[INX_IMP ] = IMPL,
-	[INC_IMP ] = IMPL,
-	[INC_AB  ] = ABS,
-	[INC_Z   ] = ZM,
+	[MUL_Z   ] = ZM,
+	[CPX_Z   ] = ZM,
+	[CLI_IMP ] = IMPL,
+	[TAY_IMP ] = IMPL,
+	[STA_Z   ] = ZM,
+	[STA_ZX  ] = ZMX,
 	[JSR_AB  ] = ABS,
+	[SBC_AB  ] = ABS,
+	[MUL_AB  ] = ABS,
+	[CPX_AB  ] = ABS,
+	[SBC_B   ] = BREG,
+	[MUL_B   ] = BREG,
+	[STA_AB  ] = ABS,
+	[SEI_IMP ] = IMPL,
+	[TYA_IMP ] = IMPL,
+	[STA_ZY  ] = ZMY,
+	[STA_IX  ] = INDX,
+	[JSR_Z   ] = ZM,
 	[AND_IMM ] = IMM,
-	[ABA_IMP ] = IMPL,
-	[AND_AB  ] = ABS,
-	[CMP_IN  ] = IND,
+	[DIV_IMM ] = IMM,
+	[CPY_IMM ] = IMM,
 	[AND_Z   ] = ZM,
-	[CLI_IMP ] = IMPL,
-	[DEY_IMP ] = IMPL,
-	[CPB_IMM ] = IMM,
-	[CPB_AB  ] = ABS,
-	[CPB_Z   ] = ZM,
-	[JMP_Z   ] = ZM,
-	[ORA_IMM ] = IMM,
-	[OAB_IMP ] = IMPL,
-	[ORA_AB  ] = ABS,
-	[LDB_IN  ] = IND,
-	[ORA_Z   ] = ZM,
-	[SEI_IMP ] = IMPL,
-	[INY_IMP ] = IMPL,
-	[CPX_IMM ] = IMM,
-	[CPX_AB  ] = ABS,
+	[DIV_Z   ] = ZM,
 	[CPY_Z   ] = ZM,
-	[JSR_Z   ] = ZM,
-	[XOR_IMM ] = IMM,
-	[XAB_IMP ] = IMPL,
-	[XOR_AB  ] = ABS,
-	[STB_IN  ] = IND,
-	[XOR_Z   ] = ZM,
 	[CLV_IMP ] = IMPL,
-	[CPY_IMM ] = IMM,
+	[TAX_IMP ] = IMPL,
+	[STB_Z   ] = ZM,
+	[STB_ZX  ] = ZMX,
+	[RTS_IMP ] = IMPL,
+	[AND_AB  ] = ABS,
+	[DIV_AB  ] = ABS,
 	[CPY_AB  ] = ABS,
-	[CPX_Z   ] = ZM,
-	[BPO_REL ] = REL,
-	[LSL_IMM ] = IMM,
-	[LLB_IMP ] = IMPL,
-	[LSL_AB  ] = ABS,
-	[CPB_IN  ] = IND,
-	[LSL_Z   ] = ZM,
+	[AND_B   ] = BREG,
+	[DIV_B   ] = BREG,
+	[STB_AB  ] = ABS,
 	[WAI_IMP ] = IMPL,
-	[PHP_IMP ] = IMPL,
-	[TAB_IMP ] = IMPL,
-	[LDA_IY  ] = INDY,
-	[LDA_IX  ] = INDX,
-	[BNG_REL ] = REL,
-	[LSR_IMM ] = IMM,
-	[LRB_IMP ] = IMPL,
-	[LSR_AB  ] = ABS,
-	[LDY_IN  ] = IND,
-	[LSR_Z   ] = ZM,
+	[TXA_IMP ] = IMPL,
+	[STB_ZY  ] = ZMY,
+	[STB_IX  ] = INDX,
+	[RTI_IMP ] = IMPL,
+	[ORA_IMM ] = IMM,
+	[ASR_IMM ] = IMM,
+	[LDX_IMM ] = IMM,
+	[ORA_Z   ] = ZM,
+	[ASR_Z   ] = ZM,
+	[LDX_Z   ] = ZM,
 	[BRK_IMP ] = IMPL,
+	[TYX_IMP ] = IMPL,
+	[STX_Z   ] = ZM,
+	[PHP_IMP ] = IMPL,
+	[BPO_REL ] = REL,
+	[ORA_AB  ] = ABS,
+	[ASR_AB  ] = ABS,
+	[LDX_AB  ] = ABS,
+	[ORA_B   ] = BREG,
+	[ASR_B   ] = BREG,
+	[STX_AB  ] = ABS,
+	[DEY_IMP ] = IMPL,
+	[TXY_IMP ] = IMPL,
+	[CPB_IN  ] = IND,
 	[PLP_IMP ] = IMPL,
-	[TBA_IMP ] = IMPL,
-	[STA_IY  ] = INDY,
-	[STA_IX  ] = INDX,
+	[BNG_REL ] = REL,
+	[XOR_IMM ] = IMM,
+	[CMP_IMM ] = IMM,
+	[DEC_IMP ] = IMPL,
+	[XOR_Z   ] = ZM,
+	[CMP_Z   ] = ZM,
+	[DEC_Z   ] = ZM,
+	[INY_IMP ] = IMPL,
+	[TSX_IMP ] = IMPL,
+	[CMP_IN  ] = IND,
+	[PHA_IMP ] = IMPL,
 	[BCS_REL ] = REL,
-	[ROL_IMM ] = IMM,
-	[RLB_IMP ] = IMPL,
-	[ROL_AB  ] = ABS,
+	[XOR_AB  ] = ABS,
+	[CMP_AB  ] = ABS,
+	[DEC_AB  ] = ABS,
+	[XOR_B   ] = BREG,
+	[CMP_B   ] = BREG,
+	[DEB_IMP ] = IMPL,
+	[TXS_IMM ] = IMM,
 	[STY_IN  ] = IND,
-	[ROL_Z   ] = ZM,
-	[LDA_ZY  ] = ZMY,
-	[PHA_IMP ] = IMPL,
-	[TAY_IMP ] = IMPL,
-	[CMP_IY  ] = INDY,
-	[CMP_IX  ] = INDX,
-	[BCC_REL ] = REL,
-	[ROR_IMM ] = IMM,
-	[RRB_IMP ] = IMPL,
-	[ROR_AB  ] = ABS,
-	[LDX_IN  ] = IND,
-	[ROR_Z   ] = ZM,
-	[STA_ZY  ] = ZMY,
 	[PLA_IMP ] = IMPL,
-	[TYA_IMP ] = IMPL,
-	[LDB_IY  ] = INDY,
-	[LDB_IX  ] = INDX,
-	[BEQ_REL ] = REL,
-	[MUL_IMM ] = IMM,
-	[MAB_IMP ] = IMPL,
-	[MUL_AB  ] = ABS,
-	[STX_IN  ] = IND,
-	[MUL_Z   ] = ZM,
-	[LDB_ZY  ] = ZMY,
+	[BCC_REL ] = REL,
+	[LSL_IMM ] = IMM,
+	[LDY_IMM ] = IMM,
+	[INC_IMP ] = IMPL,
+	[LSL_Z   ] = ZM,
+	[LDY_Z   ] = ZM,
+	[INC_Z   ] = ZM,
+	[INB_IMP ] = IMPL,
+	[CMP_IX  ] = INDX,
+	[LDY_IN  ] = IND,
 	[PHB_IMP ] = IMPL,
-	[TAX_IMP ] = IMPL,
-	[STB_IY  ] = INDY,
-	[STB_IX  ] = INDX,
-	[BNE_REL ] = REL,
-	[DIV_IMM ] = IMM,
-	[DAB_IMP ] = IMPL,
-	[DIV_AB  ] = ABS,
-	[JSR_IN  ] = IND,
-	[DIV_Z   ] = ZM,
-	[STB_ZY  ] = ZMY,
-	[PLB_IMP ] = IMPL,
-	[TXA_IMP ] = IMPL,
-	[CPB_IY  ] = INDY,
+	[BEQ_REL ] = REL,
+	[LSL_AB  ] = ABS,
+	[LDY_AB  ] = ABS,
+	[INC_AB  ] = ABS,
+	[LSL_B   ] = BREG,
+	[DEX_IMP ] = IMPL,
 	[CPB_IX  ] = INDX,
-	[BVS_REL ] = REL,
-	[CMP_IMM ] = IMM,
-	[CAB_IMP ] = IMPL,
-	[CMP_AB  ] = ABS,
-	[JMP_IN  ] = IND,
-	[CMP_Z   ] = ZM,
-	[LDA_ZX  ] = ZMX,
-	[LDX_IMM ] = IMM,
-	[TYX_IMP ] = IMPL,
-	[LDX_AB  ] = ABS,
-	[LDX_Z   ] = ZM,
-	[BVC_REL ] = REL,
+	[LDX_IN  ] = IND,
+	[PLB_IMP ] = IMPL,
+	[BNE_REL ] = REL,
+	[LSR_IMM ] = IMM,
 	[LDA_IMM ] = IMM,
-	[DEB_IMP ] = IMPL,
-	[LDA_AB  ] = ABS,
+	[LDA_IN  ] = IND,
+	[LSR_Z   ] = ZM,
 	[LDA_Z   ] = ZM,
-	[STA_ZX  ] = ZMX,
+	[LDA_ZX  ] = ZMX,
+	[INX_IMP ] = IMPL,
+	[STA_IY  ] = INDY,
+	[STX_IN  ] = IND,
 	[PHY_IMP ] = IMPL,
-	[TXY_IMP ] = IMPL,
-	[STA_AB  ] = ABS,
-	[STA_Z   ] = ZM,
-	[BRA_REL ] = REL,
+	[BVS_REL ] = REL,
+	[LSR_AB  ] = ABS,
+	[LDA_AB  ] = ABS,
+	[STA_IN  ] = IND,
+	[LSR_B   ] = BREG,
+	[LDA_ZY  ] = ZMY,
+	[LDA_IX  ] = INDX,
+	[LDA_IY  ] = INDY,
+	[STB_IY  ] = INDY,
+	[JSR_IN  ] = IND,
+	[PLY_IMP ] = IMPL,
+	[BVC_REL ] = REL,
+	[ROL_IMM ] = IMM,
 	[LDB_IMM ] = IMM,
-	[INB_IMP ] = IMPL,
-	[LDB_AB  ] = ABS,
+	[LDB_IN  ] = IND,
+	[ROL_Z   ] = ZM,
 	[LDB_Z   ] = ZM,
 	[LDB_ZX  ] = ZMX,
-	[PLY_IMP ] = IMPL,
-	[TSX_IMP ] = IMPL,
-	[STB_AB  ] = ABS,
-	[STB_Z   ] = ZM,
-	[RTS_IMP ] = IMPL,
-	[LDY_IMM ] = IMM,
-	[LDY_AB  ] = ABS,
-	[LDY_Z   ] = ZM,
-	[STB_ZX  ] = ZMX,
-	[PHX_IMP ] = IMPL,
+	[LDB_IY  ] = INDY,
 	[NOP_IMP ] = IMPL,
-	[STY_AB  ] = ABS,
-	[STY_Z   ] = ZM,
-	[RTI_IMP ] = IMPL,
-	[ASR_IMM ] = IMM,
-	[ARB_IMP ] = IMPL,
-	[ASR_AB  ] = ABS,
-	[ASR_Z   ] = ZM,
-	[PLX_IMP ] = IMPL,
-	[TXS_IMM ] = IMM,
-	[STX_AB  ] = ABS,
-	[STX_Z   ] = ZM
+	[JMP_IN  ] = IND,
+	[PHX_IMP ] = IMPL,
+	[BRA_REL ] = REL,
+	[ROL_AB  ] = ABS,
+	[LDB_AB  ] = ABS,
+	[STB_IN  ] = IND,
+	[ROL_B   ] = BREG,
+	[LDB_ZY  ] = ZMY,
+	[LDB_IX  ] = INDX,
+	[CMP_IY  ] = INDY,
+	[CPB_IY  ] = INDY,
+	[PLX_IMP ] = IMPL
 };