summaryrefslogtreecommitdiff
path: root/sux.h
AgeCommit message (Expand)Author
2022-02-13sux.h: Add bitmask for b register addressing mode.mrb0nk500
2022-02-09sux.{c,h}, opcode.h, disasm.c: Add code to use the newmrb0nk500
2022-02-09sux.h: Fix some bugs in the interrupt bitmasks.mrb0nk500
2022-02-02sux.c, sux.h: Add code for using the new instructionmrb0nk500
2022-02-02sux.h: Remove unneeded, and inaccurate cycle increments.mrb0nk500
2022-02-02sux.h, io.c: Added support for setting key timeout.mrb0nk500
2022-02-02sux.h: Added a `tick()` function.mrb0nk500
2022-02-02sux.h: Add third implementation of the `t()` macro.mrb0nk500
2022-02-02sux.h: Corrected some typos, and fixed some bugs inmrb0nk500
2022-01-29sux.h: Added bitmasks for updating the status flags.mrb0nk500
2022-01-29sux.h: Make `msb` non const.mrb0nk500
2022-01-24sux.h: Add bitmasks for writing registers.mrb0nk500
2022-01-24sux.h: Corrected typo in `reg2` initialization.mrb0nk500
2022-01-24sux.h: Add bitmasks for arithmetic operations.mrb0nk500
2022-01-24sux.h: Add bitmasks for register transfers.mrb0nk500
2022-01-24sux.h: Correct typos in bitmasks for registermrb0nk500
2022-01-21sux.h: Use conditional branch code for unconditionalmrb0nk500
2022-01-21sux.h: Add bitmask for relative addressing.mrb0nk500
2022-01-21sux.h: Add bitmasks for conditional branches.mrb0nk500
2022-01-21sux.h: Corrected typos in bitmasks that dealt withmrb0nk500
2022-01-21sux.h: Add bitmasks for setting/testing/clearing flags,mrb0nk500
2022-01-19sux.h: Add bitmask for unconditional jumps.mrb0nk500
2022-01-19sux.h: Add bitmasks for stack related operations.mrb0nk500
2022-01-19sux.h: Make `rs` non const.mrb0nk500
2022-01-19sux.h: Set program counter to interrupt vectors, whenmrb0nk500
2022-01-19sux.h: Add bitmasks for writing a value to memory.mrb0nk500
2022-01-19sux.h: Corrected bitmask for `reg = &cpu->a;`.mrb0nk500
2022-01-18Add bitmasks for operations that mogrify (overwrite)mrb0nk500
2022-01-18Add bitmask for instructions that use the processormrb0nk500
2022-01-18Remove `pbits` from instruction handler.mrb0nk500
2022-01-18Initialize `tmp`, and `tmp2` to `0`, rather than `-1`.mrb0nk500
2022-01-18Add the rest of the load opcodes to the other registermrb0nk500
2022-01-18Add `LDA` opcodes to accumulator bitmask.mrb0nk500
2022-01-16Add bitmasks for the registers.mrb0nk500
2022-01-14Consolidate reading addresses for non-indirect addressingmrb0nk500
2022-01-14Add bitmasks for indexing, and indirect addressing.mrb0nk500
2022-01-14Add bitmasks for reading data from memory, andmrb0nk500
2022-01-14Add bitmask for absolute addressing.mrb0nk500
2022-01-14Start work on new instruction handler macro.mrb0nk500
2021-04-04- Fixed a bug to do with how SIB operands were parsedmrb0nk500
2021-02-13- Reverted back one commit before the previous commit.mrb0nk500
2021-01-27- Fixed some bugs in the emulator.mrb0nk500
2020-12-09- Made the emulator's debugger use individual windows.mrb0nk500
2020-12-09- Made the `set` instruction also set the Zero flag.mrb0nk500
2020-12-09- Implemented support for the `set` instruction in themrb0nk500
2020-12-08- Fixed yet another bug with the ortho extension.mrb0nk500
2020-12-08- Fixed a bug with the ortho extension implementationmrb0nk500
2020-12-08- Implemented support for the Orthogonal extension intomrb0nk500
2020-11-20- Implemented support for Sux's base extension.mrb0nk500
2020-11-20- Cleaned up a bit of the code.mrb0nk500