enum am {
	/* Part of Base ISA. */
	IMM,  /* Immediate Data. */
	ZM,   /* Zero Matrix. */
	ZMX,  /* Zero Matrix, indexed with X. */
	ZMY,  /* Zero Matrix, indexed with Y. */
	IND,  /* Indirect. */
	INDX, /* Indexed Indirect. */
	INDY, /* Indirect Indexed. */
	ABS,  /* Absolute. */
	REL,  /* Relative to Program Counter. */
	BREG, /* B Register. */
	IMPL, /* Implied. */
	/* Part of Base Extension. */
	ABSX, /* Absolute, Indexed with X. */
	ABSY, /* Absolute, Indexed with Y. */
	SPI,  /* Stack Pointer, Immediate Offset. */
	SPX,  /* Stack Pointer, Offset with X. */
	SPY,  /* Stack Pointer, Offset with Y. */
	INA,  /* Absolute Indirect. */
	INAX, /* Absolute Indexed Indirect. */
	INAY, /* Absolute Indirect Indexed. */
	EIND, /* Effective Address Register, Indirect. */
};

enum mne {
	ADC,
	AND,
	ASR,
	BCC,
	BCS,
	BEQ,
	BNE,
	BNG,
	BPO,
	BRA,
	BRK,
	BVC,
	BVS,
	CLC,
	CLI,
	CLV,
	CMP,
	CPB,
	CPS,
	CPX,
	CPY,
	DEB,
	DEC,
	DEX,
	DEY,
	DIV,
	INB,
	INC,
	INX,
	INY,
	JMP,
	JSR,
	LDA,
	LDB,
	LDX,
	LDY,
	LSL,
	LSR,
	MUL,
	NOP,
	ORA,
	PHA,
	PHB,
	PHP,
	PHX,
	PHY,
	PLA,
	PLB,
	PLP,
	PLX,
	PLY,
	ROL,
	ROR,
	RTI,
	RTS,
	SBC,
	SEC,
	SEI,
	STA,
	STB,
	STX,
	STY,
	TAB,
	TAX,
	TAY,
	TBA,
	TSX,
	TXA,
	TXS,
	TXY,
	TYA,
	TYX,
	WAI,
	XOR
};

enum base_isa {
	CPS_IMP = 0x00, /* Clear Processor Status. */
	ADC_IMM = 0x01, /* ADd with Carry. */
	ROR_IMM = 0x02, /* ROtate Right. */
	CPB_IMM = 0x04, /* ComPare B register. */
	ADC_Z   = 0x05, /* ADC Zero Matrix. */
	ROR_Z   = 0x06, /* ROR Zero Matrix. */
	CPB_Z   = 0x08, /* CPB Zero Matrix. */
	CLC_IMP = 0x09, /* CLear Carry flag. */
	TAB_IMP = 0x0A, /* Transfer Accumulator to B.  */
	STY_Z   = 0x0C, /* STore Y register. */
	JMP_AB  = 0x10, /* JMP Absolute. */
	ADC_AB  = 0x11, /* ADC Absolute. */
	ROR_AB  = 0x12, /* ROR Absolute. */
	CPB_AB  = 0x14, /* CPB Absolute. */
	ADC_B   = 0x15, /* ADC B Register. */
	ROR_B   = 0x16, /* ROR B Register. */
	STY_AB  = 0x18, /* STY Absolute. */
	SEC_IMP = 0x19, /* SEt Carry flag. */
	TBA_IMP = 0x1A, /* Transfer B to Accumulator.  */
	JMP_Z   = 0x20, /* JuMP to memory location. */
	SBC_IMM = 0x21, /* SuBtract with Carry. */
	MUL_IMM = 0x22, /* MULtiply accumulator. */
	CPX_IMM = 0x24, /* ComPare X register. */
	SBC_Z   = 0x25, /* SBC Zero Matrix. */
	MUL_Z   = 0x26, /* MUL Zero Matrix. */
	CPX_Z   = 0x28, /* CPX Zero Matrix. */
	CLI_IMP = 0x29, /* CLear Interupt flag. */
	TAY_IMP = 0x2A, /* Transfer Accumulator to Y. */
	STA_Z   = 0x2C, /* STore Accumulator. */
	STA_ZX  = 0x2E, /* STA Zero Marrix, Indexed with X. */
	JSR_AB  = 0x30, /* JSR Absolute. */
	SBC_AB  = 0x31, /* SBC Absolute. */
	MUL_AB  = 0x32, /* MUL Absolute. */
	CPX_AB  = 0x34, /* CPX Absolute. */
	SBC_B   = 0x35, /* SBC B Register. */
	MUL_B   = 0x36, /* MUL B Register. */
	STA_AB  = 0x38, /* STA Absolute. */
	SEI_IMP = 0x39, /* SEt Interupt flag. */
	TYA_IMP = 0x3A, /* Transfer Y to Accumulator. */
	STA_ZY  = 0x3C, /* STA Zero Marrix, Indexed with Y. */
	STA_IX  = 0x3E, /* STA Indexed Indirect. */
	JSR_Z   = 0x40, /* Jump to SubRoutine. */
	AND_IMM = 0x41, /* bitwise AND with accumulator. */
	DIV_IMM = 0x42, /* DIVide with accumulator. */
	CPY_IMM = 0x44, /* ComPare Y register. */
	AND_Z   = 0x45, /* AND Zero Matrix. */
	DIV_Z   = 0x46, /* DIV Zero Matrix. */
	CPY_Z   = 0x48, /* CPY Zero Matrix. */
	CLV_IMP = 0x49, /* CLear oVerflow flag. */
	TAX_IMP = 0x4A, /* Transfer Accumulator to X. */
	STB_Z   = 0x4C, /* STore B register. */
	STB_ZX  = 0x4E, /* STB Zero Marrix, Indexed with X. */
	RTS_IMP = 0x50, /* ReTurn from Subroutine. */
	AND_AB  = 0x51, /* AND Absolute. */
	DIV_AB  = 0x52, /* DIV Absolute. */
	CPY_AB  = 0x54, /* CPY Absolute. */
	AND_B   = 0x55, /* AND B Register. */
	DIV_B   = 0x56, /* DIV B Register. */
	STB_AB  = 0x58, /* STB Absolute. */
	WAI_IMP = 0x59, /* WAit for Interrupt. */
	TXA_IMP = 0x5A, /* Transfer X to Accumulator. */
	STB_ZY  = 0x5C, /* STB Zero Marrix, Indexed with Y. */
	STB_IX  = 0x5E, /* STB Indexed Indirect. */
	RTI_IMP = 0x60, /* ReTurn from Interrupt. */
	ORA_IMM = 0x61, /* bitwise OR with Accumulator. */
	ASR_IMM = 0x62, /* Arithmetic Shift Right. */
	LDX_IMM = 0x64, /* LoaD X register. */
	ORA_Z   = 0x65, /* ORA Zero Matrix. */
	ASR_Z   = 0x66, /* ASR Zero Matrix. */
	LDX_Z   = 0x68, /* LDX Zero Matrix. */
	BRK_IMP = 0x69, /* BReaK. */
	TYX_IMP = 0x6A, /* Transfer Y to X. */
	STX_Z   = 0x6C, /* STore X register. */
	PHP_IMP = 0x6E, /* PusH Processor status to stack. */
	BPO_REL = 0x70, /* Branch if POsitive. */
	ORA_AB  = 0x71, /* ORA Absolute. */
	ASR_AB  = 0x72, /* ASR Absolute. */
	LDX_AB  = 0x74, /* LDX Absolute. */
	ORA_B   = 0x75, /* ORA B Register. */
	ASR_B   = 0x76, /* ASR B Register. */
	STX_AB  = 0x78, /* STX Absolute. */
	DEY_IMP = 0x79, /* DEcrement Y register. */
	TXY_IMP = 0x7A, /* Transfer X to Y. */
	CPB_IN  = 0x7C, /* CPB Indirect */
	PLP_IMP = 0x7E, /* PuLl Processor status from stack. */
	BNG_REL = 0x80, /* Branch if NeGative. */
	XOR_IMM = 0x81, /* bitwise XOR with accumulator. */
	CMP_IMM = 0x82, /* CoMPare accumulator. */
	DEC_IMP = 0x84, /* DECrement accumulator. */
	XOR_Z   = 0x85, /* XOR Zero Matrix. */
	CMP_Z   = 0x86, /* CMP Zero Matrix. */
	DEC_Z   = 0x88, /* DEC Zero Matrix. */
	INY_IMP = 0x89, /* INcrement Y register. */
	TSX_IMP = 0x8A, /* Transfer Stack pointer to X. */
	CMP_IN  = 0x8C, /* CMP Indirect */
	PHA_IMP = 0x8E, /* PusH Accumulator to stack. */
	BCS_REL = 0x90, /* Branch if Carry Set. */
	XOR_AB  = 0x91, /* XOR Absolute. */
	CMP_AB  = 0x92, /* CMP Absolute. */
	DEC_AB  = 0x94, /* DEC Absolute. */
	XOR_B   = 0x95, /* XOR B Register. */
	CMP_B   = 0x96, /* CMP B Register. */
	DEB_IMP = 0x99, /* Decrement B register. */
	TXS_IMM = 0x9A, /* Transfer X to Stack pointer. */
	STY_IN  = 0x9C, /* STY Indirect */
	PLA_IMP = 0x9E, /* PuLl Accumulator from stack. */
	BCC_REL = 0xA0, /* Branch if Carry Clear. */
	LSL_IMM = 0xA1, /* Logical Shift Left. */
	LDY_IMM = 0xA2, /* LoaD Y register. */
	INC_IMP = 0xA4, /* INCrement accumulator. */
	LSL_Z   = 0xA5, /* LSL Zero Matrix. */
	LDY_Z   = 0xA6, /* LDY Zero Matrix. */
	INC_Z   = 0xA8, /* INC Zero Matrix. */
	INB_IMP = 0xA9, /* Increment B register. */
	CMP_IX  = 0xAA, /* CMP Indexed Indirect. */
	LDY_IN  = 0xAC, /* LDY Indirect */
	PHB_IMP = 0xAE, /* PusH B register to stack. */
	BEQ_REL = 0xB0, /* Branch if EQual. */
	LSL_AB  = 0xB1, /* LSL Absolute. */
	LDY_AB  = 0xB2, /* LDY Absolute. */
	INC_AB  = 0xB4, /* INC Absolute. */
	LSL_B   = 0xB5, /* LSL B Register. */
	DEX_IMP = 0xB9, /* DEcrement X register. */
	CPB_IX  = 0xBA, /* CPB Indexed Indirect. */
	LDX_IN  = 0xBC, /* LDX Indirect */
	PLB_IMP = 0xBE, /* PuLl B register to stack. */
	BNE_REL = 0xC0, /* Branch if Not Equal. */
	LSR_IMM = 0xC1, /* Logical Shift Right. */
	LDA_IMM = 0xC2, /* LoaD Accumulator. */
	LDA_IN  = 0xC4, /* LDA Indirect */
	LSR_Z   = 0xC5, /* LSR Zero Matrix. */
	LDA_Z   = 0xC6, /* LDA Zero Matrix. */
	LDA_ZX  = 0xC8, /* LDA Zero Marrix, Indexed with X. */
	INX_IMP = 0xC9, /* INcrement X register. */
	STA_IY  = 0xCA, /* STA Indirect Indexed. */
	STX_IN  = 0xCC, /* STX Indirect */
	PHY_IMP = 0xCE, /* PusH Y register to stack. */
	BVS_REL = 0xD0, /* Branch if oVerflow Set. */
	LSR_AB  = 0xD1, /* LSR Absolute. */
	LDA_AB  = 0xD2, /* LDA Absolute. */
	STA_IN  = 0xD4, /* STA Indirect */
	LSR_B   = 0xD5, /* LSR B Register. */
	LDA_ZY  = 0xD6, /* LDA Zero Marrix, Indexed with Y. */
	LDA_IX  = 0xD8, /* LDA Indexed Indirect. */
	LDA_IY  = 0xD9, /* LDA Indirect Indexed. */
	STB_IY  = 0xDA, /* STB Indirect Indexed. */
	JSR_IN  = 0xDC, /* JSR Indirect */
	PLY_IMP = 0xDE, /* PuLl Y register from stack. */
	BVC_REL = 0xE0, /* Branch if oVerflow Clear. */
	ROL_IMM = 0xE1, /* ROtate Left. */
	LDB_IMM = 0xE2, /* LoaD B register. */
	LDB_IN  = 0xE4, /* LDB Indirect */
	ROL_Z   = 0xE5, /* ROL Zero Matrix. */
	LDB_Z   = 0xE6, /* LDB Zero Matrix. */
	LDB_ZX  = 0xE8, /* LDB Zero Marrix, Indexed with X. */
	LDB_IY  = 0xE9, /* LDB Indirect Indexed. */
	NOP_IMP = 0xEA, /* No OPeration. */
	JMP_IN  = 0xEC, /* JMP Indirect */
	PHX_IMP = 0xEE, /* PusH X register to stack. */
	BRA_REL = 0xF0, /* BRanch Always. */
	ROL_AB  = 0xF1, /* ROL Absolute. */
	LDB_AB  = 0xF2, /* LDB Absolute. */
	STB_IN  = 0xF4, /* STB Indirect */
	ROL_B   = 0xF5, /* ROL B Register. */
	LDB_ZY  = 0xF6, /* LDB Zero Marrix, Indexed with Y. */
	LDB_IX  = 0xF8, /* LDB Indexed Indirect. */
	CMP_IY  = 0xF9, /* CMP Indirect Indexed. */
	CPB_IY  = 0xFA, /* CPB Indirect Indexed. */
	PLX_IMP = 0xFE  /* PuLl X register from stack. */
};

enum base_ext {
	ADC_E   = 0x01, /* ADC E Indirect. */
	LEA_ZX  = 0x02, /* LEA Zero Matrix, indexed with X. */
	LEA_SX  = 0x03, /* LEA Stack Pointer, offset with X. */
	ADD     = 0x04, /* ADD without carry. */
	LLM     = 0x05, /* Logical shift Left, on Memory. */
	PHE     = 0x08, /* PusH Effective address register to stack. */
	CPB_E   = 0x09, /* CPB E Indirect. */
	DEC_E   = 0x0C, /* DEC E Indirect. */
	JMP_E   = 0x10, /* JMP E Indirect. */
	SBC_E   = 0x11, /* SBC E Indirect. */
	LEA_ZY  = 0x12, /* LEA Zero Matrix, indexed with Y. */
	LEA_SY  = 0x13, /* LEA Stack Pointer, offset with Y. */
	ADD_E   = 0x14, /* ADD E Indirect. */
	LLM_Z   = 0x15, /* LLM Zero Matrix. */
	CPY_E   = 0x19, /* CPY E Indirect. */
	INC_E   = 0x1C, /* INC E Indirect. */
	JSR_E   = 0x20, /* JSR E Indirect. */
	AND_E   = 0x21, /* AND E Indirect. */
	PEA_ZX  = 0x22, /* PEA Zero Matrix, indexed with X. */
	PEA_SX  = 0x23, /* PEA Stack Pointer, offset with X. */
	SUB     = 0x24, /* SUBtract without carry. */
	LLM_E   = 0x25, /* LLM E Indirect. */
	PLE     = 0x28, /* PuLl Effective address register from stack. */
	CPX_E   = 0x29, /* CPX E Indirect. */
	DEE     = 0x2C, /* DEcrement Effective address register. */
	BPO_E   = 0x30, /* BPO E Indirect. */
	ORA_E   = 0x31, /* ORA E Indirect. */
	PEA_ZY  = 0x32, /* PEA Zero Matrix, indexed with Y. */
	PEA_SY  = 0x33, /* PEA Stack Pointer, offset with Y. */
	SUB_E   = 0x34, /* SUB E Indirect. */
	LRM     = 0x35, /* Logical shift Right, on Memory. */
	CPE     = 0x39, /* ComPare Effective address register. */
	INE     = 0x3C, /* INcrement Effective address register. */
	BNG_E   = 0x40, /* BNG E Indirect. */
	XOR_E   = 0x41, /* XOR E Indirect. */
	LEA_AX  = 0x42, /* LEA Absolute, indexed with X. */
	LEA_SI  = 0x43, /* LEA Stack Pointer, Immediate offset. */
	ADE     = 0x44, /* ADd Effective address register. */
	LRM_Z   = 0x45, /* LRM Zero Matrix. */
	CPE_AB  = 0x49, /* CPE Absolute. */
	DES     = 0x4C, /* DEcrement Stack pointer. */
	BCS_E   = 0x50, /* BCS E Indirect. */
	LSL_E   = 0x51, /* LSL E Indirect. */
	LEA_AY  = 0x52, /* LEA Absolute, indexed with Y. */
	LEA_RE  = 0x53, /* LEA Relative. */
	ADE_A   = 0x54, /* ADE with Accumulator. */
	LRM_E   = 0x55, /* LRM E Indirect. */
	CPE_Z   = 0x59, /* CPE Zero Matrix. */
	INS     = 0x5C, /* INcrement Stack pointer. */
	BCC_E   = 0x60, /* BCC E Indirect. */
	LSR_E   = 0x61, /* LSR E Indirect. */
	PEA_AX  = 0x62, /* PEA Absolute, indexed with X. */
	PEA_SI  = 0x63, /* PEA Stack Pointer, Immediate offset. */
	SBE     = 0x64, /* SuBtract Effective address register. */
	RLM     = 0x65, /* Rotate Left, on Memory. */
	ICE     = 0x69, /* Interlocked Compare, and Exchange. */
	BEQ_E   = 0x70, /* BEQ E Indirect. */
	ROL_E   = 0x71, /* ROL E Indirect. */
	PEA_AY  = 0x72, /* PEA Absolute, indexed with Y. */
	PEA_RE  = 0x73, /* PEA Relative. */
	RLM_Z   = 0x75, /* RLM Zero Matrix. */
	ICE_Z   = 0x79, /* ICE Zero Matrix. */
	STE     = 0x7C, /* STore Effective address register. */
	BNE_E   = 0x80, /* BNE E Indirect. */
	ROR_E   = 0x81, /* ROR E Indirect. */
	LEA_IX  = 0x82, /* LEA Indexed Indirect. */
	LEA_IN  = 0x83, /* LEA Indirect. */
	ADS     = 0x84, /* ADd Stack pointer. */
	RLM_E   = 0x85, /* RLM E Indirect. */
	ICE_E   = 0x89, /* ICE E Indirect. */
	STE_Z   = 0x8C, /* STE Zero Matrix. */
	BVS_E   = 0x90, /* BVS E Indirect. */
	MUL_E   = 0x91, /* MUL E Indirect. */
	LEA_IY  = 0x92, /* LEA Indirect Indexed. */
	LEA_AI  = 0x93, /* LEA Absolute Indirect. */
	ADS_A   = 0x94, /* ADS with Accumulator. */
	RRM     = 0x95, /* Rotate Right, on Memory. */
	STZ     = 0x9C, /* STore Zero. */
	BVC_E   = 0xA0, /* BVC E Indirect. */
	DIV_E   = 0xA1, /* DIV E Indirect. */
	PEA_IX  = 0xA2, /* PEA Indexed Indirect. */
	PEA_IN  = 0xA3, /* PEA Indirect. */
	SBS     = 0xA4, /* SuBtract Stack pointer. */
	RRM_ZM  = 0xA5, /* RRM Zero Matrix. */
	STZ_ZM  = 0xAC, /* STZ Zero Matrix. */
	CMP_E   = 0xB1, /* CMP E Indirect. */
	PEA_IY  = 0xB2, /* PEA Indirect Indexed. */
	PEA_AI  = 0xB3, /* PEA Absolute Indirect. */
	SBS_A   = 0xB4, /* SBS with Accumulator. */
	RRM_E   = 0xB5, /* RRM E Indirect. */
	LDX_E   = 0xB9, /* LDX E Indirect. */
	STZ_E   = 0xBC, /* STZ E Indirect. */
	LDA_E   = 0xC1, /* LDA E Indirect. */
	LEA_AIX = 0xC2, /* LEA Absolute Indexed Indirect. */
	LEA_Z   = 0xC3, /* LEA Zero Matrix. */
	NOT     = 0xC4, /* bitwise NOT with accumulator. */
	ARM     = 0xC5, /* Arithmetic shift Right, on Memory. */
	LDE     = 0xC9, /* LoaD Effective address register. */
	STA_E   = 0xCC, /* STA E Indirect. */
	LDB_E   = 0xD1, /* LDB E Indirect. */
	LEA_AIY = 0xD2, /* LEA Absolute Indirect Indexed. */
	LEA     = 0xD3, /* Load Effective Address. */
	NOT_AB  = 0xD4, /* NOT Absolute. */
	ARM_Z   = 0xD5, /* ARM Zero Matrix. */
	LDE_AB  = 0xD9, /* LDE Absolute. */
	STB_E   = 0xDC, /* STB E Indirect. */
	LDY_E   = 0xE1, /* LDY E Indirect. */
	PEA_AIX = 0xE2, /* PEA Absolute Indexed Indirect. */
	PEA_Z   = 0xE3, /* PEA Zero Matrix. */
	NOT_Z   = 0xE4, /* NOT Zero Matrix. */
	ARM_E   = 0xE5, /* ARM E Indirect. */
	LDE_Z   = 0xE9, /* LDE Zero Matrix. */
	STY_E   = 0xEC, /* STY E Indirect. */
	ASR_E   = 0xF1, /* ASR E Indirect. */
	PEA_AIY = 0xF2, /* PEA Absolute Indirect Indexed. */
	PEA     = 0xF3, /* Push Effective Address. */
	NOT_E   = 0xF4, /* NOT E Indirect. */
	STX_E   = 0xFC, /* STX E Indirect. */
};