#include "opcode.h"
#include <pthread.h>

#if bench
#include <sys/time.h>
#endif
#include <curses.h>

#define THREADS	1
#define BENCH_INST 100000000 << (THREADS-1)
#define CTRL_ADDR 0x100
#define TX_ADDR 0x101
#define RX_ADDR 0x102
#define STEP_ADDR 0x110
#define CURSES_BACKSPACE 0x7F

extern uint8_t kbd_rdy;

extern WINDOW *scr;

#if debug
extern uint8_t subdbg;
#endif

extern uint8_t step;
extern uint8_t esc;

#define setflag(flag, bit) ((flag)) ? (cpu->ps.u8[thread] |= bit) : (cpu->ps.u8[thread] &= ~bit)
#define getflag(bit) (cpu->ps.u8[thread] & bit)

extern pthread_mutex_t mutex;
extern pthread_mutex_t main_mutex;
extern pthread_cond_t cond;
extern pthread_cond_t main_cond;

#if debug
extern void disasm(struct sux *cpu, uint64_t *operands, uint8_t lines, uint8_t opcode, uint8_t prefix, uint8_t thread);
#endif

extern void io(uint64_t address, uint8_t rw);

static inline uint64_t get_addr(struct sux *cpu, uint64_t *tmpaddr, uint8_t opcode, uint8_t prefix, uint8_t thread) {
	union reg address;
	union reg value;
	uint8_t tmp = 0;
	address.u64 = 0;
	value.u64 = 0;
	switch (optype[opcode]) {
		case IMPL:
			break;
		case IMM:
			address.u64 = cpu->pc;
			switch (opcode) {
				case PHB:
				case PHP:
				case PHA:
				case PHY:
				case PHX:
				case PLB:
				case PLP:
				case PLA:
				case PLY:
				case PLX:
				case STT:
				case LSL:
				case LSR:
				case ROL:
				case ROR:
				case ASR:
				case ENT: ++cpu->pc; break;
				default : cpu->pc+=(1 << (prefix >> 4)); /* Falls Through. */
				case TXS: break;
			}
			break;
		case ZM:
		case ZMX:
		case ZMY:
		case IND:
		case INDX:
		case INDY:
			tmp = 0;
			address.u8[0] = addr[cpu->pc];
			/* Unroll Loop by implementing Duff's Device. */
			tmp = get_addrsize(prefix, ZM)+1;
			setreg_sw(address.u8, 0, addr, cpu->pc, prefix, ZM, AM);
			cpu->pc+=tmp;
			#if debug && !bench
			*tmpaddr = address.u64;
			#endif
			#if getclk
			iclk++;
			#endif
			uint64_t reg = 0;
			switch (optype[opcode]) {
				case ZMX:
					address.u64 += cpu->x;
					#if getclk
					iclk++;
					#endif
					break;
				case ZMY:
					address.u64 += cpu->y;
					#if getclk
					iclk++;
					#endif
					break;
				case INDX:
				case INDY:
					if (optype[opcode] == INDX) {
						address.u64 += cpu->x;
						#if getclk
						iclk++;
						#endif
					} else {
						reg = cpu->y;
						#if getclk
						iclk++;
						#endif
					}
				case IND:
					setreg(value.u8, +, 0, addr, +, address.u64, 7);
					#if getclk
					iclk++;
					#endif
					value.u64 += reg;
					address.u64 = value.u64;
					break;
			}
			break;
		case ABS:
			tmp = get_addrsize(prefix, ABS)+1;
			setreg_sw(address.u8, 0, addr, cpu->pc, prefix, ABS, AM);
			cpu->pc+=tmp;
			#if getclk
			iclk++;
			#endif
			break;

	}
	return address.u64;
}

static inline void adc(struct sux *cpu, uint64_t value, uint8_t thread) {
	uint64_t sum = cpu->a+value+getflag(C);
	setflag(sum == 0, Z);
	setflag((sum >> 63), N);
	setflag(((cpu->a^value) >> 63) && ((cpu->a^sum) >> 63), V);
	setflag((sum < value), C);
	cpu->a = sum;
}
static inline void sbc(struct sux *cpu, uint64_t value, uint8_t thread) {
	uint64_t sum = cpu->a-value-!getflag(C);
	setflag(sum == 0, Z);
	setflag(sum >> 63, N);
	setflag(((cpu->a^value) >> 63) && ((cpu->a^sum) >> 63), V);
	setflag((sum > value), C);
	cpu->a = sum;
}

static inline void transfer(struct sux *cpu, uint64_t value, uint8_t opcode, uint8_t prefix, uint8_t thread) {
	uint64_t reg;
	switch (opcode) {
                case TBA: cpu->a = cpu->b; reg = cpu->a; break;
                case TXA: cpu->a = cpu->x; reg = cpu->a; break;
                case TYA: cpu->a = cpu->y; reg = cpu->a; break;
                case TAB: cpu->b = cpu->a; reg = cpu->b; break;
		case TAY: cpu->y = cpu->a; reg = cpu->y; break;
		case TXY: cpu->y = cpu->x; reg = cpu->y; break;
                case TAX: cpu->x = cpu->a; reg = cpu->x; break;
                case TYX: cpu->x = cpu->y; reg = cpu->x; break;
                case TSX: cpu->x = cpu->sp & 0xFFFF; cpu->x = cpu->stk_st << 16; break;
                case TXS: cpu->sp = cpu->x;
			if (prefix == 0x13 && (value == thread+1 || value > 8)) {
				cpu->stk_st = value & 0xFF;
				cpu->stk_st += value << 16;
				cpu->pc+=2;
			}
			break;
	}
	setflag(reg == 0, Z);
	setflag(reg >> 63, N);
}

static inline void push(struct sux *cpu, uint64_t size, uint64_t value, uint8_t thread) {
	union reg reg;
	reg.u64 = value;
	size = (size > 0) ? size-1 : 0;
	uint8_t tmp = (size <= 7) ? size : 7;
	setreg(addr, -, (cpu->stk_st << 16)+cpu->sp, reg.u8, +, 0, tmp);
	cpu->sp -= (tmp+1);
}

static inline uint64_t pull(struct sux *cpu, uint64_t size, uint8_t thread) {
	union reg reg;
	reg.u64 = 0;
	size = (size > 0) ? size-1 : 0;
	uint8_t tmp = (size <= 7) ? size : 7;
	cpu->sp += (tmp+1);
	setreg(reg.u8, +, 0, addr, -, (cpu->stk_st << 16)+cpu->sp, tmp);
	return reg.u64;
}

static inline void and(struct sux *cpu, uint64_t value, uint8_t thread) {
	cpu->a &= value;
	setflag(cpu->a == 0, Z);
	setflag(cpu->a >> 63, N);
}
static inline void or(struct sux *cpu, uint64_t value, uint8_t thread) {
	cpu->a |= value;
	setflag(cpu->a == 0, Z);
	setflag(cpu->a >> 63, N);
}
static inline void xor(struct sux *cpu, uint64_t value, uint8_t thread) {
	cpu->a ^= value;
	setflag(cpu->a == 0, Z);
	setflag(cpu->a >> 63, N);
}

static inline void lsl(struct sux *cpu, uint64_t value, uint8_t thread) {
	uint64_t sum = (value < 64) ? cpu->a << value : 0;
	setflag(sum == 0, Z);
	setflag(sum >> 63, N);
	setflag(cpu->a >> (64-value), C);
	cpu->a = sum;
}

static inline void lsr(struct sux *cpu, uint64_t value, uint8_t thread) {
	uint64_t sum = (value < 64) ? cpu->a >> value : 0;
	setflag(sum == 0, Z);
	setflag(sum >> 63, N);
	setflag(cpu->a & 1, C);
	cpu->a = sum;
}

static inline void asr(struct sux *cpu, uint64_t value, uint8_t thread) {
	uint8_t sign = cpu->a >> 63;
	uint64_t sum = (value < 64) ? (cpu->a >> value) | ((uint64_t)sign << 63) : 0;
	setflag(sum == 0, Z);
	setflag(sum >> 63, N);
	setflag(cpu->a & 1, C);
	cpu->a = sum;
}

static inline void rol(struct sux *cpu, uint64_t value, uint8_t thread) {
	uint64_t sum = cpu->a << value;
	sum |= getflag(C);
	setflag(sum == 0, Z);
	setflag(sum >> 63, N);
	setflag(cpu->a >> (uint64_t)(64-value), C);
	cpu->a = sum;
}

static inline void ror(struct sux *cpu, uint64_t value, uint8_t thread) {
	uint64_t sum = cpu->a >> value;
	sum |= (uint64_t)getflag(C) << (uint64_t)(64-value);
	setflag(sum == 0, Z);
	setflag(sum >> 63, N);
	setflag(cpu->a & 1, C);
	cpu->a = sum;
}
static inline void mul(struct sux *cpu, uint64_t value, uint8_t thread) {
	uint64_t sum = cpu->a*value;
	cpu->a = sum;
	setflag(sum == 0, Z);
	setflag(sum >> 63, N);
	setflag(!((cpu->a^value) >> 63) && ((cpu->a^sum) >> 63), V);
}

static inline void divd(struct sux *cpu, uint64_t value, uint8_t opcode, uint8_t thread) {
	uint64_t sum = cpu->a/value;
	if (opcode != DAB) {
		cpu->b = cpu->a % value;
	} else {
		value = cpu->b;
		cpu->x = cpu->a % value;
	}
	cpu->a = sum;
	setflag(sum == 0, Z);
	setflag((sum >> 63), N);
}
static inline void cmp(struct sux *cpu, uint64_t value, uint64_t reg, uint8_t thread) {
	uint64_t sum = reg-value;
	setflag(sum >> 63, N);
	setflag(((reg^value) >> 63) && ((reg^sum) >> 63), V);
	setflag(sum == 0, Z);
	setflag(reg >= value, C);
}

/* Increment, or Decrement register. */
static inline uint64_t idr(struct sux *cpu, uint64_t reg, uint8_t inc, uint8_t thread) {
	if (inc) {
		reg++;
	} else {
		reg--;
	}
	setflag(reg == 0, Z);
	setflag(reg >> 63, N);
	return reg;
}

/* Increment, or Decrement memory. */
static inline void idm(struct sux *cpu, uint64_t address, uint8_t prefix, uint8_t inc, uint8_t thread) {
	union reg value;
	value.u64 = 0;
	/* Unroll Loop by implementing Duff's Device. */
	setreg_sw(value.u8, 0, addr, address, prefix, 0, RS);
	if (inc) {
		value.u64++;
	} else {
		value.u64--;
	}
	setflag(value.u64 == 0, Z);
	setflag(value.u64 >> 7, N);
	setreg_sw(addr, address, value.u8, 0, prefix, 0, RS);
	io(address, 0);
}

static inline uint64_t load(struct sux *cpu, uint64_t address, uint64_t reg, uint8_t prefix, uint8_t thread) {
	io(address, 1);
	union reg value;
	value.u64 = reg;
	setreg_sw(value.u8, 0, addr, address, prefix, 0, RS);
	setflag(value.u64 == 0, Z);
	setflag(value.u64 >> 63, N);
	return value.u64;
}

static inline void store(struct sux *cpu, uint64_t address, uint64_t reg, uint8_t prefix, uint8_t thread) {
	union reg value;
	value.u64 = reg;
	setreg_sw(addr, address, value.u8, 0, prefix, 0, RS);
	#if (IO || debug) && !branch
	#if keypoll
	pthread_mutex_lock(&mutex);
	#endif
	io(address, 0);
	#if keypoll
	pthread_mutex_unlock(&mutex);
	#endif
	#endif
}