- Implemented support for Sux's base extension.

  This is the biggest milestone I've reached for this
  project, since the base extension changes alot about
  what Sux can do by default, and now makes it a viable
  instruction set for modern day use, when compared
  with other instruction sets.

1 files changed, 232 insertions, 138 deletions

diff --git a/enums.h b/enums.h
index 2670397..bca5010 100644
--- a/enums.h
+++ b/enums.h
@@ -1,26 +1,23 @@
 enum am {
 	/* Part of Base ISA. */
-	IMM,  /* Immediate Data. */
-	ZM,   /* Zero Matrix. */
-	ZMX,  /* Zero Matrix, indexed with X. */
-	ZMY,  /* Zero Matrix, indexed with Y. */
-	IND,  /* Indirect. */
-	INDX, /* Indexed Indirect. */
-	INDY, /* Indirect Indexed. */
-	ABS,  /* Absolute. */
-	REL,  /* Relative to Program Counter. */
-	BREG, /* B Register. */
-	IMPL, /* Implied. */
+	IMM,   /* Immediate Data. */
+	ZM,    /* Zero Matrix. */
+	ZMX,   /* Zero Matrix, indexed with X. */
+	ZMY,   /* Zero Matrix, indexed with Y. */
+	IND,   /* Indirect. */
+	INDX,  /* Indexed Indirect. */
+	INDY,  /* Indirect Indexed. */
+	ABS,   /* Absolute. */
+	REL,   /* Relative to Program Counter. */
+	BREG,  /* B Register. */
+	IMPL,  /* Implied. */
 	/* Part of Base Extension. */
-	ABSX, /* Absolute, Indexed with X. */
-	ABSY, /* Absolute, Indexed with Y. */
-	SPI,  /* Stack Pointer, Immediate Offset. */
-	SPX,  /* Stack Pointer, Offset with X. */
-	SPY,  /* Stack Pointer, Offset with Y. */
-	INA,  /* Absolute Indirect. */
-	INAX, /* Absolute Indexed Indirect. */
-	INAY, /* Absolute Indirect Indexed. */
-	EIND, /* Effective Address Register, Indirect. */
+	ABSX,  /* Absolute, Indexed with X. */
+	ABSY,  /* Absolute, Indexed with Y. */
+	AIND,  /* Absolute Indirect. */
+	AINDX, /* Absolute Indexed Indirect. */
+	AINDY, /* Absolute Indirect Indexed. */
+	EIND,  /* Effective Address Register, Indirect. */
 };
 
 enum mne {
@@ -100,6 +97,58 @@ enum mne {
 	XOR
 };
 
+enum ext_mne {
+	LEA,
+	PEA,
+	ADD,
+	SUB,
+	ADE,
+	SBE,
+	ADS,
+	SBS,
+	NOT,
+	LLM,
+	LRM,
+	RLM,
+	RRM,
+	ARM,
+	PHE,
+	PLE,
+	CPE,
+	ICE,
+	LDS,
+	DEE,
+	INE,
+	DES,
+	INS,
+	STS,
+	STE,
+	STZ,
+	SCO,
+	ECO,
+	CLZ,
+	CLO,
+	BIT,
+	MMV,
+	SWP,
+	PCN,
+	REP,
+	REQ,
+	RNE,
+	LNG,
+	LPO,
+	LCS,
+	LCC,
+	LEQ,
+	LNE,
+	SNG,
+	SPO,
+	SCS,
+	SCC,
+	SEQ,
+	SNE
+};
+
 enum base_isa {
 	CPS_IMP = 0x00, /* Clear Processor Status. */
 	ADC_IMM = 0x01, /* ADd with Carry. */
@@ -204,7 +253,7 @@ enum base_isa {
 	XOR_B   = 0x95, /* XOR B Register. */
 	CMP_B   = 0x96, /* CMP B Register. */
 	DEB_IMP = 0x99, /* Decrement B register. */
-	TXS_IMM = 0x9A, /* Transfer X to Stack pointer. */
+	TXS_IMP = 0x9A, /* Transfer X to Stack pointer. */
 	STY_IN  = 0x9C, /* STY Indirect */
 	PLA_IMP = 0x9E, /* PuLl Accumulator from stack. */
 	BCC_REL = 0xA0, /* Branch if Carry Clear. */
@@ -273,122 +322,167 @@ enum base_isa {
 };
 
 enum base_ext {
-	ADC_E   = 0x01, /* ADC E Indirect. */
-	LEA_ZX  = 0x02, /* LEA Zero Matrix, indexed with X. */
-	LEA_SX  = 0x03, /* LEA Stack Pointer, offset with X. */
-	ADD     = 0x04, /* ADD without carry. */
-	LLM     = 0x05, /* Logical shift Left, on Memory. */
-	PHE     = 0x08, /* PusH Effective address register to stack. */
-	CPB_E   = 0x09, /* CPB E Indirect. */
-	DEC_E   = 0x0C, /* DEC E Indirect. */
+	LEA_AY  = 0x03, /* LEA Absolute, indexed with Y. */
+	ADD_IMM = 0x06, /* ADD without carry. */
+	LEA_Z   = 0x07, /* Load Effective Address. */
+	CPE_IMM = 0x08, /* ComPare Effective address register. */
+	CLZ_Z   = 0x09, /* Count Leading Zeros. */
+	ADD_Z   = 0x0A, /* ADD Zero Matrix. */
+	STB_E   = 0x0B, /* STB E Indirect. */
+	CPE_Z   = 0x0C, /* CPE Zero Matrix. */
+	LNG_IMM = 0x0D, /* Load accumulator, if NeGative. */
+	LNG_E   = 0x0E, /* LNG E Indirect. */
 	JMP_E   = 0x10, /* JMP E Indirect. */
-	SBC_E   = 0x11, /* SBC E Indirect. */
-	LEA_ZY  = 0x12, /* LEA Zero Matrix, indexed with Y. */
-	LEA_SY  = 0x13, /* LEA Stack Pointer, offset with Y. */
-	ADD_E   = 0x14, /* ADD E Indirect. */
-	LLM_Z   = 0x15, /* LLM Zero Matrix. */
-	CPY_E   = 0x19, /* CPY E Indirect. */
-	INC_E   = 0x1C, /* INC E Indirect. */
-	JSR_E   = 0x20, /* JSR E Indirect. */
-	AND_E   = 0x21, /* AND E Indirect. */
-	PEA_ZX  = 0x22, /* PEA Zero Matrix, indexed with X. */
-	PEA_SX  = 0x23, /* PEA Stack Pointer, offset with X. */
-	SUB     = 0x24, /* SUBtract without carry. */
-	LLM_E   = 0x25, /* LLM E Indirect. */
-	PLE     = 0x28, /* PuLl Effective address register from stack. */
-	CPX_E   = 0x29, /* CPX E Indirect. */
-	DEE     = 0x2C, /* DEcrement Effective address register. */
-	BPO_E   = 0x30, /* BPO E Indirect. */
-	ORA_E   = 0x31, /* ORA E Indirect. */
-	PEA_ZY  = 0x32, /* PEA Zero Matrix, indexed with Y. */
-	PEA_SY  = 0x33, /* PEA Stack Pointer, offset with Y. */
-	SUB_E   = 0x34, /* SUB E Indirect. */
-	LRM     = 0x35, /* Logical shift Right, on Memory. */
-	CPE     = 0x39, /* ComPare Effective address register. */
-	INE     = 0x3C, /* INcrement Effective address register. */
-	BNG_E   = 0x40, /* BNG E Indirect. */
-	XOR_E   = 0x41, /* XOR E Indirect. */
-	LEA_AX  = 0x42, /* LEA Absolute, indexed with X. */
-	LEA_SI  = 0x43, /* LEA Stack Pointer, Immediate offset. */
-	ADE     = 0x44, /* ADd Effective address register. */
-	LRM_Z   = 0x45, /* LRM Zero Matrix. */
-	CPE_AB  = 0x49, /* CPE Absolute. */
-	DES     = 0x4C, /* DEcrement Stack pointer. */
-	BCS_E   = 0x50, /* BCS E Indirect. */
-	LSL_E   = 0x51, /* LSL E Indirect. */
-	LEA_AY  = 0x52, /* LEA Absolute, indexed with Y. */
-	LEA_RE  = 0x53, /* LEA Relative. */
-	ADE_A   = 0x54, /* ADE with Accumulator. */
-	LRM_E   = 0x55, /* LRM E Indirect. */
-	CPE_Z   = 0x59, /* CPE Zero Matrix. */
-	INS     = 0x5C, /* INcrement Stack pointer. */
-	BCC_E   = 0x60, /* BCC E Indirect. */
-	LSR_E   = 0x61, /* LSR E Indirect. */
-	PEA_AX  = 0x62, /* PEA Absolute, indexed with X. */
-	PEA_SI  = 0x63, /* PEA Stack Pointer, Immediate offset. */
-	SBE     = 0x64, /* SuBtract Effective address register. */
-	RLM     = 0x65, /* Rotate Left, on Memory. */
-	ICE     = 0x69, /* Interlocked Compare, and Exchange. */
-	BEQ_E   = 0x70, /* BEQ E Indirect. */
-	ROL_E   = 0x71, /* ROL E Indirect. */
-	PEA_AY  = 0x72, /* PEA Absolute, indexed with Y. */
-	PEA_RE  = 0x73, /* PEA Relative. */
-	RLM_Z   = 0x75, /* RLM Zero Matrix. */
-	ICE_Z   = 0x79, /* ICE Zero Matrix. */
-	STE     = 0x7C, /* STore Effective address register. */
-	BNE_E   = 0x80, /* BNE E Indirect. */
-	ROR_E   = 0x81, /* ROR E Indirect. */
-	LEA_IX  = 0x82, /* LEA Indexed Indirect. */
-	LEA_IN  = 0x83, /* LEA Indirect. */
-	ADS     = 0x84, /* ADd Stack pointer. */
-	RLM_E   = 0x85, /* RLM E Indirect. */
-	ICE_E   = 0x89, /* ICE E Indirect. */
-	STE_Z   = 0x8C, /* STE Zero Matrix. */
-	BVS_E   = 0x90, /* BVS E Indirect. */
-	MUL_E   = 0x91, /* MUL E Indirect. */
-	LEA_IY  = 0x92, /* LEA Indirect Indexed. */
-	LEA_AI  = 0x93, /* LEA Absolute Indirect. */
-	ADS_A   = 0x94, /* ADS with Accumulator. */
-	RRM     = 0x95, /* Rotate Right, on Memory. */
-	STZ     = 0x9C, /* STore Zero. */
-	BVC_E   = 0xA0, /* BVC E Indirect. */
-	DIV_E   = 0xA1, /* DIV E Indirect. */
-	PEA_IX  = 0xA2, /* PEA Indexed Indirect. */
-	PEA_IN  = 0xA3, /* PEA Indirect. */
-	SBS     = 0xA4, /* SuBtract Stack pointer. */
-	RRM_ZM  = 0xA5, /* RRM Zero Matrix. */
-	STZ_ZM  = 0xAC, /* STZ Zero Matrix. */
-	CMP_E   = 0xB1, /* CMP E Indirect. */
-	PEA_IY  = 0xB2, /* PEA Indirect Indexed. */
-	PEA_AI  = 0xB3, /* PEA Absolute Indirect. */
-	SBS_A   = 0xB4, /* SBS with Accumulator. */
-	RRM_E   = 0xB5, /* RRM E Indirect. */
-	LDX_E   = 0xB9, /* LDX E Indirect. */
-	STZ_E   = 0xBC, /* STZ E Indirect. */
-	LDA_E   = 0xC1, /* LDA E Indirect. */
-	LEA_AIX = 0xC2, /* LEA Absolute Indexed Indirect. */
-	LEA_Z   = 0xC3, /* LEA Zero Matrix. */
-	NOT     = 0xC4, /* bitwise NOT with accumulator. */
-	ARM     = 0xC5, /* Arithmetic shift Right, on Memory. */
-	LDE     = 0xC9, /* LoaD Effective address register. */
-	STA_E   = 0xCC, /* STA E Indirect. */
-	LDB_E   = 0xD1, /* LDB E Indirect. */
-	LEA_AIY = 0xD2, /* LEA Absolute Indirect Indexed. */
-	LEA     = 0xD3, /* Load Effective Address. */
-	NOT_AB  = 0xD4, /* NOT Absolute. */
-	ARM_Z   = 0xD5, /* ARM Zero Matrix. */
-	LDE_AB  = 0xD9, /* LDE Absolute. */
-	STB_E   = 0xDC, /* STB E Indirect. */
-	LDY_E   = 0xE1, /* LDY E Indirect. */
-	PEA_AIX = 0xE2, /* PEA Absolute Indexed Indirect. */
-	PEA_Z   = 0xE3, /* PEA Zero Matrix. */
-	NOT_Z   = 0xE4, /* NOT Zero Matrix. */
-	ARM_E   = 0xE5, /* ARM E Indirect. */
-	LDE_Z   = 0xE9, /* LDE Zero Matrix. */
-	STY_E   = 0xEC, /* STY E Indirect. */
-	ASR_E   = 0xF1, /* ASR E Indirect. */
-	PEA_AIY = 0xF2, /* PEA Absolute Indirect Indexed. */
-	PEA     = 0xF3, /* Push Effective Address. */
-	NOT_E   = 0xF4, /* NOT E Indirect. */
-	STX_E   = 0xFC, /* STX E Indirect. */
+	ADC_E   = 0x11, /* ADC E Indirect. */
+	ROR_E   = 0x12, /* ROR E Indirect. */
+	LEA_AB  = 0x13, /* LEA Absolute. */
+	CLZ_AB  = 0x15, /* CLZ Absolute. */
+	ADD_AB  = 0x16, /* ADD Absolute. */
+	LEA_ZY  = 0x17, /* LEA Zero Matrix, indexed with Y. */
+	CPE_AB  = 0x18, /* CPE Absolute. */
+	CLZ_E   = 0x19, /* CLZ E Indirect. */
+	ADD_E   = 0x1A, /* ADD E Indirect. */
+	LDX_E   = 0x1B, /* LDX E Indirect. */
+	SNG_E   = 0x1E, /* Store accumulator, if NeGative. */
+	PEA_AY  = 0x23, /* PEA Absolute, indexed with Y. */
+	SUB_IMM = 0x26, /* SUBtract without carry. */
+	PEA_Z   = 0x27, /* Push Effective Address. */
+	CLO_Z   = 0x29, /* Count Leading Ones. */
+	SUB_Z   = 0x2A, /* SUB Zero Matrix. */
+	STX_E   = 0x2B, /* STX E Indirect. */
+	ICE_Z   = 0x2C, /* Interlocked Compare, and Exchange. */
+	LPO_IMM = 0x2D, /* Load accumulator, if POsitive. */
+	LPO_E   = 0x2E, /* LPO E Indirect. */
+	JSR_E   = 0x30, /* JSR E Indirect. */
+	SBC_E   = 0x31, /* SBC E Indirect. */
+	MUL_E   = 0x32, /* MUL E Indirect. */
+	PEA_AB  = 0x33, /* PEA Absolute. */
+	CLO_AB  = 0x34, /* CLO Absolute. */
+	SUB_AB  = 0x35, /* SUB Absolute. */
+	PEA_ZY  = 0x37, /* PEA Zero Matrix, indexed with Y. */
+	ICE_AB  = 0x38, /* ICE Absolute. */
+	CLO_E   = 0x39, /* CLO E Indirect. */
+	SUB_E   = 0x3A, /* SUB E Indirect. */
+	CPB_E   = 0x3B, /* CPB E Indirect. */
+	ICE_E   = 0x3C, /* ICE E Indirect. */
+	SPO_E   = 0x3E, /* Store accumulator, if POsitive. */
+	LDS_IMM = 0x40, /* LoaD Stack pointer. */
+	LEA_AI  = 0x43, /* LEA Absolute Indirect. */
+	LDS_Z   = 0x44, /* LDS Zero Matrix. */
+	ADE_IMM = 0x46, /* ADd Effective address register. */
+	LEA_IN  = 0x47, /* LEA Indirect. */
+	BIT_Z   = 0x49, /* BIt Test. */
+	ADE_Z   = 0x4A, /* ADE Zero Matrix. */
+	CPX_E   = 0x4B, /* CPX E Indirect. */
+	LLM_Z   = 0x4C, /* Logical shift Left, on Memory. */
+	LCS_IMM = 0x4D, /* Load accumulator, if Carry Set. */
+	LCS_E   = 0x4E, /* LCS E Indirect. */
+	LDS_AB  = 0x50, /* LDS Absolute. */
+	AND_E   = 0x51, /* AND E Indirect. */
+	DIV_E   = 0x52, /* DIV E Indirect. */
+	LEA_AX  = 0x53, /* LEA Absolute, indexed with X. */
+	LDS_E   = 0x54, /* LDS E Indirect. */
+	BIT_AB  = 0x55, /* BIT Absolute. */
+	ADE_AB  = 0x56, /* ADE Absolute. */
+	LEA_ZX  = 0x57, /* LEA Zero Matrix, indexed with X. */
+	LLM_AB  = 0x58, /* LLM Absolute. */
+	BIT_E   = 0x59, /* BIT E Indirect. */
+	CPY_E   = 0x5B, /* CPY E Indirect. */
+	LLM_E   = 0x5C, /* LLM E Indirect. */
+	SCS_E   = 0x5E, /* Store accumulator, if Carry Set. */
+	SCO_IMM = 0x60, /* Start one, or more COre(s). */
+	PEA_AI  = 0x63, /* PEA Absolute Indirect. */
+	SCO_Z   = 0x64, /* SCO Zero Matrix. */
+	SBE_IMM = 0x66, /* SuBtract Effective address register. */
+	PEA_IN  = 0x67, /* PEA Indirect. */
+	SBE_Z   = 0x6A, /* SBE Zero Matrix. */
+	PHE_IMP = 0x6B, /* PusH Effective address register to stack. */
+	LRM_Z   = 0x6C, /* Logical shift Right, on Memory. */
+	LCC_IMM = 0x6D, /* Load accumulator, if Carry Clear. */
+	LCC_E   = 0x6E, /* LCC E Indirect. */
+	SCO_AB  = 0x70, /* SCO Absolute. */
+	ORA_E   = 0x71, /* ORA E Indirect. */
+	ASR_E   = 0x72, /* ASR E Indirect. */
+	PEA_AX  = 0x73, /* PEA Absolute, indexed with X. */
+	SCO_E   = 0x74, /* SCO E Indirect. */
+	SBE_AB  = 0x76, /* SBE Absolute. */
+	PEA_ZX  = 0x77, /* PEA Zero Matrix, indexed with X. */
+	LRM_AB  = 0x78, /* LRM Absolute. */
+	PLE_IMP = 0x7B, /* PuLl Effective address register from stack. */
+	LRM_E   = 0x7C, /* LRM E Indirect. */
+	SCC_E   = 0x7E, /* Store accumulator, if Carry Clear. */
+	ECO_IMM = 0x80, /* End one, or more COre(s). */
+	DEC_E   = 0x82, /* DEC E Indirect. */
+	LEA_AIY = 0x83, /* LEA Absolute Indirect Indexed. */
+	ECO_Z   = 0x84, /* ECO Zero Matrix. */
+	ADS_IMM = 0x86, /* ADd Stack pointer. */
+	LEA_IY  = 0x87, /* LEA Indirect Indexed. */
+	ADS_Z   = 0x8A, /* ADS Zero Matrix. */
+	DEE_IMP = 0x8B, /* DEcrement Effective address register. */
+	RLM_Z   = 0x8C, /* Rotate Left, on Memory. */
+	LEQ_IMM = 0x8D, /* Load accumulator, if EQual. */
+	LEQ_E   = 0x8E, /* LEQ E Indirect. */
+	ECO_AB  = 0x90, /* ECO Absolute. */
+	XOR_E   = 0x91, /* XOR E Indirect. */
+	CMP_E   = 0x92, /* CMP E Indirect. */
+	LEA_AIX = 0x93, /* LEA Absolute Indexed Indirect. */
+	ECO_E   = 0x94, /* ECO E Indirect. */
+	ADS_AB  = 0x96, /* ADS Absolute. */
+	LEA_IX  = 0x97, /* LEA Indexed Indirect. */
+	RLM_AB  = 0x98, /* RLM Absolute. */
+	ADS_E   = 0x9A, /* ADS E Indirect. */
+	INE_IMP = 0x9B, /* INcrement Effective address register. */
+	RLM_E   = 0x9C, /* RLM E Indirect. */
+	SEQ_E   = 0x9E, /* Store accumulator, if EQual. */
+	INC_E   = 0xA2, /* INC E Indirect. */
+	PEA_AIY = 0xA3, /* PEA Absolute Indirect Indexed. */
+	STS_Z   = 0xA4, /* STore Stack pointer. */
+	SBS_IMM = 0xA6, /* SuBtract Stack pointer. */
+	PEA_IY  = 0xA7, /* PEA Indirect Indexed. */
+	SBS_Z   = 0xAA, /* SBS Zero Matrix. */
+	DES_IMP = 0xAB, /* DEcrement Stack pointer. */
+	RRM_Z   = 0xAC, /* Rotate Right, on Memory. */
+	LNE_IMM = 0xAD, /* Load accumulator, if Not Equal. */
+	LNE_E   = 0xAE, /* LNE E Indirect. */
+	STS_AB  = 0xB0, /* STS Absolute. */
+	LSL_E   = 0xB1, /* LSL E Indirect. */
+	LDY_E   = 0xB2, /* LDY E Indirect. */
+	PEA_AIX = 0xB3, /* PEA Absolute Indexed Indirect. */
+	STS_E   = 0xB4, /* STS E Indirect. */
+	SBS_AB  = 0xB6, /* SBS Absolute. */
+	PEA_IX  = 0xB7, /* PEA Indexed Indirect. */
+	RRM_AB  = 0xB8, /* RRM Absolute. */
+	SBS_E   = 0xBA, /* SBS E Indirect. */
+	INS_IMP = 0xBB, /* INcrement Stack pointer. */
+	RRM_E   = 0xBC, /* RRM E Indirect. */
+	REP_REL = 0xBD, /* REPeat until counter is zero. */
+	SNE_E   = 0xBE, /* Store accumulator, if Not Equal. */
+	STY_E   = 0xC2, /* STY E Indirect. */
+	STE_Z   = 0xC4, /* STore Effective address register. */
+	NOT_A   = 0xC6, /* bitwise NOT with accumulator. */
+	NOT_Z   = 0xCA, /* NOT Zero Matrix. */
+	MMV_IMP = 0xCB, /* Memory MoVe. */
+	ARM_Z   = 0xCC, /* Arithmetic shift Right, on Memory. */
+	REQ_REL = 0xCD, /* Repeat until either counter is zero, or zero flag isn't set. */
+	STE_AB  = 0xD0, /* STE Absolute. */
+	LSR_E   = 0xD1, /* LSR E Indirect. */
+	LDA_E   = 0xD2, /* LDA E Indirect. */
+	NOT_AB  = 0xD6, /* NOT Absolute. */
+	ARM_AB  = 0xD8, /* ARM Absolute. */
+	NOT_E   = 0xDA, /* NOT E Indirect. */
+	ARM_E   = 0xDC, /* ARM E Indirect. */
+	RNE_REL = 0xDD, /* Repeat until either counter is zero, or zero flag is set. */
+	STA_E   = 0xE2, /* STA E Indirect. */
+	STZ_Z   = 0xE4, /* STore Zero. */
+	SWP_A   = 0xE6, /* SWaP lower half, with upper half. */
+	SWP_Z   = 0xEA, /* SWP Zero Matrix. */
+	PCN_Z   = 0xEC, /* Population CouNt. */
+	STZ_AB  = 0xF0, /* STZ Absolute. */
+	ROL_E   = 0xF1, /* ROL E Indirect. */
+	LDB_E   = 0xF2, /* LDB E Indirect. */
+	STZ_E   = 0xF4, /* STZ E Indirect. */
+	SWP_AB  = 0xF6, /* SWP Absolute. */
+	PCN_AB  = 0xF8, /* PCN Absolute. */
+	SWP_E   = 0xFA, /* SWP E Indirect. */
+	PCN_E   = 0xFC  /* PCN E Indirect. */
 };