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This is the biggest milestone I've reached for this
project, since the base extension changes alot about
what Sux can do by default, and now makes it a viable
instruction set for modern day use, when compared
with other instruction sets.
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- Made the debug print for the CPU flags more
readable.
- Started work on implementing line number support
into SuBAsm.
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This is to allow for making the stack bigger for
anything that needs to change the size of it.
- Made the SuB Suite set the stack pointer to the end
of the usable RAM, and allow for changing the stack
size.
In this case, the size of the stack is currently set
to 192K, with the end of the heap being just below
the stack.
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- Simplified the effective address functions.
- Made SuBEditor a bit faster.
- JSR, and RTS now support using the RS prefix, which
is used to specify the return address size, with an
RS prefix of 0 being a return address size of 64
bits, rather than 8 bits.
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address handling.
It's now all done using several functions for each
addressing mode, with the result being the effective
address.
I did this to make the codebase cleaner, and more
readable.
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instruction formatting simpler.
- Refactored the instruction table of the emulator's
assembler, it now has two parts, the addressing mode
bits, and the base value.
The base value is what's used to generate the actual
opcode, with the addressing mode bits telling the
assembler what addressing modes this instruction
supports.
The reason for doing this was to use less space. For
comparison, the previous version used 870 bytes for
the instruction table, while the new version uses
only 222 bytes. The new version is nearly 4 times
smaller than the pervious version.
- The B register based ALU instructions now use their
own addressing mode, and are specified by using 'b'
as the operand for those instructions.
For example, to add the Accumulator with the B
register, you now use "ADC B" instead of "AAB".
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- Added a new preifx called the OF prefix, which adds
the contents of a specific register to the current
operand.
- Added a table generator, which parses opcode table
csv files.
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all the value getting, and setting into macros.
This is to make the codebase cleaner.
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The reason for doing this was because JSL, and RTL are
redundent, as they both do the same thing as JSR, and
RTS.
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- Moved the large enums, and large tables into separate
header files.
- Added enums for implementing the base extension
- Fixed a bug in the assembler.
- Worked more on SuBAsm.
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the processor status register, a union now.
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done with a union, in order to make it more readable.
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functions.
I did this to make it more readable, while still
making it fast, due to inlining it.
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emulator's assembler.
And removed three pointers, and the linewrap table
from zero page, in SuBEditor.
I moved the linewrap table to address $1000.
And because of finally adding include support to the
assembler, I can now start work on SuBAsm!
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emulator smaller, and faster.
I am also starting to make SuBEditor's source code
more readable.
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It now has a lexer/tokenizer, along with a parser.
I have also made the emulator even smaller.
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efficient, and ported SuBEditor to C.
I revamped the opcode table to add another prefix bit
for the addressing mode, finally giving access to all
addresses, without wasting any bytes.
I made the stack based operations more efficient, by
sort of applying Duff's device to it.
And I ported SuBEditor to C, to make it easier for me
to figure out how to implement SuBAsm.
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We're now Free Software!!!
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for use of the B register as an operand, for ALU based
instructions.
This allows for both low code size, and high
performance.
This means we can save upto 9 bytes, by just using
the B register for ALU operations, rather than using a
memory address.
The indirect addressing modes, give Sux the abillity
to now use pointers.
Hope you guys have a Merry Christmas!
From mr b0nk 500 <b0nk@b0nk.xyz>
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remainder during a DIV instruction.
I also added the TAB, and TBA instructions, for
transfering between the Accumulator, and the
B register.
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I also added the WAI instruction, which puts the thread
that executed it, into a catatonic stat, where it can't
do anything, until an interrupt occurs.
I will be starting work on GFsuX next.
I also might start work on SuBAsm, the
Sux Bootstrapping Assembler.
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I also added the ASR instruction, for doing arithmetic
shifts, and have added a hello world program.
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AKA, referencing a label before it has been declared
yet.
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between the three main registers.
These instructions are:
TAY: Transfer Accumulator to Y.
TAX: Transfer Accumulator to X.
TYX: Transfer Y to X.
TYA: Transfer Y to Accumulator.
TXA: Transfer X to Accumulator.
TXY: Transfer X to Y.
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I have also added a program that computes the
Fibonacci sequence that I wrote in Sux assembly.
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Any instructions that either have a register size of
8 bits, use implied addressing, or branch can save a
byte by disabling the prefix byte.
It does this by checking if the first three bits are
all set to 1.
If true, then it will treat it as a prefix
byte, otherwise, it will treat it as an opcode.
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Added a prefix byte to tell the CPU certain
information such as, how many bytes to load into the
registers, or what ISA extension we want to use.
I also added an assembly language monitor, so that I
don't have to write stuff in machine code.
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I have now implemented BRK, and RTI.
Also, BieHDC, and I will both be working on rev2.
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I finally implemented the other addressing modes, and
added a Makefile.
Not sure when I will start work on rev2 of Sux, but it
will be sometime soon.
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Fixed stack based instructions.
Fixed the rotate instructions.
Added carry to the shift instructions.
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some unneeded instructions.
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Sux emulator.
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